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37107174c6
The implementation is a bit tricky as it requires to take different code paths for the //e, the //c and the IIgs. Additionally the //c only provides a VBL IRQ flag supposed to be used by an IRQ handler to determine what triggered the IRQ. However, masking IRQs on the CPU, activating the VBL IRQ, clearing any pending VBL IRQs and then polling for the IRQ flag does the trick.
61 lines
1.3 KiB
ArmAsm
61 lines
1.3 KiB
ArmAsm
;
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; Oliver Schmidt, 2020-06-14
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;
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; void waitvsync (void);
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;
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.ifdef __APPLE2ENH__
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.constructor initvsync
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.export _waitvsync
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.import _get_ostype
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.include "apple2.inc"
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.segment "ONCE"
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initvsync:
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jsr _get_ostype
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sta ostype
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rts
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.code
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_waitvsync:
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bit ostype
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bmi iigs ; $8x
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bvs iic ; $4x
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: bit RDVBLBAR
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bpl :- ; Blanking
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: bit RDVBLBAR
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bmi :- ; Drawing
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rts
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; Apple IIgs TechNote #40, VBL Signal
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iigs: bit RDVBLBAR
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bmi iigs ; Blanking
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: bit RDVBLBAR
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bpl :- ; Drawing
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rts
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; Apple IIc TechNote #9, Detecting VBL
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iic: sei
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sta IOUDISOFF
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lda RDVBLMSK
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bit ENVBL
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bit PTRIG ; Reset VBL interrupt flag
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: bit RDVBLBAR
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bpl :-
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asl
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bcs :+ ; VBL interrupts were already enabled
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bit DISVBL
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: sta IOUDISON ; IIc Tech Ref Man: The firmware normally leaves IOUDIS on.
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cli
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rts
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.segment "INIT"
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ostype: .res 1
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.endif ; __APPLE2ENH__
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