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AND_INDX and AND_INDY implemented
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parent
8dcea919ed
commit
4bfeb62112
70
cpu.c
70
cpu.c
@ -70,6 +70,7 @@ word read_word(State6502 * state, word address) {
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}
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byte get_byte_zero_page(State6502 * state) {
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//8 bit addressing, only the first 256 bytes of the memory
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byte address = pop_byte(state);
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return state->memory[address];
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}
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@ -86,20 +87,41 @@ byte get_byte_zero_page_y(State6502 * state) {
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byte get_byte_absolute(State6502 * state)
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{
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//absolute indexed, 16 bits
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word address = pop_word(state);
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return state->memory[address];
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}
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byte get_byte_absolute_x(State6502 * state) {
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//absolute added with the contents of x register
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word address = pop_word(state) + state->x;
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return state->memory[address];
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}
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byte get_byte_absolute_y(State6502 * state) {
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//absolute added with the contents of y register
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word address = pop_word(state) + state->y;
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return state->memory[address];
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}
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byte get_byte_indirect_x(State6502 * state) {
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//pre-indexed indirect with the X register
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//zero-page address is added to x register
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byte indirect_address = pop_byte(state) + state->x;
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//pointing to address of a word holding the address of the operand
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word address = read_word(state, indirect_address);
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return state->memory[address];
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}
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byte get_byte_indirect_y(State6502 * state) {
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//post-indexed indirect
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//zero-page address as an argument
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byte indirect_address = pop_byte(state);
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//the address and the following byte is read as a word, adding Y register
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word address = read_word(state, indirect_address) + state->y;
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return state->memory[address];
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}
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int emulate_6502_op(State6502 * state) {
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byte* opcode = &state->memory[state->pc++];
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switch (*opcode) {
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@ -117,8 +139,8 @@ int emulate_6502_op(State6502 * state) {
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case AND_ABS: AND(state, get_byte_absolute(state)); break;
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case AND_ABSX: AND(state, get_byte_absolute_x(state)); break;
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case AND_ABSY: AND(state, get_byte_absolute_y(state)); break;
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case AND_INDX: unimplemented_instruction(state); break;
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case AND_INDY: unimplemented_instruction(state); break;
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case AND_INDX: AND(state, get_byte_indirect_x(state)); break;
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case AND_INDY: AND(state, get_byte_indirect_y(state)); break;
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case ASL_ACC: unimplemented_instruction(state); break;
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case ASL_ZP: unimplemented_instruction(state); break;
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case ASL_ZPX: unimplemented_instruction(state); break;
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@ -200,26 +222,8 @@ int emulate_6502_op(State6502 * state) {
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case LDA_ABS: LDA(state, get_byte_absolute(state)); break;
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case LDA_ABSX: LDA(state, get_byte_absolute_x(state)); break;
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case LDA_ABSY: LDA(state, get_byte_absolute_y(state)); break;
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case LDA_INDX:
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{
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//pre-indexed indirect
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//zero-page address is added to x register
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byte indirect_address = pop_byte(state) + state->x;
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//pointing to address of a word holding the address of the operand
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word address = read_word(state, indirect_address);
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LDA(state, state->memory[address]);
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break;
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}
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case LDA_INDY:
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{
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//post-indexed indirect
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//zero-page address as an argument
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byte indirect_address = pop_byte(state);
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//the address and the following byte is read as a word, adding Y register
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word address = read_word(state, indirect_address) + state->y;
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LDA(state, state->memory[address]);
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break;
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}
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case LDA_INDX: LDA(state, get_byte_indirect_x(state)); break;
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case LDA_INDY: LDA(state, get_byte_indirect_y(state)); break;
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case LDX_IMM: unimplemented_instruction(state); break;
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case LDX_ZP: unimplemented_instruction(state); break;
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case LDX_ZPY: unimplemented_instruction(state); break;
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@ -241,26 +245,8 @@ int emulate_6502_op(State6502 * state) {
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case ORA_ABS: ORA(state, get_byte_absolute(state)); break;
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case ORA_ABSX: ORA(state, get_byte_absolute_x(state)); break;
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case ORA_ABSY: ORA(state, get_byte_absolute_y(state)); break;
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case ORA_INDX: //ORA, indirect, x
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{
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//pre-indexed indirect
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//zero-page address is added to x register
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byte indirect_address = pop_byte(state) + state->x;
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//pointing to address of a word holding the address of the operand
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word address = read_word(state, indirect_address);
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ORA(state, state->memory[address]);
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break;
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}
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case ORA_INDY: //ORA, indirect, y (post_indexed)
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{
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//post-indexed indirect
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//zero-page address as an argument
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byte indirect_address = pop_byte(state);
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//the address and the following byte is read as a word, adding Y register
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word address = read_word(state, indirect_address) + state->y;
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ORA(state, state->memory[address]);
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break;
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}
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case ORA_INDX: ORA(state, get_byte_indirect_x(state)); break;
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case ORA_INDY: ORA(state, get_byte_indirect_y(state)); break;
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case ROL_ACC: unimplemented_instruction(state); break;
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case ROL_ZP: unimplemented_instruction(state); break;
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case ROL_ZPX: unimplemented_instruction(state); break;
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