mirror of
https://github.com/jborza/emu6502.git
synced 2024-11-21 23:31:19 +00:00
2ddcf62212
added BEQ+test split memory function to a separate module
465 lines
17 KiB
C
465 lines
17 KiB
C
#include "state.h"
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#include "cpu.h"
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#include "opcodes.h"
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#include "memory.h"
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#include <stdio.h>
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#include <memory.h>
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#include <stdlib.h>
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void* unimplemented_instruction(State6502* state) {
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printf("Error: unimplemented instruction\n");
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exit(1);
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}
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int is_negative(byte value) {
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return ((1 << 7) & value) != 0;
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}
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void set_z_flag(State6502 * state, byte value) {
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state->flags.z = value == 0;
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}
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void set_NV_flags(State6502 * state, byte value) {
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//N flag
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state->flags.n = is_negative(value);
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//TODO implement NV flags
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state->flags.v = ((1 << 6) & value) != 0;
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}
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void set_NZ_flags(State6502 * state, byte value) {
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set_z_flag(state, value);
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//N flag
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state->flags.n = is_negative(value);
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}
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void clear_flags(State6502 * state) {
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state->flags.b =
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state->flags.c =
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state->flags.d =
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state->flags.i =
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state->flags.n =
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state->flags.v =
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state->flags.z = 0;
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state->flags.pad = 1; //unused is supposed to be 1
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}
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void clear_state(State6502 * state) {
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state->a = 0;
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state->x = 0;
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state->y = 0;
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state->pc = 0;
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state->sp = 0xFF;
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clear_flags(state);
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state->running = 1;
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}
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byte pop_byte(State6502 * state) {
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return state->memory[state->pc++];
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}
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void push_byte_to_stack(State6502 * state, byte value) {
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//stack located between $0100 to $01FF
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state->memory[STACK_HOME + state->sp--] = value;
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}
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void push_word_to_stack(State6502* state, word value) {
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push_byte_to_stack(state, (value >> 8) & 0xFF);
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push_byte_to_stack(state, value & 0xFF);
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}
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byte pop_byte_from_stack(State6502 * state) {
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return state->memory[STACK_HOME + ++(state->sp)];
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}
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word pop_word_from_stack(State6502* state) {
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byte low = pop_byte_from_stack(state);
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byte high = pop_byte_from_stack(state);
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return low + ((word)high >> 8);
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}
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//bitwise or with accumulator
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void ORA(State6502 * state, byte operand) {
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byte result = state->a | operand;
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set_NV_flags(state, result);
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state->a = result;
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}
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//bitwise and with accumulator
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void AND(State6502 * state, byte operand) {
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byte result = state->a & operand;
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set_NV_flags(state, result);
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state->a = result;
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}
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//load accumulator
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void LDA(State6502 * state, byte operand) {
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state->a = operand;
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set_NZ_flags(state, state->a);
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}
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void LDX(State6502 * state, byte operand) {
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state->x = operand;
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set_NZ_flags(state, state->x);
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}
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void LDY(State6502 * state, byte operand) {
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state->y = operand;
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set_NZ_flags(state, state->y);
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}
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void STA(State6502 * state, word address) {
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state->memory[address] = state->a;
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}
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void STX(State6502 * state, word address) {
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state->memory[address] = state->x;
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}
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void STY(State6502 * state, word address) {
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state->memory[address] = state->y;
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}
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void INC(State6502 * state, word address) {
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state->memory[address] += 1;
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set_NZ_flags(state, state->memory[address]);
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}
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void DEC(State6502 * state, word address) {
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state->memory[address] -= 1;
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set_NZ_flags(state, state->memory[address]);
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}
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void EOR(State6502 * state, byte operand) {
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state->a = state->a ^ operand;
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set_NV_flags(state, state->a);
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}
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void JMP(State6502 * state, word address) {
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state->pc = address;
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}
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void SBC(State6502 * state, byte operand) {
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//subtract operand from A
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word operand_word = operand;
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//borrow the complement of carry flag - if the carry flag is 1, borrow 0 and vice versa
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word result_word = state->a - operand_word - !state->flags.c;
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byte result = result_word & 0xFF;
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// overflow flag if the the result doesn't fit into the signed byte range -128 to 127
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state->flags.v = ((state->a ^ operand) & 0x80) && ((state->a ^ result) & 0x80);
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state->a = result;
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state->flags.n = is_negative(state->a);
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state->flags.z = state->a == 0;
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state->flags.c = result_word <= 0xFF;
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}
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void ADC(State6502 * state, byte operand) {
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//add operand to A
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word result_word = operand + state->a + (state->flags.c ? 1 : 0);
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byte result = result_word & 0xFF;
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//set overflow flag if the result's sign would change - the result doesn't fit into a signed byte
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//there is overflow if the inputs do not have different signs and the input sign is different from the output sign
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//meaning two numbers that have the same sign are added, and the result has a different sign.
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//overflow = <'a' and 'arg' have the same sign> & <the sign of 'a'and 'sum' differs> & <extract sign bit>
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state->flags.v = !((state->a ^ operand) & 0x80) && ((state->a ^ result) & 0x80);
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state->a = result;
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state->flags.n = is_negative(state->a);
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state->flags.z = state->a == 0;
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state->flags.c = result_word > 0xFF;
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}
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void BIT(State6502 * state, byte operand) {
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//BIT sets the Z flag as though the value in the address tested were ANDed with the accumulator.
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//The N and V flags are set to match bits 7 and 6 respectively in the value stored at the tested address.
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set_NV_flags(state, operand);
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state->flags.z = (state->a & operand) == 0;
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}
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void cmp_internal(State6502 * state, byte register_value, byte operand) {
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//set carry flag if A >= M
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state->flags.c = register_value >= operand;
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//set zero flag if A == M
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state->flags.z = register_value == operand;
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//set negative flag if A - M is negative
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state->flags.n = is_negative(register_value - operand);
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}
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void CMP(State6502 * state, byte operand) {
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cmp_internal(state, state->a, operand);
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}
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void CPX(State6502 * state, byte operand) {
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cmp_internal(state, state->x, operand);
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}
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void CPY(State6502 * state, byte operand) {
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cmp_internal(state, state->y, operand);
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}
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byte asl(State6502 * state, byte operand) {
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byte result = operand << 1;
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state->flags.c = operand > 0x80;
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set_NZ_flags(state, result);
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return result;
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}
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void ASL_A(State6502 * state) {
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state->a = asl(state, state->a);
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}
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void ASL_MEM(State6502 * state, word address) {
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byte operand = state->memory[address];
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state->memory[address] = operand;
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state->memory[address] = asl(state, operand);
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}
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byte lsr(State6502 * state, byte operand) {
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byte result = operand >> 1;
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state->flags.c = (operand & 0x01) != 0;
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set_NZ_flags(state, result);
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return result;
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}
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void LSR_A(State6502 * state) {
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state->a = lsr(state, state->a);
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}
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void LSR_MEM(State6502 * state, word address) {
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byte operand = state->memory[address];
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state->memory[address] = lsr(state, operand);
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}
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byte rol(State6502 * state, byte operand) {
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word result_word = (operand << 1) | state->flags.c;
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state->flags.c = result_word > 0xFF;
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byte result = result_word & 0xFF;
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set_NZ_flags(state, result);
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return result;
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}
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void ROL_A(State6502 * state) {
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state->a = rol(state, state->a);
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}
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void ROL_MEM(State6502 * state, word address) {
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byte operand = state->memory[address];
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state->memory[address] = rol(state, operand);
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}
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byte ror(State6502 * state, byte operand) {
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word result_word = (operand >> 1) | (state->flags.c << 7);
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state->flags.c = (result_word & 0x01) != 0;
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byte result = result_word & 0xFF;
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set_NZ_flags(state, result);
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return result;
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}
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void ROR_A(State6502 * state) {
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state->a = rol(state, state->a);
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}
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void ROR_MEM(State6502 * state, word address) {
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byte operand = state->memory[address];
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state->memory[address] = ror(state, operand);
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}
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void JSR(State6502 * state, word address) {
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//JSR pushes the address-1 of the next operation on to the stack before transferring program control to the following address.
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word address_to_push = state->pc - 1;
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push_byte_to_stack(state, (address_to_push >> 8 & 0xFF));
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push_byte_to_stack(state, address_to_push & 0xFF);
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state->pc = address;
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}
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void RTS_(State6502* state) {
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word address = pop_word_from_stack(state);
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state->pc = address + 1;
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}
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void BEQ(State6502* state) {
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word address = get_address_relative(state);
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if (state->flags.z)
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state->pc = address;
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}
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word pop_word(State6502 * state) {
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byte low = pop_byte(state);
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byte high = pop_byte(state);
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word result = (high << 8) | low;
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return result;
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}
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int emulate_6502_op(State6502 * state) {
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byte* opcode = &state->memory[state->pc++];
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switch (*opcode) {
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case ADC_IMM: ADC(state, pop_byte(state)); break;
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case ADC_ZP: ADC(state, get_byte_zero_page(state)); break;
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case ADC_ZPX: ADC(state, get_byte_zero_page_x(state)); break;
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case ADC_ABS: ADC(state, get_byte_absolute(state)); break;
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case ADC_ABSX: ADC(state, get_byte_absolute_x(state)); break;
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case ADC_ABSY: ADC(state, get_byte_absolute_y(state)); break;
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case ADC_INDX: ADC(state, get_byte_indirect_x(state)); break;
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case ADC_INDY: ADC(state, get_byte_indirect_y(state)); break;
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case AND_IMM: AND(state, pop_byte(state)); break;
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case AND_ZP: AND(state, get_byte_zero_page(state)); break;
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case AND_ZPX: AND(state, get_byte_zero_page_x(state)); break;
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case AND_ABS: AND(state, get_byte_absolute(state)); break;
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case AND_ABSX: AND(state, get_byte_absolute_x(state)); break;
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case AND_ABSY: AND(state, get_byte_absolute_y(state)); break;
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case AND_INDX: AND(state, get_byte_indirect_x(state)); break;
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case AND_INDY: AND(state, get_byte_indirect_y(state)); break;
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case ASL_ACC: ASL_A(state); break;
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case ASL_ZP: ASL_MEM(state, get_address_zero_page(state)); break;
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case ASL_ZPX: ASL_MEM(state, get_address_zero_page_x(state)); break;
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case ASL_ABS: ASL_MEM(state, get_address_absolute(state)); break;
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case ASL_ABSX: ASL_MEM(state, get_address_absolute_x(state)); break;
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case BCC_REL: unimplemented_instruction(state); break;
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case BCS_REL: unimplemented_instruction(state); break;
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case BEQ_REL: BEQ(state); break;
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case BMI_REL: unimplemented_instruction(state); break;
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case BNE_REL: unimplemented_instruction(state); break;
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case BPL_REL: unimplemented_instruction(state); break;
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case BVC_REL: unimplemented_instruction(state); break;
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case BVS_REL: unimplemented_instruction(state); break;
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case BIT_ZP: BIT(state, get_byte_zero_page(state)); break;
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case BIT_ABS: BIT(state, get_byte_absolute(state)); break;
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case BRK: state->running = 0;
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state->flags.b = 1;
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break; //BRK
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case CLC: state->flags.c = 0; break;
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case CLD: state->flags.d = 0; break;
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case CLI: state->flags.i = 0; break;
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case CLV: state->flags.v = 0; break;
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case NOP: break; //NOP
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case PHA: push_byte_to_stack(state, state->a); break; //push accumulator to stack
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case PLA: state->a = pop_byte_from_stack(state); break; //pull accumulator from stack
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case PHP: {
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byte flags_value;
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memcpy(&flags_value, &state->flags, sizeof(Flags));
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push_byte_to_stack(state, flags_value);
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break; //push processor status
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}
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case PLP: {
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byte value = pop_byte_from_stack(state);
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memset(&state->flags, value, 1);
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break;
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}//pull procesor status
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case RTI: unimplemented_instruction(state); break;
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case RTS: RTS_(state); break;
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case SEC: state->flags.c = 1; break;
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case SED: state->flags.d = 1; break;
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case SEI: state->flags.i = 1; break;
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case TAX: state->x = state->a; set_NZ_flags(state, state->x); break;
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case TXA: state->a = state->x; set_NZ_flags(state, state->a); break;
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case TAY: state->y = state->a; set_NZ_flags(state, state->y); break;
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case TYA: state->a = state->y; set_NZ_flags(state, state->a); break;
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case TSX: state->x = state->sp; set_NZ_flags(state, state->x); break;
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case TXS: state->sp = state->x; set_NZ_flags(state, state->x); break;
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case CMP_IMM: CMP(state, pop_byte(state)); break; //TODO test
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case CMP_ZP: CMP(state, get_byte_zero_page(state)); break; //TODO test
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case CMP_ZPX: CMP(state, get_byte_zero_page_x(state)); break; //TODO test
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case CMP_ABS: CMP(state, get_byte_absolute(state)); break;
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case CMP_ABSX: CMP(state, get_byte_absolute_x(state)); break;//TODO test
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case CMP_ABSY: CMP(state, get_byte_absolute_y(state)); break;//TODO test
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case CMP_INDX: CMP(state, get_byte_indirect_x(state)); break;//TODO test
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case CMP_INDY: CMP(state, get_byte_indirect_y(state)); break;//TODO test
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case CPX_IMM: CPX(state, pop_byte(state)); break;//TODO test
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case CPX_ZP: CPX(state, get_byte_zero_page(state)); break;//TODO test
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case CPX_ABS: CPX(state, get_byte_absolute(state)); break;//TODO test
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case CPY_IMM: CPY(state, pop_byte(state)); break;//TODO test
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case CPY_ZP: CPY(state, get_byte_zero_page(state)); break;//TODO test
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case CPY_ABS: CPY(state, get_byte_absolute(state)); break;//TODO test
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case DEC_ZP: DEC(state, get_address_zero_page(state)); break;
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case DEC_ZPX: DEC(state, get_address_zero_page_x(state)); break;
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case DEC_ABS: DEC(state, get_address_absolute(state)); break;
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case DEC_ABSX: DEC(state, get_address_absolute_x(state)); break;
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case DEX: state->x -= 1; set_NZ_flags(state, state->x); break;
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case DEY: state->y -= 1; set_NZ_flags(state, state->y); break;
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case INX: state->x += 1; set_NZ_flags(state, state->x); break;
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case INY: state->y += 1; set_NZ_flags(state, state->y); break;
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case EOR_IMM: EOR(state, pop_byte(state)); break;
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case EOR_ZP: EOR(state, get_byte_zero_page(state)); break;
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case EOR_ZPX: EOR(state, get_byte_zero_page_x(state)); break;
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case EOR_ABS: EOR(state, get_byte_absolute(state)); break;
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case EOR_ABSX: EOR(state, get_byte_absolute_x(state)); break;
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case EOR_ABSY: EOR(state, get_byte_absolute_y(state)); break;
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case EOR_INDX: EOR(state, get_byte_indirect_x(state)); break;
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case EOR_INDY: EOR(state, get_byte_indirect_y(state)); break;
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case INC_ZP: INC(state, get_address_zero_page(state)); break;
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case INC_ZPX: INC(state, get_address_zero_page_x(state)); break;
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case INC_ABS: INC(state, get_address_absolute(state)); break;
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case INC_ABSX: INC(state, get_address_absolute_x(state)); break;
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case JMP_ABS: JMP(state, get_address_absolute(state)); break;
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case JMP_IND: JMP(state, get_address_indirect_jmp(state)); break;
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case JSR_ABS: JSR(state, get_address_absolute(state)); break;
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case LDA_IMM: LDA(state, pop_byte(state)); break;
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case LDA_ZP: LDA(state, get_byte_zero_page(state)); break;
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case LDA_ZPX: LDA(state, get_byte_zero_page_x(state)); break;
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case LDA_ABS: LDA(state, get_byte_absolute(state)); break;
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case LDA_ABSX: LDA(state, get_byte_absolute_x(state)); break;
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case LDA_ABSY: LDA(state, get_byte_absolute_y(state)); break;
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case LDA_INDX: LDA(state, get_byte_indirect_x(state)); break;
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case LDA_INDY: LDA(state, get_byte_indirect_y(state)); break;
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case LDX_IMM: LDX(state, pop_byte(state)); break;
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case LDX_ZP: LDX(state, get_byte_zero_page(state)); break;
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case LDX_ZPY: LDX(state, get_byte_zero_page_y(state)); break;
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case LDX_ABS: LDX(state, get_byte_absolute(state)); break;
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case LDX_ABSY: LDX(state, get_byte_absolute_y(state)); break;
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case LDY_IMM: LDY(state, pop_byte(state)); break;
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case LDY_ZP: LDY(state, get_byte_zero_page(state)); break;
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case LDY_ZPX: LDY(state, get_byte_zero_page_x(state)); break;
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case LDY_ABS: LDY(state, get_byte_absolute(state)); break;
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case LDY_ABSX: LDY(state, get_byte_absolute_x(state)); break;
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case LSR_ACC: LSR_A(state); break;
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case LSR_ZP: LSR_MEM(state, get_address_zero_page(state)); break;
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case LSR_ZPX: LSR_MEM(state, get_address_zero_page_x(state)); break;
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case LSR_ABS: LSR_MEM(state, get_address_absolute(state)); break;
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|
case LSR_ABSX: LSR_MEM(state, get_address_absolute_x(state)); break;
|
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case ORA_IMM: ORA(state, pop_byte(state)); break;
|
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case ORA_ZP: ORA(state, get_byte_zero_page(state)); break;
|
|
case ORA_ZPX: ORA(state, get_byte_zero_page_x(state)); break;
|
|
case ORA_ABS: ORA(state, get_byte_absolute(state)); break;
|
|
case ORA_ABSX: ORA(state, get_byte_absolute_x(state)); break;
|
|
case ORA_ABSY: ORA(state, get_byte_absolute_y(state)); break;
|
|
case ORA_INDX: ORA(state, get_byte_indirect_x(state)); break;
|
|
case ORA_INDY: ORA(state, get_byte_indirect_y(state)); break;
|
|
case ROL_ACC: ROL_A(state); break;
|
|
case ROL_ZP: ROL_MEM(state, get_address_zero_page(state)); break;
|
|
case ROL_ZPX: ROL_MEM(state, get_address_zero_page_x(state)); break;
|
|
case ROL_ABS: ROL_MEM(state, get_address_absolute(state)); break;
|
|
case ROL_ABSX: ROL_MEM(state, get_address_absolute_x(state)); break;
|
|
case ROR_ACC: ROR_A(state); break;
|
|
case ROR_ZP: ROR_MEM(state, get_address_zero_page(state)); break;
|
|
case ROR_ZPX: ROR_MEM(state, get_address_zero_page_x(state)); break;
|
|
case ROR_ABS: ROR_MEM(state, get_address_absolute(state)); break;
|
|
case ROR_ABSX: ROR_MEM(state, get_address_absolute_x(state)); break;
|
|
case SBC_IMM: SBC(state, pop_byte(state)); break;
|
|
case SBC_ZP: SBC(state, get_byte_zero_page(state)); break;
|
|
case SBC_ZPX: SBC(state, get_byte_zero_page_x(state)); break;
|
|
case SBC_ABS: SBC(state, get_byte_absolute(state)); break;
|
|
case SBC_ABSX: SBC(state, get_byte_absolute_x(state)); break;
|
|
case SBC_ABSY: SBC(state, get_byte_absolute_y(state)); break;
|
|
case SBC_INDX: SBC(state, get_byte_indirect_x(state)); break;
|
|
case SBC_INDY: SBC(state, get_byte_indirect_y(state)); break;
|
|
case STA_ZP: STA(state, get_address_zero_page(state)); break;
|
|
case STA_ZPX: STA(state, get_address_zero_page_x(state)); break;
|
|
case STA_ABS: STA(state, get_address_absolute(state)); break;
|
|
case STA_ABSX: STA(state, get_address_absolute_x(state)); break;
|
|
case STA_ABSY: STA(state, get_address_absolute_y(state)); break;
|
|
case STA_INDX: STA(state, get_address_indirect_x(state)); break;
|
|
case STA_INDY: STA(state, get_address_indirect_y(state)); break;
|
|
case STX_ZP: STX(state, get_address_zero_page(state)); break;
|
|
case STX_ZPY: STX(state, get_address_zero_page_y(state)); break;
|
|
case STX_ABS: STX(state, get_address_absolute(state)); break;
|
|
case STY_ZP: STY(state, get_address_zero_page(state)); break;
|
|
case STY_ZPX: STY(state, get_address_zero_page_x(state)); break;
|
|
case STY_ABS: STY(state, get_address_absolute(state)); break;
|
|
|
|
default:
|
|
unimplemented_instruction(state); break;
|
|
}
|
|
return 0;
|
|
} |