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Commit Graph

580 Commits

Author SHA1 Message Date
Peter Evans
4558e62adc Use the correct name for the quit command function 2018-02-26 20:46:19 -06:00
Peter Evans
26e2abe745 Test that ASL sets carry 2018-02-26 20:33:52 -06:00
Peter Evans
724dbb1577 Add test to ensure decimal mode is respected for SBC 2018-02-26 20:33:33 -06:00
Peter Evans
0333e308e7 Test decimal mode with ADC 2018-02-26 20:02:58 -06:00
Peter Evans
30c07df9cb When carry is set, subtract one fewer, not one more
A subtle misunderstanding... which led to bizarre and unexpected
behavior elsewhere.
2018-02-26 18:59:25 -06:00
Peter Evans
4b4e58089b Add missing function decls 2018-02-26 18:53:59 -06:00
Peter Evans
d1a6441c5a Add missing tests for vm_debug.c 2018-02-26 14:25:02 -06:00
Peter Evans
fec8ef0743 Allow $XX hex notation 2018-02-26 14:21:20 -06:00
Peter Evans
5bb76164dc Add missing docblocks for vm_debug.c 2018-02-26 14:10:16 -06:00
Peter Evans
1cec80cead Don't immediately pause 2018-02-26 13:54:32 -06:00
Peter Evans
f376f00688 Fix scan test not to rely on buggy operand output 2018-02-25 16:16:14 -06:00
Peter Evans
7b3b30a0f2 Use addr2 for ws tests
I take it back from the previous commit--the test was written with an
assumption that was not how execute() works
2018-02-25 16:14:05 -06:00
Peter Evans
7ad0ad8024 Unbreak current PC in resume; use addr2 in writestate
(Addr1 never worked, so ws was essentially non-functional in practice,
but it passes its tests when you assume execute() does the right thing!)
2018-02-25 16:12:15 -06:00
Peter Evans
aa53fdd77e Erase strings before we print anything else
If you print something without an operand, you may end up printing the
last instruction's operand unless you do that wipe
2018-02-25 16:06:27 -06:00
Peter Evans
67c7790a1a Show current opcode 2018-02-25 15:52:37 -06:00
Peter Evans
e50fda62be Add step command 2018-02-25 15:41:37 -06:00
Peter Evans
01f230dc85 Add unbreak command, unbreak_all() function for testing 2018-02-25 14:38:24 -06:00
Peter Evans
c17616c383 Execute will no longer run if PC is at a breakpoint 2018-02-25 14:27:47 -06:00
Peter Evans
588362abee Add prompt; quit command; breakpoints 2018-02-25 14:25:02 -06:00
Peter Evans
d4891a3fbf No, really, add the writeaddr command 2018-02-24 19:38:55 -06:00
Peter Evans
09f7152e07 Add writeaddr command 2018-02-24 19:38:04 -06:00
Peter Evans
06bf63ecb2 Add jump debug command 2018-02-24 19:36:02 -06:00
Peter Evans
1be1abc0af Add printaddr, printstate 2018-02-24 18:57:00 -06:00
Peter Evans
ec253905ad Add resume command, finder function, arg parser, execute 2018-02-24 16:30:46 -06:00
Peter Evans
a614c1e5df Add new file, vm_debug.c, and help command for it 2018-02-23 21:58:30 -06:00
Peter Evans
ac5d532a7f Fix length bug with s_bytes (one too short)
This also fixes tests for disassembly so that they account for changed
output. Finally this also exits if we have to perror in the setup
function.
2018-02-23 21:35:53 -06:00
Peter Evans
395ac4a841 Disassembler now outputs more idiomatic code
It also no longer prints out register and address state
2018-02-23 20:46:24 -06:00
Peter Evans
0d1e22a348 Add support for decimal mode ADC/SBC.
This also corrects a bug where SBC set carry incorrectly in binary mode.
2018-02-23 00:46:07 -06:00
Peter Evans
2669460c6d Resolve potential bad dereference on sectab 2018-02-22 14:11:54 -06:00
Peter Evans
bee2a0e86a Add missing docblocks for NP2 and NP3 2018-02-22 14:10:19 -06:00
Peter Evans
978ad1faaf Formerly "BAD" instructions are now forms of NOPs
But weird forms. In most cases they basically are NOPs, except with
different opcodes. In other cases, we call them NP2 and NP3s, and do so
because they consume 2 or 3 bytes respectively (vs. just 1 with NOP).

We had to teach some arcane magic to the emulator for this to work. We
may want to refactor to decouple the number of bytes consumed from the
address mode.
2018-02-22 14:07:05 -06:00
Peter Evans
691387894a ASL, LSR, ROL, ROR in ABX now consume only 6 cycles
(Down from 7 cycles.)
2018-02-22 13:45:36 -06:00
Peter Evans
e35ff91fa7 Clear the decimal bit in BRK; also improve test logic for BRK 2018-02-22 13:44:13 -06:00
Peter Evans
90892c32e4 Add TSB (Test and Set Bits) instruction
This commit also moves the TRB code from loadstor to bits, which is
where it should have been all along.
2018-02-22 13:39:48 -06:00
Peter Evans
a4c3d1c4ef Implement the TRB (Test and Reset Bits) instruction 2018-02-22 00:39:33 -06:00
Peter Evans
807362e871 Add STZ instruction (to store zero) 2018-02-22 00:02:57 -06:00
Peter Evans
7363547608 Add PHX/Y and PLX/Y to the opcode, addr mode, cycle tables 2018-02-21 23:35:36 -06:00
Peter Evans
8e1ab0e950 Add support for PHX, PHY, PLX, PLY
These instructions allow you to push and pull (pop) the X and Y
registers via the stack.
2018-02-21 23:32:57 -06:00
Peter Evans
f9a277e7bc Add new Branch Always instruction 2018-02-21 21:57:21 -06:00
Peter Evans
58a1e31f58 Allow JMP to work with ABX address mode 2018-02-21 21:46:41 -06:00
Peter Evans
8623945bbf Add the ability to INC or DEC the accumulator
This is an oversight from the 6502 processor that was rectified in the
65c02 model.
2018-02-21 21:20:05 -06:00
Peter Evans
7b65dc1657 Add new BIM instruction (BIt imMediate mode)
This is not a real instruction in the 65c02 processor; I invented it for
the sole purpose of handling the specialized logic that is performed by
BIT in IMM mode. To be fair--I can imagine this really _was_ implemented
as a "separate" instruction on the chip! But I don't know that for sure.
2018-02-21 21:01:46 -06:00
Peter Evans
5ba5f91442 Add new address modes for BIT 2018-02-21 20:46:28 -06:00
Peter Evans
e1f11fc266 Add cycle counts 2018-02-21 20:43:04 -06:00
Peter Evans
739451366f Add zero-page instructions 2018-02-21 20:42:05 -06:00
Peter Evans
48872cf8d1 Add docblock comment for apple2_dd_sector_num 2018-02-21 11:23:25 -06:00
Peter Evans
61eb880f49 Refactor code to pass image type in 2018-02-21 00:23:12 -06:00
Peter Evans
8706a81d1f Remove spurious printf 2018-02-20 15:55:40 -06:00
Peter Evans
1091ec6e2a Pass image type into enc_dos; use sector_num instead of a table pointer 2018-02-20 15:36:23 -06:00
Peter Evans
c2e90651ac Again, latch data must be > 128 (0x80) 2018-02-20 14:44:17 -06:00