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Commit Graph

10 Commits

Author SHA1 Message Date
Peter Evans
7b65dc1657 Add new BIM instruction (BIt imMediate mode)
This is not a real instruction in the 65c02 processor; I invented it for
the sole purpose of handling the specialized logic that is performed by
BIT in IMM mode. To be fair--I can imagine this really _was_ implemented
as a "separate" instruction on the chip! But I don't know that for sure.
2018-02-21 21:01:46 -06:00
Peter Evans
2318b1917a This form needs two RORs to work
That's because the first ROR pushes the 1 in bit0 into the carry bit;
the second moves the carry bit into the bit7 position, which will match
128.
2018-02-19 22:01:30 -06:00
Peter Evans
d590a809d8 Tests should reflect how carry is handled in ROL/R now 2018-02-19 21:59:55 -06:00
Peter Evans
0b03fd24f5 Carry must also be factored in 2018-01-23 20:26:01 -06:00
Peter Evans
7d6886a3a8 Change last_addr field to eff_addr 2018-01-12 13:57:48 -06:00
Peter Evans
8d9b48912e Add memory injection to 6502; main memory in apple2
Note that memory _is_ now managed in apple2, and _not_ in mos6502.
2018-01-10 21:28:05 -06:00
Peter Evans
1de1e7788a Rename status flags to MOS_ 2018-01-05 14:18:39 -06:00
Peter Evans
96b2542ea6 CARRY should be set if oper > 0
This error became apparent once we added the missing modify_status
function to some instructions.
2017-12-09 14:47:49 -06:00
Peter Evans
00ff9f069d Vastly simplify unit tests for mos6502
Criterion's init and fini config options allow us to register setup and
teardown functions. We now use this to register the common cpu variable
for the mos6502 tests, albeit through the use of a global variable.

Doing so necessitated that each of the different test files have their
own suites, due to some implementation details in Criterion, but this is
No Big Deal.
2017-12-06 15:57:15 -06:00
Peter Evans
87de0a877a Add all our tests, plus other fixes 2017-12-03 20:19:17 -06:00