mirror of https://github.com/ariejan/i6502.git
Update Memory interface
Because io.Reader and io.Writer already claim the functions Read and Write it was necessary to rename the Memory interface methods Read and Write to ReadByte and WriteByte.
This commit is contained in:
parent
099d6c11bd
commit
da43c2bca1
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@ -62,13 +62,13 @@ Read an 8-bit value from Memory attached at the 16-bit address.
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This will panic if you try to read from an address that has no Memory attached.
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This will panic if you try to read from an address that has no Memory attached.
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*/
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*/
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func (a *AddressBus) Read(address uint16) byte {
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func (a *AddressBus) ReadByte(address uint16) byte {
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addressable, err := a.addressableForAddress(address)
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addressable, err := a.addressableForAddress(address)
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if err != nil {
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if err != nil {
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panic(err)
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panic(err)
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}
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}
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return addressable.memory.Read(address - addressable.start)
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return addressable.memory.ReadByte(address - addressable.start)
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}
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}
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/*
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/*
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@ -77,8 +77,8 @@ Convenience method to quickly read a 16-bit value from address and address + 1.
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Note that we first read the LOW byte from address and then the HIGH byte from address + 1.
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Note that we first read the LOW byte from address and then the HIGH byte from address + 1.
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*/
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*/
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func (a *AddressBus) Read16(address uint16) uint16 {
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func (a *AddressBus) Read16(address uint16) uint16 {
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lo := uint16(a.Read(address))
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lo := uint16(a.ReadByte(address))
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hi := uint16(a.Read(address + 1))
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hi := uint16(a.ReadByte(address + 1))
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return (hi << 8) | lo
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return (hi << 8) | lo
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}
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}
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@ -89,13 +89,13 @@ Write an 8-bit value to the Memory at the 16-bit address.
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This will panic if you try to write to an address that has no Memory attached or
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This will panic if you try to write to an address that has no Memory attached or
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Memory that is read-only, like Rom.
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Memory that is read-only, like Rom.
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*/
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*/
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func (a *AddressBus) Write(address uint16, data byte) {
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func (a *AddressBus) WriteByte(address uint16, data byte) {
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addressable, err := a.addressableForAddress(address)
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addressable, err := a.addressableForAddress(address)
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if err != nil {
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if err != nil {
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panic(err)
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panic(err)
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}
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}
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addressable.memory.Write(address-addressable.start, data)
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addressable.memory.WriteByte(address-addressable.start, data)
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}
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}
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/*
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/*
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@ -104,8 +104,8 @@ Convenience method to quickly write a 16-bit value to address and address + 1.
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Note that the LOW byte will be stored in address and the high byte in address + 1.
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Note that the LOW byte will be stored in address and the high byte in address + 1.
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*/
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*/
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func (a *AddressBus) Write16(address uint16, data uint16) {
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func (a *AddressBus) Write16(address uint16, data uint16) {
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a.Write(address, byte(data))
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a.WriteByte(address, byte(data))
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a.Write(address+1, byte(data>>8))
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a.WriteByte(address+1, byte(data>>8))
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}
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}
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// Returns the addressable for the specified address, or an error if no addressable exists.
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// Returns the addressable for the specified address, or an error if no addressable exists.
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@ -1,8 +1,9 @@
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package i6502
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package i6502
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import (
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import (
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"github.com/stretchr/testify/assert"
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"testing"
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"testing"
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"github.com/stretchr/testify/assert"
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)
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)
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func TestEmptyAddressBus(t *testing.T) {
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func TestEmptyAddressBus(t *testing.T) {
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@ -37,29 +38,29 @@ func TestBusReadWrite(t *testing.T) {
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bus.Attach(ram2, 0x8000)
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bus.Attach(ram2, 0x8000)
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// 8-bit Writing
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// 8-bit Writing
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bus.Write(0x1234, 0xFA)
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bus.WriteByte(0x1234, 0xFA)
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assert.Equal(0xFA, ram.Read(0x1234))
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assert.Equal(0xFA, ram.ReadByte(0x1234))
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// 16-bit Writing
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// 16-bit Writing
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bus.Write16(0x1000, 0xAB42)
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bus.Write16(0x1000, 0xAB42)
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assert.Equal(0x42, ram.Read(0x1000))
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assert.Equal(0x42, ram.ReadByte(0x1000))
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assert.Equal(0xAB, ram.Read(0x1001))
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assert.Equal(0xAB, ram.ReadByte(0x1001))
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// 8-bit Reading
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// 8-bit Reading
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ram.Write(0x5522, 0xDA)
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ram.WriteByte(0x5522, 0xDA)
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assert.Equal(0xDA, bus.Read(0x5522))
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assert.Equal(0xDA, bus.ReadByte(0x5522))
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// 16-bit Reading
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// 16-bit Reading
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ram.Write(0x4440, 0x7F)
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ram.WriteByte(0x4440, 0x7F)
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ram.Write(0x4441, 0x56)
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ram.WriteByte(0x4441, 0x56)
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assert.Equal(0x567F, bus.Read16(0x4440))
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assert.Equal(0x567F, bus.Read16(0x4440))
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//// Test addressing memory not mounted at 0x0000
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//// Test addressing memory not mounted at 0x0000
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// Read from relative addressable Ram2: $C123
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// Read from relative addressable Ram2: $C123
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ram2.Write(0x4123, 0xEF)
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ram2.WriteByte(0x4123, 0xEF)
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assert.Equal(0xEF, bus.Read(0xC123))
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assert.Equal(0xEF, bus.ReadByte(0xC123))
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bus.Write(0x8001, 0x12)
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bus.WriteByte(0x8001, 0x12)
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assert.Equal(0x12, ram2.Read(0x0001))
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assert.Equal(0x12, ram2.ReadByte(0x0001))
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}
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}
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44
cpu.go
44
cpu.go
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@ -90,7 +90,7 @@ func (c *Cpu) handleIrq(PC uint16) {
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// and point the Program Counter to the beginning of the program.
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// and point the Program Counter to the beginning of the program.
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func (c *Cpu) LoadProgram(data []byte, location uint16) {
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func (c *Cpu) LoadProgram(data []byte, location uint16) {
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for i, b := range data {
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for i, b := range data {
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c.Bus.Write(location+uint16(i), b)
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c.Bus.WriteByte(location+uint16(i), b)
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}
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}
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c.PC = location
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c.PC = location
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@ -158,13 +158,13 @@ func (c *Cpu) execute(instruction Instruction) {
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c.setA(c.A ^ value)
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c.setA(c.A ^ value)
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case sta:
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case sta:
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address := c.memoryAddress(instruction)
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address := c.memoryAddress(instruction)
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c.Bus.Write(address, c.A)
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c.Bus.WriteByte(address, c.A)
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case stx:
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case stx:
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address := c.memoryAddress(instruction)
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address := c.memoryAddress(instruction)
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c.Bus.Write(address, c.X)
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c.Bus.WriteByte(address, c.X)
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case sty:
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case sty:
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address := c.memoryAddress(instruction)
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address := c.memoryAddress(instruction)
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c.Bus.Write(address, c.Y)
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c.Bus.WriteByte(address, c.Y)
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case tax:
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case tax:
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c.setX(c.A)
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c.setX(c.A)
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case tay:
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case tay:
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@ -264,7 +264,7 @@ func (c *Cpu) execute(instruction Instruction) {
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func (c *Cpu) readNextInstruction() Instruction {
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func (c *Cpu) readNextInstruction() Instruction {
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// Read the opcode
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// Read the opcode
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opcode := c.Bus.Read(c.PC)
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opcode := c.Bus.ReadByte(c.PC)
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optype, ok := opTypes[opcode]
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optype, ok := opTypes[opcode]
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if !ok {
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if !ok {
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@ -275,7 +275,7 @@ func (c *Cpu) readNextInstruction() Instruction {
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switch instruction.Size {
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switch instruction.Size {
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case 1: // Zero operand instruction
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case 1: // Zero operand instruction
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case 2: // 8-bit operand
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case 2: // 8-bit operand
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instruction.Op8 = c.Bus.Read(c.PC + 1)
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instruction.Op8 = c.Bus.ReadByte(c.PC + 1)
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case 3: // 16-bit operand
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case 3: // 16-bit operand
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instruction.Op16 = c.Bus.Read16(c.PC + 1)
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instruction.Op16 = c.Bus.Read16(c.PC + 1)
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}
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}
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@ -297,7 +297,7 @@ func (c *Cpu) resolveOperand(in Instruction) uint8 {
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case immediate:
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case immediate:
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return in.Op8
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return in.Op8
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default:
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default:
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return c.Bus.Read(c.memoryAddress(in))
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return c.Bus.ReadByte(c.memoryAddress(in))
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}
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}
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}
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}
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@ -356,17 +356,17 @@ func (c *Cpu) sbc(in Instruction) {
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func (c *Cpu) inc(in Instruction) {
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func (c *Cpu) inc(in Instruction) {
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address := c.memoryAddress(in)
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address := c.memoryAddress(in)
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value := c.Bus.Read(address) + 1
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value := c.Bus.ReadByte(address) + 1
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c.Bus.Write(address, value)
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c.Bus.WriteByte(address, value)
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c.setArithmeticFlags(value)
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c.setArithmeticFlags(value)
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}
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}
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func (c *Cpu) dec(in Instruction) {
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func (c *Cpu) dec(in Instruction) {
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address := c.memoryAddress(in)
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address := c.memoryAddress(in)
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value := c.Bus.Read(address) - 1
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value := c.Bus.ReadByte(address) - 1
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c.Bus.Write(address, value)
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c.Bus.WriteByte(address, value)
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c.setArithmeticFlags(value)
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c.setArithmeticFlags(value)
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}
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}
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@ -378,10 +378,10 @@ func (c *Cpu) asl(in Instruction) {
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c.setArithmeticFlags(c.A)
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c.setArithmeticFlags(c.A)
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default:
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default:
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address := c.memoryAddress(in)
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address := c.memoryAddress(in)
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value := c.Bus.Read(address)
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value := c.Bus.ReadByte(address)
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c.setCarry((value >> 7) == 1)
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c.setCarry((value >> 7) == 1)
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value <<= 1
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value <<= 1
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c.Bus.Write(address, value)
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c.Bus.WriteByte(address, value)
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c.setArithmeticFlags(value)
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c.setArithmeticFlags(value)
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}
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}
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}
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}
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@ -394,10 +394,10 @@ func (c *Cpu) lsr(in Instruction) {
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c.setArithmeticFlags(c.A)
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c.setArithmeticFlags(c.A)
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default:
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default:
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address := c.memoryAddress(in)
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address := c.memoryAddress(in)
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value := c.Bus.Read(address)
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value := c.Bus.ReadByte(address)
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c.setCarry((value & 0x01) == 1)
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c.setCarry((value & 0x01) == 1)
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value >>= 1
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value >>= 1
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c.Bus.Write(address, value)
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c.Bus.WriteByte(address, value)
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c.setArithmeticFlags(value)
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c.setArithmeticFlags(value)
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}
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}
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}
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}
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@ -412,10 +412,10 @@ func (c *Cpu) rol(in Instruction) {
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c.setArithmeticFlags(c.A)
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c.setArithmeticFlags(c.A)
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default:
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default:
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address := c.memoryAddress(in)
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address := c.memoryAddress(in)
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value := c.Bus.Read(address)
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value := c.Bus.ReadByte(address)
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c.setCarry((value & 0x80) != 0)
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c.setCarry((value & 0x80) != 0)
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value = value<<1 | carry
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value = value<<1 | carry
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c.Bus.Write(address, value)
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c.Bus.WriteByte(address, value)
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c.setArithmeticFlags(value)
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c.setArithmeticFlags(value)
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}
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}
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}
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}
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@ -430,10 +430,10 @@ func (c *Cpu) ror(in Instruction) {
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c.setArithmeticFlags(c.A)
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c.setArithmeticFlags(c.A)
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default:
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default:
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address := c.memoryAddress(in)
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address := c.memoryAddress(in)
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value := c.Bus.Read(address)
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value := c.Bus.ReadByte(address)
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c.setCarry(value&0x01 == 1)
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c.setCarry(value&0x01 == 1)
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value = value>>1 | carry<<7
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value = value>>1 | carry<<7
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c.Bus.Write(address, value)
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c.Bus.WriteByte(address, value)
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c.setArithmeticFlags(value)
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c.setArithmeticFlags(value)
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}
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}
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}
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}
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@ -513,15 +513,15 @@ func (c *Cpu) sbcDecimal(a uint8, b uint8, carryIn uint8) {
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}
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}
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func (c *Cpu) stackPush(data byte) {
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func (c *Cpu) stackPush(data byte) {
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c.Bus.Write(StackBase+uint16(c.SP), data)
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c.Bus.WriteByte(StackBase+uint16(c.SP), data)
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c.SP -= 1
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c.SP -= 1
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}
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}
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func (c *Cpu) stackPeek() byte {
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func (c *Cpu) stackPeek() byte {
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return c.Bus.Read(StackBase + uint16(c.SP+1))
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return c.Bus.ReadByte(StackBase + uint16(c.SP+1))
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}
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}
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func (c *Cpu) stackPop() byte {
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func (c *Cpu) stackPop() byte {
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c.SP += 1
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c.SP += 1
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return c.Bus.Read(StackBase + uint16(c.SP))
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return c.Bus.ReadByte(StackBase + uint16(c.SP))
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}
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}
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341
cpu_test.go
341
cpu_test.go
File diff suppressed because it is too large
Load Diff
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@ -6,6 +6,6 @@ and become accessible by the Cpu.
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*/
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*/
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type Memory interface {
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type Memory interface {
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Size() uint16
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Size() uint16
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Read(address uint16) byte
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ReadByte(address uint16) byte
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Write(address uint16, data byte)
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WriteByte(address uint16, data byte)
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}
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}
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4
ram.go
4
ram.go
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@ -16,10 +16,10 @@ func (r *Ram) Size() uint16 {
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return uint16(len(r.data))
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return uint16(len(r.data))
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}
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}
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func (r *Ram) Read(address uint16) byte {
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func (r *Ram) ReadByte(address uint16) byte {
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return r.data[address]
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return r.data[address]
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}
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}
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func (r *Ram) Write(address uint16, data byte) {
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func (r *Ram) WriteByte(address uint16, data byte) {
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r.data[address] = data
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r.data[address] = data
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}
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}
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@ -1,8 +1,9 @@
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package i6502
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package i6502
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import (
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import (
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"github.com/stretchr/testify/assert"
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"testing"
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"testing"
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"github.com/stretchr/testify/assert"
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)
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)
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func TestRamSize(t *testing.T) {
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func TestRamSize(t *testing.T) {
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@ -18,6 +19,6 @@ func TestRamReadWrite(t *testing.T) {
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assert.Equal(t, 0x00, ram.data[i])
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assert.Equal(t, 0x00, ram.data[i])
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}
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}
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ram.Write(0x1000, 0x42)
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ram.WriteByte(0x1000, 0x42)
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assert.Equal(t, 0x42, ram.Read(0x1000))
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assert.Equal(t, 0x42, ram.ReadByte(0x1000))
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}
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}
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