mirror of
https://gitlab.com/camelot/kickc.git
synced 2024-11-25 05:33:29 +00:00
Updated KickAsm with newest version of 45GS02 CPU. Now all opcodes match between KickC and KickAsm.
This commit is contained in:
parent
462c05552d
commit
0f7061bcf0
@ -1,13 +1,13 @@
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<component name="libraryTable">
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<library name="Maven: cml.kickass:kickassembler:5.16-65ce02.e">
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<library name="Maven: cml.kickass:kickassembler:5.16-65ce02.g">
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<CLASSES>
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<root url="jar://$MAVEN_REPOSITORY$/cml/kickass/kickassembler/5.16-65ce02.e/kickassembler-5.16-65ce02.e.jar!/" />
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<root url="jar://$MAVEN_REPOSITORY$/cml/kickass/kickassembler/5.16-65ce02.g/kickassembler-5.16-65ce02.g.jar!/" />
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</CLASSES>
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<JAVADOC>
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<root url="jar://$MAVEN_REPOSITORY$/cml/kickass/kickassembler/5.16-65ce02.e/kickassembler-5.16-65ce02.e-javadoc.jar!/" />
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<root url="jar://$MAVEN_REPOSITORY$/cml/kickass/kickassembler/5.16-65ce02.g/kickassembler-5.16-65ce02.g-javadoc.jar!/" />
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</JAVADOC>
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<SOURCES>
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<root url="jar://$MAVEN_REPOSITORY$/cml/kickass/kickassembler/5.16-65ce02.e/kickassembler-5.16-65ce02.e-sources.jar!/" />
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<root url="jar://$MAVEN_REPOSITORY$/cml/kickass/kickassembler/5.16-65ce02.g/kickassembler-5.16-65ce02.g-sources.jar!/" />
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</SOURCES>
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</library>
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</component>
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@ -18,7 +18,7 @@
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<orderEntry type="library" name="Maven: org.antlr:antlr4-runtime:4.8-1" level="project" />
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<orderEntry type="library" scope="TEST" name="Maven: junit:junit:4.12" level="project" />
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<orderEntry type="library" scope="TEST" name="Maven: org.hamcrest:hamcrest-core:1.3" level="project" />
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<orderEntry type="library" name="Maven: cml.kickass:kickassembler:5.16-65ce02.e" level="project" />
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<orderEntry type="library" name="Maven: cml.kickass:kickassembler:5.16-65ce02.g" level="project" />
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<orderEntry type="library" name="Maven: info.picocli:picocli:4.2.0" level="project" />
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<orderEntry type="library" name="Maven: javax.json:javax.json-api:1.1.4" level="project" />
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<orderEntry type="library" name="Maven: org.glassfish:javax.json:1.1.4" level="project" />
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2
pom.xml
2
pom.xml
@ -44,7 +44,7 @@
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<dependency>
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<groupId>cml.kickass</groupId>
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<artifactId>kickassembler</artifactId>
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<version>5.16-65ce02.e</version>
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<version>5.16-65ce02.g</version>
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</dependency>
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<dependency>
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<groupId>info.picocli</groupId>
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@ -0,0 +1,4 @@
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#NOTE: This is a Maven Resolver internal implementation file, its format can be changed without prior notice.
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#Fri Jul 31 01:27:42 CEST 2020
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kickassembler-5.16-65ce02.f.pom>=
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kickassembler-5.16-65ce02.f.jar>=
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8f2fc839572e172aa68bd32ba103ebb4
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08d00ab1a17b81e03b5a22acaa9e6f53713d37a1
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@ -0,0 +1,9 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<project xsi:schemaLocation="http://maven.apache.org/POM/4.0.0 https://maven.apache.org/xsd/maven-4.0.0.xsd" xmlns="http://maven.apache.org/POM/4.0.0"
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xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
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<modelVersion>4.0.0</modelVersion>
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<groupId>cml.kickass</groupId>
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<artifactId>kickassembler</artifactId>
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<version>5.16-65ce02.f</version>
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<description>POM was created from install:install-file</description>
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</project>
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6e6beee8b96c6681c832ed6ffca57967
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@ -0,0 +1 @@
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38826370ac61ebc769df62c5d46cbaab7e10de34
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@ -0,0 +1,4 @@
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#NOTE: This is a Maven Resolver internal implementation file, its format can be changed without prior notice.
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#Fri Jul 31 01:33:28 CEST 2020
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kickassembler-5.16-65ce02.g.pom>=
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kickassembler-5.16-65ce02.g.jar>=
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16f65570e465946f20c6d02cd896df88
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0c1ef7349dbf78c824a7782615fa110b175d23cc
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@ -0,0 +1,9 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<project xsi:schemaLocation="http://maven.apache.org/POM/4.0.0 https://maven.apache.org/xsd/maven-4.0.0.xsd" xmlns="http://maven.apache.org/POM/4.0.0"
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xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
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<modelVersion>4.0.0</modelVersion>
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<groupId>cml.kickass</groupId>
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<artifactId>kickassembler</artifactId>
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<version>5.16-65ce02.g</version>
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<description>POM was created from install:install-file</description>
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</project>
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@ -0,0 +1 @@
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caa1da8b13085baaa9a481e2bd66607e
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@ -0,0 +1 @@
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9819994e0ee59543d951bdb0d82e1646d2588517
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@ -3,7 +3,7 @@
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<groupId>cml.kickass</groupId>
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<artifactId>kickassembler</artifactId>
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<versioning>
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<release>5.16-65ce02.e</release>
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<release>5.16-65ce02.g</release>
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<versions>
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<version>4.19</version>
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<version>5.7</version>
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@ -18,7 +18,9 @@
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<version>5.16-65ce02.c</version>
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<version>5.16-65ce02.d</version>
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<version>5.16-65ce02.e</version>
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<version>5.16-65ce02.f</version>
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<version>5.16-65ce02.g</version>
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</versions>
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<lastUpdated>20200730225045</lastUpdated>
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<lastUpdated>20200730233328</lastUpdated>
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</versioning>
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</metadata>
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@ -1 +1 @@
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50b97bdbdec01718f617ba829a5b7a34
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eb9a688c8421032f2c423c5d756e86c1
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@ -1 +1 @@
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02f4562d6d64f6c5f0d97d8f443bbafc765445da
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9d03b6c6a791a7df649c2a2aa51e03d9f973f1dd
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@ -17,6 +17,7 @@ public class Cpu45GS02 extends Cpu65xx {
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public Cpu45GS02() {
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super(NAME, Cpu65CE02.INSTANCE);
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addOpcode( new int[] {0x42, 0x42, 0x5},"orq",CpuAddressingMode.ZP,8,"AXYZnz");
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addOpcode( new int[] {0x42, 0x42, 0x6},"aslq",CpuAddressingMode.ZP,12,"cnz");
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addOpcode( new int[] {0x42, 0x42, 0xA},"aslq",CpuAddressingMode.NON,3,"AXYZcnz");
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@ -25,7 +26,7 @@ public class Cpu45GS02 extends Cpu65xx {
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addOpcode( new int[] {0x42, 0x42, 0x12},"orq",CpuAddressingMode.INZ,10,"AXYZnz");
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addOpcode( new int[] {0x42, 0x42, 0x16},"aslq",CpuAddressingMode.ZPX,13,"cnz");
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addOpcode( new int[] {0x42, 0x42, 0x1A},"inq",CpuAddressingMode.NON,3,"AXYZnz");
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addOpcode(new int[]{0x42, 0x42, 0x1E}, "aslq", CpuAddressingMode.ABS, 13, "cnz");
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addOpcode( new int[] {0x42, 0x42, 0x1E},"aslq",CpuAddressingMode.ABX,13,"cnz");
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addOpcode( new int[] {0x42, 0x42, 0x24},"bitq",CpuAddressingMode.ZP,8,"cnz");
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addOpcode( new int[] {0x42, 0x42, 0x25},"andq",CpuAddressingMode.ZP,8,"AXYZnz");
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addOpcode( new int[] {0x42, 0x42, 0x26},"rolq",CpuAddressingMode.ZP,12,"cnz");
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@ -36,7 +37,7 @@ public class Cpu45GS02 extends Cpu65xx {
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addOpcode( new int[] {0x42, 0x42, 0x32},"andq",CpuAddressingMode.INZ,10,"AXYZnz");
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addOpcode( new int[] {0x42, 0x42, 0x36},"rolq",CpuAddressingMode.ZPX,12,"cnz");
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addOpcode( new int[] {0x42, 0x42, 0x3A},"deq",CpuAddressingMode.NON,3,"AXYZnz");
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addOpcode(new int[]{0x42, 0x42, 0x3E}, "rolq", CpuAddressingMode.ABS, 13, "cnz");
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addOpcode( new int[] {0x42, 0x42, 0x3E},"rolq",CpuAddressingMode.ABX,13,"cnz");
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addOpcode( new int[] {0x42, 0x42, 0x43},"asrq",CpuAddressingMode.NON,3,"AXYZcnz");
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addOpcode( new int[] {0x42, 0x42, 0x44},"asrq",CpuAddressingMode.ZP,12,"cnz");
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addOpcode( new int[] {0x42, 0x42, 0x45},"eorq",CpuAddressingMode.ZP,8,"AXYZnz");
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@ -47,7 +48,7 @@ public class Cpu45GS02 extends Cpu65xx {
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addOpcode( new int[] {0x42, 0x42, 0x52},"eorq",CpuAddressingMode.INZ,10,"AXYZnz");
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addOpcode( new int[] {0x42, 0x42, 0x54},"asrq",CpuAddressingMode.ZPX,12,"cnz");
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addOpcode( new int[] {0x42, 0x42, 0x56},"lsrq",CpuAddressingMode.ZPX,12,"cnz");
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addOpcode(new int[]{0x42, 0x42, 0x5E}, "lsrq", CpuAddressingMode.ABS, 13, "cnz");
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addOpcode( new int[] {0x42, 0x42, 0x5E},"lsrq",CpuAddressingMode.ABX,13,"cnz");
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addOpcode( new int[] {0x42, 0x42, 0x65},"adcq",CpuAddressingMode.ZP,8,"AXYZcvnz");
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addOpcode( new int[] {0x42, 0x42, 0x66},"rorq",CpuAddressingMode.ZP,12,"cnz");
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addOpcode( new int[] {0x42, 0x42, 0x6A},"rorq",CpuAddressingMode.NON,3,"AXYZcnz");
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@ -55,26 +56,26 @@ public class Cpu45GS02 extends Cpu65xx {
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addOpcode( new int[] {0x42, 0x42, 0x6E},"rorq",CpuAddressingMode.ABS,13,"cnz");
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addOpcode( new int[] {0x42, 0x42, 0x72},"adcq",CpuAddressingMode.INZ,10,"AXYZcvnz");
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addOpcode( new int[] {0x42, 0x42, 0x76},"rorq",CpuAddressingMode.ZPX,12,"cnz");
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addOpcode(new int[]{0x42, 0x42, 0x7E}, "rorq", CpuAddressingMode.ABS, 13, "cnz");
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addOpcode( new int[] {0x42, 0x42, 0x7E},"rorq",CpuAddressingMode.ABX,13,"cnz");
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addOpcode( new int[] {0x42, 0x42, 0x82},"stq",CpuAddressingMode.ISY,10,"");
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addOpcode( new int[] {0x42, 0x42, 0x85},"stq",CpuAddressingMode.ZP,8,"");
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addOpcode( new int[] {0x42, 0x42, 0x8D},"stq",CpuAddressingMode.ABS,9,"");
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addOpcode( new int[] {0x42, 0x42, 0x92},"stq",CpuAddressingMode.INZ,10,"");
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addOpcode(new int[]{0x42, 0x42, 0xA1}, "ldq", CpuAddressingMode.ISY, 10, "AXYZnz");
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addOpcode( new int[] {0x42, 0x42, 0xA1},"ldq",CpuAddressingMode.IZX,10,"AXYZnz");
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addOpcode( new int[] {0x42, 0x42, 0xA5},"ldq",CpuAddressingMode.ZP,8,"AXYZnz");
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addOpcode( new int[] {0x42, 0x42, 0xAD},"ldq",CpuAddressingMode.ABS,9,"AXYZnz");
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addOpcode(new int[]{0x42, 0x42, 0xB1}, "ldq", CpuAddressingMode.INZ, 10, "AXYZnz");
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addOpcode( new int[] {0x42, 0x42, 0xB1},"ldq",CpuAddressingMode.IZY,10,"AXYZnz");
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addOpcode( new int[] {0x42, 0x42, 0xB2},"ldq",CpuAddressingMode.INZ,10,"AXYZnz");
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addOpcode( new int[] {0x42, 0x42, 0xB5},"ldq",CpuAddressingMode.ZPX,9,"AXYZnz");
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addOpcode(new int[]{0x42, 0x42, 0xB9}, "ldq", CpuAddressingMode.ABS, 10, "AXYZnz");
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addOpcode(new int[]{0x42, 0x42, 0xBD}, "ldq", CpuAddressingMode.ABS, 10, "AXYZnz");
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addOpcode( new int[] {0x42, 0x42, 0xB9},"ldq",CpuAddressingMode.ABY,10,"AXYZnz");
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addOpcode( new int[] {0x42, 0x42, 0xBD},"ldq",CpuAddressingMode.ABX,10,"AXYZnz");
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addOpcode( new int[] {0x42, 0x42, 0xC5},"cpq",CpuAddressingMode.ZP,8,"cnz");
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addOpcode( new int[] {0x42, 0x42, 0xC6},"deq",CpuAddressingMode.ZP,12,"nz");
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addOpcode( new int[] {0x42, 0x42, 0xCD},"cpq",CpuAddressingMode.ABS,9,"cnz");
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addOpcode( new int[] {0x42, 0x42, 0xCE},"deq",CpuAddressingMode.ABS,13,"nz");
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addOpcode( new int[] {0x42, 0x42, 0xD2},"cpq",CpuAddressingMode.INZ,10,"cnz");
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addOpcode( new int[] {0x42, 0x42, 0xD6},"deq",CpuAddressingMode.ZPX,12,"nz");
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addOpcode(new int[]{0x42, 0x42, 0xDE}, "deq", CpuAddressingMode.ABS, 13, "nz");
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addOpcode( new int[] {0x42, 0x42, 0xDE},"deq",CpuAddressingMode.ABX,13,"nz");
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addOpcode( new int[] {0x42, 0x42, 0xE2},"ldq",CpuAddressingMode.ISY,10,"AXYZnz");
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addOpcode( new int[] {0x42, 0x42, 0xE5},"sbcq",CpuAddressingMode.ZP,8,"AXYZcvnz");
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addOpcode( new int[] {0x42, 0x42, 0xE6},"inq",CpuAddressingMode.ZP,13,"nz");
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@ -90,7 +91,7 @@ public class Cpu45GS02 extends Cpu65xx {
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addOpcode( new int[] {0x42, 0x42, 0xEE},"inq",CpuAddressingMode.ABS,14,"nz");
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addOpcode( new int[] {0x42, 0x42, 0xF2},"sbcq",CpuAddressingMode.INZ,10,"AXYZcvnz");
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addOpcode( new int[] {0x42, 0x42, 0xF6},"inq",CpuAddressingMode.ZPX,13,"nz");
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addOpcode(new int[]{0x42, 0x42, 0xFE}, "inq", CpuAddressingMode.ABS, 14, "nz");
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addOpcode( new int[] {0x42, 0x42, 0xFE},"inq",CpuAddressingMode.ABX,14,"nz");
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addOpcode( new int[] {0xea, 0x12},"ora",CpuAddressingMode.LIZ,7,"Anz");
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addOpcode( new int[] {0xea, 0x32},"and",CpuAddressingMode.LIZ,7,"Anz");
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addOpcode( new int[] {0xea, 0x52},"eor",CpuAddressingMode.LIZ,7,"Anz");
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@ -99,6 +100,7 @@ public class Cpu45GS02 extends Cpu65xx {
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addOpcode( new int[] {0xea, 0xB2},"lda",CpuAddressingMode.LIZ,7,"Anz");
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addOpcode( new int[] {0xea, 0xD2},"cmp",CpuAddressingMode.LIZ,7,"cnz");
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addOpcode( new int[] {0xea, 0xF2},"sbc",CpuAddressingMode.LIZ,8,"Acvnz");
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// TODO: Disable NOP?
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}
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cp ./repo/cml/kickass/kickassembler/maven-metadata.xml ./repo/cml/kickass/kickassembler/maven-metadata-local.xml
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# mvn install:install-file -Dmaven.repo.local=./repo/ -Dfile=/Applications/KickAssembler/KickAss.jar -DgroupId=cml.kickass -DartifactId=kickassembler -Dpackaging=jar -DgeneratePom=true -DcreateChecksum=true -Dversion=5.16
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mvn install:install-file -Dmaven.repo.local=./repo/ -Dfile=/Users/jespergravgaard/c64/kickassembler65ce02/out/KickAss65CE02.jar -DgroupId=cml.kickass -DartifactId=kickassembler -Dpackaging=jar -DgeneratePom=true -DcreateChecksum=true -Dversion=5.16-65ce02.e
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mvn install:install-file -Dmaven.repo.local=./repo/ -Dfile=/Users/jespergravgaard/c64/kickassembler65ce02/out/KickAss65CE02.jar -DgroupId=cml.kickass -DartifactId=kickassembler -Dpackaging=jar -DgeneratePom=true -DcreateChecksum=true -Dversion=5.16-65ce02.g
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# Finalize by making the local metadata official
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pushd ./repo/cml/kickass/kickassembler
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package dk.camelot64.cpufamily6502;
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import dk.camelot64.cpufamily6502.cpus.Cpu6502Illegal;
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import dk.camelot64.cpufamily6502.cpus.Cpu6502Official;
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import dk.camelot64.cpufamily6502.cpus.Cpu65C02;
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import dk.camelot64.cpufamily6502.cpus.Cpu65CE02;
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import dk.camelot64.cpufamily6502.cpus.*;
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import kickass._65xx._65xxArgType;
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import kickass._65xx.cpus.*;
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import org.junit.Assert;
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@ -36,6 +33,11 @@ public class TestCpuFamilyKickAssCompatibility {
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assertOpcodesMatch(Cpu65CE02.INSTANCE, CPU_65CE02.instance);
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}
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@Test
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public void testOpcodes45GS02() {
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assertOpcodesMatch(Cpu45GS02.INSTANCE, CPU_45GS02.instance);
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}
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private void assertOpcodesMatch(Cpu65xx kcCpu, Cpu kaCpu) {
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final Collection<CpuOpcode> kcAllOpcodes = kcCpu.getAllOpcodes();
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final Map<String, int[]> kaAllMnemonics = kaCpu.mnemonics;
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@ -55,7 +57,22 @@ public class TestCpuFamilyKickAssCompatibility {
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final int kaOpcodeRaw = kaOpcodes[kaArgTypeIdx];
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if(kaOpcodeRaw >= 0) {
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found = true;
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final int[] kaOpcode = new int[]{kaOpcodeRaw};
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int[] kaOpcode;
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if(kcOpcode.getOpcode().length==1) {
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kaOpcode = new int[]{kaOpcodeRaw};
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} else {
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List<Integer> kaOpcodeList = new ArrayList<>();
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if(CPU_45GS02.R32_MNEMONICS.contains(kcOpcode.getMnemonic())) {
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kaOpcodeList.add((int)CPU_45GS02.R32_OPCODE_PREFIX);
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kaOpcodeList.add((int)CPU_45GS02.R32_OPCODE_PREFIX);
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}
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if (kaArgType == _65xxArgType.indirect32ZeropageZ || kaArgType == _65xxArgType.indirect32Zeropage) {
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// Make sure the prefix is unsigned
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kaOpcodeList.add(CPU_45GS02.A32_OPCODE_PREFIX&0xff);
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}
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kaOpcodeList.add(kaOpcodeRaw);
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kaOpcode = kaOpcodeList.stream().mapToInt(i->i).toArray();
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}
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Assert.assertArrayEquals("KickAss opcode not matching for mnemonic " + kcOpcode.toString(), kcOpcode.getOpcode(), kaOpcode);
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}
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}
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