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Working on deprecating lo/hi operators. Closes #667

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This commit is contained in:
jespergravgaard 2021-06-13 13:35:55 +02:00
parent 44db8db459
commit d4f487eecc
4 changed files with 5585 additions and 5843 deletions
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src/test/ref/examples/cx16/veralib/bitmap_8bpp_320_x_240.asm
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@ -101,7 +101,7 @@
// The random state variable // The random state variable
.label rand_state = $11 .label rand_state = $11
// Remainder after unsigned 16-bit division // Remainder after unsigned 16-bit division
.label rem16u = $58 .label rem16u = $52
.label CONIO_SCREEN_BANK = $2b .label CONIO_SCREEN_BANK = $2b
// The screen width // The screen width
// The screen height // The screen height
@ -617,13 +617,13 @@ screensize: {
// Set the layer with which the conio will interact. // Set the layer with which the conio will interact.
// - layer: value of 0 or 1. // - layer: value of 0 or 1.
screenlayer: { screenlayer: {
.label __2 = $38 .label __2 = $44
.label __4 = $30 .label __4 = $30
.label __5 = $35 .label __5 = $36
.label vera_layer_get_width1_config = $2e .label vera_layer_get_width1_config = $2e
.label vera_layer_get_width1_return = $38 .label vera_layer_get_width1_return = $44
.label vera_layer_get_height1_config = $32 .label vera_layer_get_height1_config = $32
.label vera_layer_get_height1_return = $35 .label vera_layer_get_height1_return = $36
// conio_screen_layer = layer // conio_screen_layer = layer
lda #1 lda #1
sta.z conio_screen_layer sta.z conio_screen_layer
@ -749,7 +749,7 @@ vera_layer_set_backcolor: {
// so the resulting address in the VERA VRAM is always aligned to a multiple of 512 bytes. // so the resulting address in the VERA VRAM is always aligned to a multiple of 512 bytes.
// vera_layer_set_mapbase(byte register(A) layer, byte register(X) mapbase) // vera_layer_set_mapbase(byte register(A) layer, byte register(X) mapbase)
vera_layer_set_mapbase: { vera_layer_set_mapbase: {
.label addr = $38 .label addr = $44
// byte* addr = vera_layer_mapbase[layer] // byte* addr = vera_layer_mapbase[layer]
asl asl
tay tay
@ -822,7 +822,7 @@ gotoxy: {
// - num: The number of bytes to copy // - num: The number of bytes to copy
// memcpy_in_vram(byte register(Y) dest_bank, void* zp($15) dest, byte* zp($13) src, word zp($17) num) // memcpy_in_vram(byte register(Y) dest_bank, void* zp($15) dest, byte* zp($13) src, word zp($17) num)
memcpy_in_vram: { memcpy_in_vram: {
.label i = $41 .label i = $39
.label dest = $15 .label dest = $15
.label src = $13 .label src = $13
.label num = $17 .label num = $17
@ -831,14 +831,14 @@ memcpy_in_vram: {
lda #VERA_ADDRSEL^$ff lda #VERA_ADDRSEL^$ff
and VERA_CTRL and VERA_CTRL
sta VERA_CTRL sta VERA_CTRL
// <src // BYTE0(src)
lda.z src lda.z src
// *VERA_ADDRX_L = <src // *VERA_ADDRX_L = BYTE0(src)
// Set address // Set address
sta VERA_ADDRX_L sta VERA_ADDRX_L
// >src // BYTE1(src)
lda.z src+1 lda.z src+1
// *VERA_ADDRX_M = >src // *VERA_ADDRX_M = BYTE1(src)
sta VERA_ADDRX_M sta VERA_ADDRX_M
// *VERA_ADDRX_H = src_increment | src_bank // *VERA_ADDRX_H = src_increment | src_bank
lda #VERA_INC_1 lda #VERA_INC_1
@ -848,14 +848,14 @@ memcpy_in_vram: {
lda #VERA_ADDRSEL lda #VERA_ADDRSEL
ora VERA_CTRL ora VERA_CTRL
sta VERA_CTRL sta VERA_CTRL
// <dest // BYTE0(dest)
lda.z dest lda.z dest
// *VERA_ADDRX_L = <dest // *VERA_ADDRX_L = BYTE0(dest)
// Set address // Set address
sta VERA_ADDRX_L sta VERA_ADDRX_L
// >dest // BYTE1(dest)
lda.z dest+1 lda.z dest+1
// *VERA_ADDRX_M = >dest // *VERA_ADDRX_M = BYTE1(dest)
sta VERA_ADDRX_M sta VERA_ADDRX_M
// dest_increment | dest_bank // dest_increment | dest_bank
tya tya
@ -909,13 +909,9 @@ memcpy_in_vram: {
// vera_layer_mode_tile(byte zp(6) layer, dword zp(7) mapbase_address, dword zp($b) tilebase_address, word zp($30) mapwidth, word zp($2e) mapheight, byte zp($f) tilewidth, byte zp($10) tileheight) // vera_layer_mode_tile(byte zp(6) layer, dword zp(7) mapbase_address, dword zp($b) tilebase_address, word zp($30) mapwidth, word zp($2e) mapheight, byte zp($f) tilewidth, byte zp($10) tileheight)
vera_layer_mode_tile: { vera_layer_mode_tile: {
.label __1 = $32 .label __1 = $32
.label __2 = $35 .label __6 = $36
.label __4 = $4c .label __17 = $34
.label __7 = $38 .label __18 = $35
.label __8 = $3a
.label __10 = $3c
.label __19 = $34
.label __20 = $37
.label mapbase_address = 7 .label mapbase_address = 7
.label tilebase_address = $b .label tilebase_address = $b
.label mapwidth = $30 .label mapwidth = $30
@ -1034,35 +1030,31 @@ vera_layer_mode_tile: {
// vera_layer_set_config(layer, config) // vera_layer_set_config(layer, config)
lda.z layer lda.z layer
jsr vera_layer_set_config jsr vera_layer_set_config
// <mapbase_address // WORD0(mapbase_address)
lda.z mapbase_address lda.z mapbase_address
sta.z __1 sta.z __1
lda.z mapbase_address+1 lda.z mapbase_address+1
sta.z __1+1 sta.z __1+1
// vera_mapbase_offset[layer] = <mapbase_address // vera_mapbase_offset[layer] = WORD0(mapbase_address)
lda.z layer lda.z layer
asl asl
sta.z __19 sta.z __17
// mapbase // mapbase
tay tay
lda.z __1 lda.z __1
sta vera_mapbase_offset,y sta vera_mapbase_offset,y
lda.z __1+1 lda.z __1+1
sta vera_mapbase_offset+1,y sta vera_mapbase_offset+1,y
// >mapbase_address // BYTE2(mapbase_address)
lda.z mapbase_address+2 lda.z mapbase_address+2
sta.z __2 // vera_mapbase_bank[layer] = BYTE2(mapbase_address)
lda.z mapbase_address+3
sta.z __2+1
// vera_mapbase_bank[layer] = (byte)(>mapbase_address)
ldy.z layer ldy.z layer
lda.z __2
sta vera_mapbase_bank,y sta vera_mapbase_bank,y
// vera_mapbase_address[layer] = mapbase_address // vera_mapbase_address[layer] = mapbase_address
tya tya
asl asl
asl asl
sta.z __20 sta.z __18
tay tay
lda.z mapbase_address lda.z mapbase_address
sta vera_mapbase_address,y sta vera_mapbase_address,y
@ -1077,39 +1069,30 @@ vera_layer_mode_tile: {
ror.z mapbase_address+2 ror.z mapbase_address+2
ror.z mapbase_address+1 ror.z mapbase_address+1
ror.z mapbase_address ror.z mapbase_address
// <mapbase_address // byte mapbase = BYTE1(mapbase_address)
lda.z mapbase_address ldx.z mapbase_address+1
sta.z __4
lda.z mapbase_address+1
sta.z __4+1
// byte mapbase = >(<mapbase_address)
tax
// vera_layer_set_mapbase(layer,mapbase) // vera_layer_set_mapbase(layer,mapbase)
lda.z layer lda.z layer
jsr vera_layer_set_mapbase jsr vera_layer_set_mapbase
// <tilebase_address // WORD0(tilebase_address)
lda.z tilebase_address lda.z tilebase_address
sta.z __7 sta.z __6
lda.z tilebase_address+1 lda.z tilebase_address+1
sta.z __7+1 sta.z __6+1
// vera_tilebase_offset[layer] = <tilebase_address // vera_tilebase_offset[layer] = WORD0(tilebase_address)
// tilebase // tilebase
ldy.z __19 ldy.z __17
lda.z __7 lda.z __6
sta vera_tilebase_offset,y sta vera_tilebase_offset,y
lda.z __7+1 lda.z __6+1
sta vera_tilebase_offset+1,y sta vera_tilebase_offset+1,y
// >tilebase_address // BYTE2(tilebase_address)
lda.z tilebase_address+2 lda.z tilebase_address+2
sta.z __8 // vera_tilebase_bank[layer] = BYTE2(tilebase_address)
lda.z tilebase_address+3
sta.z __8+1
// vera_tilebase_bank[layer] = (byte)>tilebase_address
ldy.z layer ldy.z layer
lda.z __8
sta vera_tilebase_bank,y sta vera_tilebase_bank,y
// vera_tilebase_address[layer] = tilebase_address // vera_tilebase_address[layer] = tilebase_address
ldy.z __20 ldy.z __18
lda.z tilebase_address lda.z tilebase_address
sta vera_tilebase_address,y sta vera_tilebase_address,y
lda.z tilebase_address+1 lda.z tilebase_address+1
@ -1123,12 +1106,8 @@ vera_layer_mode_tile: {
ror.z tilebase_address+2 ror.z tilebase_address+2
ror.z tilebase_address+1 ror.z tilebase_address+1
ror.z tilebase_address ror.z tilebase_address
// <tilebase_address // byte tilebase = BYTE1(tilebase_address)
lda.z tilebase_address
sta.z __10
lda.z tilebase_address+1 lda.z tilebase_address+1
sta.z __10+1
// byte tilebase = >(<tilebase_address)
// tilebase &= VERA_LAYER_TILEBASE_MASK // tilebase &= VERA_LAYER_TILEBASE_MASK
and #VERA_LAYER_TILEBASE_MASK and #VERA_LAYER_TILEBASE_MASK
tax tax
@ -1251,12 +1230,12 @@ vera_layer_mode_bitmap: {
// config // config
.const config = VERA_LAYER_COLOR_DEPTH_8BPP|VERA_LAYER_CONFIG_MODE_BITMAP .const config = VERA_LAYER_COLOR_DEPTH_8BPP|VERA_LAYER_CONFIG_MODE_BITMAP
.const tilebase = 0 .const tilebase = 0
// vera_tilebase_offset[layer] = <bitmap_address // vera_tilebase_offset[layer] = WORD0(bitmap_address)
// tilebase // tilebase
lda #<0 lda #<0
sta vera_tilebase_offset sta vera_tilebase_offset
sta vera_tilebase_offset+1 sta vera_tilebase_offset+1
// vera_tilebase_bank[layer] = (byte)>bitmap_address // vera_tilebase_bank[layer] = BYTE2(bitmap_address)
sta vera_tilebase_bank sta vera_tilebase_bank
// vera_tilebase_address[layer] = bitmap_address // vera_tilebase_address[layer] = bitmap_address
lda #<bitmap_address lda #<bitmap_address
@ -1285,9 +1264,9 @@ vera_layer_mode_bitmap: {
} }
// clears the screen and moves the cursor to the upper left-hand corner of the screen. // clears the screen and moves the cursor to the upper left-hand corner of the screen.
clrscr: { clrscr: {
.label __1 = $3e .label __1 = $38
.label line_text = $13 .label line_text = $13
.label color = $3e .label color = $38
// char* line_text = CONIO_SCREEN_TEXT // char* line_text = CONIO_SCREEN_TEXT
lda.z CONIO_SCREEN_TEXT lda.z CONIO_SCREEN_TEXT
sta.z line_text sta.z line_text
@ -1336,14 +1315,14 @@ clrscr: {
lda #VERA_ADDRSEL^$ff lda #VERA_ADDRSEL^$ff
and VERA_CTRL and VERA_CTRL
sta VERA_CTRL sta VERA_CTRL
// <ch // BYTE0(ch)
lda.z line_text lda.z line_text
// *VERA_ADDRX_L = <ch // *VERA_ADDRX_L = BYTE0(ch)
// Set address // Set address
sta VERA_ADDRX_L sta VERA_ADDRX_L
// >ch // BYTE1(ch)
lda.z line_text+1 lda.z line_text+1
// *VERA_ADDRX_M = >ch // *VERA_ADDRX_M = BYTE1(ch)
sta VERA_ADDRX_M sta VERA_ADDRX_M
// CONIO_SCREEN_BANK | VERA_INC_1 // CONIO_SCREEN_BANK | VERA_INC_1
lda #VERA_INC_1 lda #VERA_INC_1
@ -1380,9 +1359,9 @@ clrscr: {
jmp __b4 jmp __b4
} }
// Output a NUL-terminated string at the current cursor position // Output a NUL-terminated string at the current cursor position
// cputs(const byte* zp($43) s) // cputs(const byte* zp($3b) s)
cputs: { cputs: {
.label s = $43 .label s = $3b
__b1: __b1:
// while(c=*s++) // while(c=*s++)
ldy #0 ldy #0
@ -1405,33 +1384,33 @@ cputs: {
bitmap_init: { bitmap_init: {
.const layer = 0 .const layer = 0
.const address = 0 .const address = 0
.label __7 = $41 .label __7 = $39
.label __10 = $4a .label __10 = $42
.label __13 = $50 .label __13 = $4c
.label __23 = $43 .label __23 = $3b
.label __24 = $6a .label __24 = $46
.label __25 = $52 .label __25 = $4e
.label __26 = $72 .label __26 = $56
.label __28 = $68 .label __28 = $66
.label vera_layer_get_color_depth1_config = $3f .label vera_layer_get_color_depth1_config = $6a
.label bitmask = $3e .label bitmask = $38
.label x = $15 .label x = $15
.label hdelta = $62 .label hdelta = $64
.label yoffs = $5e .label yoffs = $5a
.label y = $17 .label y = $17
.label __29 = $43 .label __29 = $3b
.label __30 = $45 .label __30 = $3e
.label __31 = $48 .label __31 = $40
.label __32 = $6a .label __32 = $46
.label __33 = $6c .label __33 = $48
.label __34 = $6e .label __34 = $4a
.label __35 = $52 .label __35 = $4e
.label __36 = $54 .label __36 = $50
.label __37 = $56 .label __37 = $54
.label __38 = $72 .label __38 = $56
.label __39 = $5a .label __39 = $58
.label __40 = $5c .label __40 = $5e
.label __41 = $68 .label __41 = $66
// __bitmap_address = address // __bitmap_address = address
lda #<address lda #<address
sta.z __bitmap_address sta.z __bitmap_address
@ -1834,11 +1813,10 @@ bitmap_init: {
} }
// Clear all graphics on the bitmap // Clear all graphics on the bitmap
bitmap_clear: { bitmap_clear: {
.label __3 = $43 .label vdelta = $39
.label vdelta = $41
.label hdelta = $15 .label hdelta = $15
.label count = $5e .label count = $5a
.label vdest = $45 .label vdest = $3b
// word vdelta = vdeltas[__bitmap_vscale] // word vdelta = vdeltas[__bitmap_vscale]
lda.z __bitmap_vscale lda.z __bitmap_vscale
asl asl
@ -1864,14 +1842,9 @@ bitmap_clear: {
// mul16u(hdelta,vdelta) // mul16u(hdelta,vdelta)
jsr mul16u jsr mul16u
// dword count = mul16u(hdelta,vdelta) // dword count = mul16u(hdelta,vdelta)
// >__bitmap_address // char vbank = BYTE2(__bitmap_address)
lda.z __bitmap_address+2 ldx.z __bitmap_address+2
sta.z __3 // WORD0(__bitmap_address)
lda.z __bitmap_address+3
sta.z __3+1
// char vbank = <(>__bitmap_address)
ldx.z __3
// <__bitmap_address
lda.z __bitmap_address lda.z __bitmap_address
sta.z vdest sta.z vdest
lda.z __bitmap_address+1 lda.z __bitmap_address+1
@ -1887,7 +1860,7 @@ kbhit: {
.label IN_DEV = $28a .label IN_DEV = $28a
// Current input device number // Current input device number
.label GETIN = $ffe4 .label GETIN = $ffe4
.label ch = $47 .label ch = $3d
// char ch = 0 // char ch = 0
lda #0 lda #0
sta.z ch sta.z ch
@ -1927,14 +1900,14 @@ kbhit: {
rts rts
} }
// Draw a line on the bitmap // Draw a line on the bitmap
// bitmap_line(word zp(3) x0, word zp($41) x1, word zp($43) y0, word zp($15) y1, byte register(X) c) // bitmap_line(word zp(3) x0, word zp($39) x1, word zp($3b) y0, word zp($15) y1, byte register(X) c)
bitmap_line: { bitmap_line: {
.label xd = $17 .label xd = $17
.label yd = $3f .label yd = $6a
.label yd_1 = $45 .label yd_1 = $3e
.label x0 = 3 .label x0 = 3
.label x1 = $41 .label x1 = $39
.label y0 = $43 .label y0 = $3b
.label y1 = $15 .label y1 = $15
// if(x0<x1) // if(x0<x1)
lda.z x0+1 lda.z x0+1
@ -2157,9 +2130,9 @@ bitmap_line: {
// Information https://en.wikipedia.org/wiki/Xorshift // Information https://en.wikipedia.org/wiki/Xorshift
// Source http://www.retroprogramming.com/2017/07/xorshift-pseudorandom-numbers-in-z80.html // Source http://www.retroprogramming.com/2017/07/xorshift-pseudorandom-numbers-in-z80.html
rand: { rand: {
.label __0 = $48 .label __0 = $3e
.label __1 = $4a .label __1 = $40
.label __2 = $6a .label __2 = $42
.label return = $13 .label return = $13
// rand_state << 7 // rand_state << 7
lda.z rand_state+1 lda.z rand_state+1
@ -2216,8 +2189,8 @@ rand: {
modr16u: { modr16u: {
.label return = $15 .label return = $15
.label dividend = $13 .label dividend = $13
.label return_1 = $41 .label return_1 = $39
.label return_2 = $43 .label return_2 = $3b
.label divisor = $17 .label divisor = $17
// divr16u(dividend, divisor, rem) // divr16u(dividend, divisor, rem)
jsr divr16u jsr divr16u
@ -2233,7 +2206,7 @@ modr16u: {
// - layer: Value of 0 or 1. // - layer: Value of 0 or 1.
// - color_mode: Specifies the color mode to be VERA_LAYER_CONFIG_16 or VERA_LAYER_CONFIG_256 for text mode. // - color_mode: Specifies the color mode to be VERA_LAYER_CONFIG_16 or VERA_LAYER_CONFIG_256 for text mode.
vera_layer_set_text_color_mode: { vera_layer_set_text_color_mode: {
.label addr = $4c .label addr = $44
// byte* addr = vera_layer_config[layer] // byte* addr = vera_layer_config[layer]
lda vera_layer_config+vera_layer_mode_text.layer*SIZEOF_POINTER lda vera_layer_config+vera_layer_mode_text.layer*SIZEOF_POINTER
sta.z addr sta.z addr
@ -2307,7 +2280,7 @@ vera_layer_get_rowskip: {
// - config: Specifies the modes which are specified using T256C / 'Bitmap Mode' / 'Color Depth'. // - config: Specifies the modes which are specified using T256C / 'Bitmap Mode' / 'Color Depth'.
// vera_layer_set_config(byte register(A) layer, byte register(X) config) // vera_layer_set_config(byte register(A) layer, byte register(X) config)
vera_layer_set_config: { vera_layer_set_config: {
.label addr = $4e .label addr = $44
// byte* addr = vera_layer_config[layer] // byte* addr = vera_layer_config[layer]
asl asl
tay tay
@ -2329,7 +2302,7 @@ vera_layer_set_config: {
// so the resulting address in the VERA VRAM is always aligned to a multiple of 2048 bytes! // so the resulting address in the VERA VRAM is always aligned to a multiple of 2048 bytes!
// vera_layer_set_tilebase(byte register(A) layer, byte register(X) tilebase) // vera_layer_set_tilebase(byte register(A) layer, byte register(X) tilebase)
vera_layer_set_tilebase: { vera_layer_set_tilebase: {
.label addr = $4e .label addr = $44
// byte* addr = vera_layer_tilebase[layer] // byte* addr = vera_layer_tilebase[layer]
asl asl
tay tay
@ -2370,11 +2343,11 @@ vera_layer_get_textcolor: {
} }
// Output one character at the current cursor position // Output one character at the current cursor position
// Moves the cursor forward. Scrolls the entire screen if needed // Moves the cursor forward. Scrolls the entire screen if needed
// cputc(byte zp($3e) c) // cputc(byte zp($38) c)
cputc: { cputc: {
.label __16 = $6e .label __16 = $48
.label conio_addr = $6c .label conio_addr = $46
.label c = $3e .label c = $38
// vera_layer_get_color( conio_screen_layer) // vera_layer_get_color( conio_screen_layer)
ldx.z conio_screen_layer ldx.z conio_screen_layer
jsr vera_layer_get_color jsr vera_layer_get_color
@ -2413,14 +2386,14 @@ cputc: {
lda #VERA_ADDRSEL^$ff lda #VERA_ADDRSEL^$ff
and VERA_CTRL and VERA_CTRL
sta VERA_CTRL sta VERA_CTRL
// <conio_addr // BYTE0(conio_addr)
lda.z conio_addr lda.z conio_addr
// *VERA_ADDRX_L = <conio_addr // *VERA_ADDRX_L = BYTE0(conio_addr)
// Set address // Set address
sta VERA_ADDRX_L sta VERA_ADDRX_L
// >conio_addr // BYTE1(conio_addr)
lda.z conio_addr+1 lda.z conio_addr+1
// *VERA_ADDRX_M = >conio_addr // *VERA_ADDRX_M = BYTE1(conio_addr)
sta VERA_ADDRX_M sta VERA_ADDRX_M
// CONIO_SCREEN_BANK | VERA_INC_1 // CONIO_SCREEN_BANK | VERA_INC_1
lda #VERA_INC_1 lda #VERA_INC_1
@ -2514,13 +2487,13 @@ vera_display_get_vscale: {
} }
.segment Code .segment Code
// Perform binary multiplication of two unsigned 16-bit unsigned ints into a 32-bit unsigned long // Perform binary multiplication of two unsigned 16-bit unsigned ints into a 32-bit unsigned long
// mul16u(word zp($15) a, word zp($41) b) // mul16u(word zp($15) a, word zp($39) b)
mul16u: { mul16u: {
.label a = $15 .label a = $15
.label b = $41 .label b = $39
.label return = $5e .label return = $5a
.label mb = $64 .label mb = $60
.label res = $5e .label res = $5a
// unsigned long mb = b // unsigned long mb = b
lda.z b lda.z b
sta.z mb sta.z mb
@ -2580,25 +2553,25 @@ mul16u: {
// - vdest: The destination address in VRAM // - vdest: The destination address in VRAM
// - data: The value to set the vram with. // - data: The value to set the vram with.
// - num: The number of bytes to set // - num: The number of bytes to set
// memset_vram(byte register(X) vbank, void* zp($45) vdest, dword zp($5e) num) // memset_vram(byte register(X) vbank, void* zp($3b) vdest, dword zp($5a) num)
memset_vram: { memset_vram: {
.const data = 0 .const data = 0
.label i = $64 .label i = $60
.label vdest = $45 .label vdest = $3b
.label num = $5e .label num = $5a
// *VERA_CTRL &= ~VERA_ADDRSEL // *VERA_CTRL &= ~VERA_ADDRSEL
// Select DATA0 // Select DATA0
lda #VERA_ADDRSEL^$ff lda #VERA_ADDRSEL^$ff
and VERA_CTRL and VERA_CTRL
sta VERA_CTRL sta VERA_CTRL
// <vdest // BYTE0(vdest)
lda.z vdest lda.z vdest
// *VERA_ADDRX_L = <vdest // *VERA_ADDRX_L = BYTE0(vdest)
// Set address // Set address
sta VERA_ADDRX_L sta VERA_ADDRX_L
// >vdest // BYTE1(vdest)
lda.z vdest+1 lda.z vdest+1
// *VERA_ADDRX_M = >vdest // *VERA_ADDRX_M = BYTE1(vdest)
sta VERA_ADDRX_M sta VERA_ADDRX_M
// VERA_INC_1 | vbank // VERA_INC_1 | vbank
txa txa
@ -2648,16 +2621,16 @@ memset_vram: {
!: !:
jmp __b1 jmp __b1
} }
// bitmap_line_ydxi(word zp($48) y, word zp($41) x, word zp($43) y1, word zp($45) yd, word zp($17) xd, byte zp($3e) c) // bitmap_line_ydxi(word zp($40) y, word zp($39) x, word zp($3b) y1, word zp($3e) yd, word zp($17) xd, byte zp($38) c)
bitmap_line_ydxi: { bitmap_line_ydxi: {
.label __6 = $50 .label __6 = $4a
.label y = $48 .label y = $40
.label x = $41 .label x = $39
.label y1 = $43 .label y1 = $3b
.label yd = $45 .label yd = $3e
.label xd = $17 .label xd = $17
.label c = $3e .label c = $38
.label e = $5a .label e = $46
// word e = xd>>1 // word e = xd>>1
lda.z xd+1 lda.z xd+1
lsr lsr
@ -2726,16 +2699,16 @@ bitmap_line_ydxi: {
// } // }
rts rts
} }
// bitmap_line_xdyi(word zp($4a) x, word zp($43) y, word zp($41) x1, word zp($17) xd, word zp($45) yd, byte zp($3e) c) // bitmap_line_xdyi(word zp($42) x, word zp($3b) y, word zp($39) x1, word zp($17) xd, word zp($3e) yd, byte zp($38) c)
bitmap_line_xdyi: { bitmap_line_xdyi: {
.label __6 = $52 .label __6 = $4c
.label x = $4a .label x = $42
.label y = $43 .label y = $3b
.label x1 = $41 .label x1 = $39
.label xd = $17 .label xd = $17
.label yd = $45 .label yd = $3e
.label c = $3e .label c = $38
.label e = $5a .label e = $46
// word e = yd>>1 // word e = yd>>1
lda.z yd+1 lda.z yd+1
lsr lsr
@ -2804,16 +2777,16 @@ bitmap_line_xdyi: {
// } // }
rts rts
} }
// bitmap_line_ydxd(word zp($48) y, word zp($41) x, word zp($43) y1, word zp($3f) yd, word zp($17) xd, byte zp($3e) c) // bitmap_line_ydxd(word zp($40) y, word zp($39) x, word zp($3b) y1, word zp($6a) yd, word zp($17) xd, byte zp($38) c)
bitmap_line_ydxd: { bitmap_line_ydxd: {
.label __6 = $54 .label __6 = $4e
.label y = $48 .label y = $40
.label x = $41 .label x = $39
.label y1 = $43 .label y1 = $3b
.label yd = $3f .label yd = $6a
.label xd = $17 .label xd = $17
.label c = $3e .label c = $38
.label e = $5a .label e = $46
// word e = xd>>1 // word e = xd>>1
lda.z xd+1 lda.z xd+1
lsr lsr
@ -2883,16 +2856,16 @@ bitmap_line_ydxd: {
// } // }
rts rts
} }
// bitmap_line_xdyd(word zp($4a) x, word zp($43) y, word zp($41) x1, word zp($17) xd, word zp($3f) yd, byte zp($3e) c) // bitmap_line_xdyd(word zp($42) x, word zp($3b) y, word zp($39) x1, word zp($17) xd, word zp($6a) yd, byte zp($38) c)
bitmap_line_xdyd: { bitmap_line_xdyd: {
.label __6 = $56 .label __6 = $50
.label x = $4a .label x = $42
.label y = $43 .label y = $3b
.label x1 = $41 .label x1 = $39
.label xd = $17 .label xd = $17
.label yd = $3f .label yd = $6a
.label c = $3e .label c = $38
.label e = $5a .label e = $46
// word e = yd>>1 // word e = yd>>1
lda.z yd+1 lda.z yd+1
lsr lsr
@ -2966,12 +2939,12 @@ bitmap_line_xdyd: {
// Returns the quotient dividend/divisor. // Returns the quotient dividend/divisor.
// The final remainder will be set into the global variable rem16u // The final remainder will be set into the global variable rem16u
// Implemented using simple binary division // Implemented using simple binary division
// divr16u(word zp($13) dividend, word zp($17) divisor, word zp($45) rem) // divr16u(word zp($13) dividend, word zp($17) divisor, word zp($3e) rem)
divr16u: { divr16u: {
.label rem = $45 .label rem = $3e
.label dividend = $13 .label dividend = $13
.label quotient = $48 .label quotient = $40
.label return = $48 .label return = $40
.label divisor = $17 .label divisor = $17
ldx #0 ldx #0
txa txa
@ -2983,11 +2956,11 @@ divr16u: {
// rem = rem << 1 // rem = rem << 1
asl.z rem asl.z rem
rol.z rem+1 rol.z rem+1
// >dividend // BYTE1(dividend)
lda.z dividend+1 lda.z dividend+1
// >dividend & $80 // BYTE1(dividend) & $80
and #$80 and #$80
// if( (>dividend & $80) != 0 ) // if( (BYTE1(dividend) & $80) != 0 )
cmp #0 cmp #0
beq __b2 beq __b2
// rem = rem | 1 // rem = rem | 1
@ -3043,7 +3016,7 @@ divr16u: {
// Note that on the VERA, the transparent color has value 0. // Note that on the VERA, the transparent color has value 0.
// vera_layer_get_color(byte register(X) layer) // vera_layer_get_color(byte register(X) layer)
vera_layer_get_color: { vera_layer_get_color: {
.label addr = $72 .label addr = $54
// byte* addr = vera_layer_config[layer] // byte* addr = vera_layer_config[layer]
txa txa
asl asl
@ -3076,7 +3049,7 @@ vera_layer_get_color: {
} }
// Print a newline // Print a newline
cputln: { cputln: {
.label temp = $5a .label temp = $56
// word temp = conio_line_text[conio_screen_layer] // word temp = conio_line_text[conio_screen_layer]
lda.z conio_screen_layer lda.z conio_screen_layer
asl asl
@ -3114,22 +3087,19 @@ cputln: {
// } // }
rts rts
} }
// bitmap_plot(word zp($4a) x, word zp($48) y, byte register(X) c) // bitmap_plot(word zp($42) x, word zp($40) y, byte register(X) c)
bitmap_plot: { bitmap_plot: {
.label __9 = $5c .label __9 = $58
.label __10 = $62 .label __10 = $5e
.label vera_vram_address01___0 = $72 .label plot_x = $5a
.label vera_vram_address01___2 = $6a .label plot_y = $60
.label vera_vram_address01___4 = $6c .label vera_vram_address01_bankaddr = $5a
.label plot_x = $5e .label x = $42
.label plot_y = $64 .label y = $40
.label vera_vram_address01_bankaddr = $5e .label __12 = $58
.label x = $4a .label __13 = $5e
.label y = $48 .label __14 = $64
.label __12 = $5c .label __15 = $66
.label __13 = $62
.label __14 = $68
.label __15 = $6e
// dword plot_x = __bitmap_plot_x[x] // dword plot_x = __bitmap_plot_x[x]
lda.z x lda.z x
asl asl
@ -3225,31 +3195,17 @@ bitmap_plot: {
lda #VERA_ADDRSEL^$ff lda #VERA_ADDRSEL^$ff
and VERA_CTRL and VERA_CTRL
sta VERA_CTRL sta VERA_CTRL
// <bankaddr // BYTE0(bankaddr)
lda.z vera_vram_address01_bankaddr lda.z vera_vram_address01_bankaddr
sta.z vera_vram_address01___0 // *VERA_ADDRX_L = BYTE0(bankaddr)
lda.z vera_vram_address01_bankaddr+1
sta.z vera_vram_address01___0+1
// <(<bankaddr)
lda.z vera_vram_address01___0
// *VERA_ADDRX_L = <(<bankaddr)
sta VERA_ADDRX_L sta VERA_ADDRX_L
// <bankaddr // BYTE1(bankaddr)
lda.z vera_vram_address01_bankaddr
sta.z vera_vram_address01___2
lda.z vera_vram_address01_bankaddr+1 lda.z vera_vram_address01_bankaddr+1
sta.z vera_vram_address01___2+1 // *VERA_ADDRX_M = BYTE1(bankaddr)
// >(<bankaddr)
// *VERA_ADDRX_M = >(<bankaddr)
sta VERA_ADDRX_M sta VERA_ADDRX_M
// >bankaddr // BYTE2(bankaddr) | incr
lda.z vera_vram_address01_bankaddr+2 lda.z vera_vram_address01_bankaddr+2
sta.z vera_vram_address01___4 // *VERA_ADDRX_H = BYTE2(bankaddr) | incr
lda.z vera_vram_address01_bankaddr+3
sta.z vera_vram_address01___4+1
// <(>bankaddr) | incr
lda.z vera_vram_address01___4
// *VERA_ADDRX_H = <(>bankaddr) | incr
sta VERA_ADDRX_H sta VERA_ADDRX_H
// ~__bitmap_plot_bitmask[x] // ~__bitmap_plot_bitmask[x]
clc clc
@ -3302,8 +3258,8 @@ cscroll: {
} }
// Insert a new line, and scroll the upper part of the screen up. // Insert a new line, and scroll the upper part of the screen up.
insertup: { insertup: {
.label cy = $70 .label cy = $68
.label width = $71 .label width = $69
.label line = $15 .label line = $15
.label start = $15 .label start = $15
// unsigned byte cy = conio_cursor_y[conio_screen_layer] // unsigned byte cy = conio_cursor_y[conio_screen_layer]
@ -3372,8 +3328,8 @@ insertup: {
jmp __b1 jmp __b1
} }
clearline: { clearline: {
.label addr = $72 .label addr = $6a
.label c = $4a .label c = $42
// *VERA_CTRL &= ~VERA_ADDRSEL // *VERA_CTRL &= ~VERA_ADDRSEL
// Select DATA0 // Select DATA0
lda #VERA_ADDRSEL^$ff lda #VERA_ADDRSEL^$ff
@ -3391,13 +3347,13 @@ clearline: {
lda.z CONIO_SCREEN_TEXT+1 lda.z CONIO_SCREEN_TEXT+1
adc conio_line_text+1,y adc conio_line_text+1,y
sta.z addr+1 sta.z addr+1
// <addr // BYTE0(addr)
lda.z addr lda.z addr
// *VERA_ADDRX_L = <addr // *VERA_ADDRX_L = BYTE0(addr)
sta VERA_ADDRX_L sta VERA_ADDRX_L
// >addr // BYTE1(addr)
lda.z addr+1 lda.z addr+1
// *VERA_ADDRX_M = >addr // *VERA_ADDRX_M = BYTE1(addr)
sta VERA_ADDRX_M sta VERA_ADDRX_M
// *VERA_ADDRX_H = VERA_INC_1 // *VERA_ADDRX_H = VERA_INC_1
lda #VERA_INC_1 lda #VERA_INC_1

1224
src/test/ref/examples/cx16/veralib/bitmap_8bpp_320_x_240.cfg
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src/test/ref/examples/cx16/veralib/bitmap_8bpp_320_x_240.log
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src/test/ref/examples/cx16/veralib/bitmap_8bpp_320_x_240.sym
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@ -48,7 +48,7 @@ constant const byte VERA_TILEBASE_HEIGHT_16 = 2
constant const byte VERA_TILEBASE_WIDTH_16 = 1 constant const byte VERA_TILEBASE_WIDTH_16 = 1
constant const byte WHITE = 1 constant const byte WHITE = 1
constant const byte YELLOW = 7 constant const byte YELLOW = 7
dword __bitmap_address loadstore zp[4]:35 4.01980198019802 dword __bitmap_address loadstore zp[4]:35 4.06
byte __bitmap_color_depth loadstore zp[1]:42 80.4074074074074 byte __bitmap_color_depth loadstore zp[1]:42 80.4074074074074
byte __bitmap_hscale loadstore zp[1]:40 3.9102564102564106 byte __bitmap_hscale loadstore zp[1]:40 3.9102564102564106
byte __bitmap_layer loadstore zp[1]:39 204.0 byte __bitmap_layer loadstore zp[1]:39 204.0
@ -61,60 +61,59 @@ void __start()
void bitmap_clear() void bitmap_clear()
byte~ bitmap_clear::$0 reg byte a 202.0 byte~ bitmap_clear::$0 reg byte a 202.0
byte~ bitmap_clear::$1 reg byte a 202.0 byte~ bitmap_clear::$1 reg byte a 202.0
word~ bitmap_clear::$3 zp[2]:67 202.0 byte~ bitmap_clear::$6 reg byte a 202.0
byte~ bitmap_clear::$7 reg byte a 202.0 byte~ bitmap_clear::$7 reg byte a 202.0
byte~ bitmap_clear::$8 reg byte a 202.0
dword bitmap_clear::count dword bitmap_clear::count
dword bitmap_clear::count#0 count zp[4]:94 33.666666666666664 dword bitmap_clear::count#0 count zp[4]:90 40.4
word bitmap_clear::hdelta word bitmap_clear::hdelta
word bitmap_clear::hdelta#0 hdelta zp[2]:21 202.0 word bitmap_clear::hdelta#0 hdelta zp[2]:21 202.0
byte bitmap_clear::vbank byte bitmap_clear::vbank
byte bitmap_clear::vbank#0 reg byte x 101.0 byte bitmap_clear::vbank#0 reg byte x 101.0
word bitmap_clear::vdelta word bitmap_clear::vdelta
word bitmap_clear::vdelta#0 vdelta zp[2]:65 33.666666666666664 word bitmap_clear::vdelta#0 vdelta zp[2]:57 33.666666666666664
void* bitmap_clear::vdest void* bitmap_clear::vdest
word bitmap_clear::vdest#0 vdest zp[2]:69 50.5 word bitmap_clear::vdest#0 vdest zp[2]:59 50.5
void bitmap_init(byte bitmap_init::layer , dword bitmap_init::address) void bitmap_init(byte bitmap_init::layer , dword bitmap_init::address)
byte~ bitmap_init::$0 reg byte a 202.0 byte~ bitmap_init::$0 reg byte a 202.0
byte~ bitmap_init::$1 reg byte x 202.0 byte~ bitmap_init::$1 reg byte x 202.0
word~ bitmap_init::$10 zp[2]:74 667.3333333333334 word~ bitmap_init::$10 zp[2]:66 667.3333333333334
word~ bitmap_init::$13 zp[2]:80 667.3333333333334 word~ bitmap_init::$13 zp[2]:76 667.3333333333334
byte~ bitmap_init::$2 reg byte x 202.0 byte~ bitmap_init::$2 reg byte x 202.0
word~ bitmap_init::$23 zp[2]:67 2002.0 word~ bitmap_init::$23 zp[2]:59 2002.0
word~ bitmap_init::$24 zp[2]:106 2002.0 word~ bitmap_init::$24 zp[2]:70 2002.0
word~ bitmap_init::$25 zp[2]:82 2002.0 word~ bitmap_init::$25 zp[2]:78 2002.0
word~ bitmap_init::$26 zp[2]:114 2002.0 word~ bitmap_init::$26 zp[2]:86 2002.0
byte~ bitmap_init::$27 reg byte a 202.0 byte~ bitmap_init::$27 reg byte a 202.0
word~ bitmap_init::$28 zp[2]:104 2002.0 word~ bitmap_init::$28 zp[2]:102 2002.0
const word*~ bitmap_init::$29 zp[2]:67 2002.0 const word*~ bitmap_init::$29 zp[2]:59 2002.0
byte~ bitmap_init::$3 reg byte a 202.0 byte~ bitmap_init::$3 reg byte a 202.0
const byte*~ bitmap_init::$30 zp[2]:69 2002.0 const byte*~ bitmap_init::$30 zp[2]:62 2002.0
const byte*~ bitmap_init::$31 zp[2]:72 2002.0 const byte*~ bitmap_init::$31 zp[2]:64 2002.0
const word*~ bitmap_init::$32 zp[2]:106 2002.0 const word*~ bitmap_init::$32 zp[2]:70 2002.0
const byte*~ bitmap_init::$33 zp[2]:108 2002.0 const byte*~ bitmap_init::$33 zp[2]:72 2002.0
const byte*~ bitmap_init::$34 zp[2]:110 2002.0 const byte*~ bitmap_init::$34 zp[2]:74 2002.0
const word*~ bitmap_init::$35 zp[2]:82 2002.0 const word*~ bitmap_init::$35 zp[2]:78 2002.0
const byte*~ bitmap_init::$36 zp[2]:84 2002.0 const byte*~ bitmap_init::$36 zp[2]:80 2002.0
const byte*~ bitmap_init::$37 zp[2]:86 2002.0 const byte*~ bitmap_init::$37 zp[2]:84 2002.0
const word*~ bitmap_init::$38 zp[2]:114 2002.0 const word*~ bitmap_init::$38 zp[2]:86 2002.0
const byte*~ bitmap_init::$39 zp[2]:90 2002.0 const byte*~ bitmap_init::$39 zp[2]:88 2002.0
byte~ bitmap_init::$4 reg byte a 202.0 byte~ bitmap_init::$4 reg byte a 202.0
const byte*~ bitmap_init::$40 zp[2]:92 2002.0 const byte*~ bitmap_init::$40 zp[2]:94 2002.0
const dword*~ bitmap_init::$41 zp[2]:104 2002.0 const dword*~ bitmap_init::$41 zp[2]:102 2002.0
word~ bitmap_init::$7 zp[2]:65 667.3333333333334 word~ bitmap_init::$7 zp[2]:57 667.3333333333334
dword bitmap_init::address dword bitmap_init::address
constant dword bitmap_init::address#0 address = 0 constant dword bitmap_init::address#0 address = 0
byte bitmap_init::bitmask byte bitmap_init::bitmask
byte bitmap_init::bitmask#0 bitmask zp[1]:62 101.0 byte bitmap_init::bitmask#0 bitmask zp[1]:56 101.0
byte bitmap_init::bitmask#1 bitmask zp[1]:62 2002.0 byte bitmap_init::bitmask#1 bitmask zp[1]:56 2002.0
byte bitmap_init::bitmask#10 bitmask zp[1]:62 373.1818181818182 byte bitmap_init::bitmask#10 bitmask zp[1]:56 373.1818181818182
byte bitmap_init::bitmask#11 bitmask zp[1]:62 455.0 byte bitmap_init::bitmask#11 bitmask zp[1]:56 455.0
byte bitmap_init::bitmask#12 bitmask zp[1]:62 455.0 byte bitmap_init::bitmask#12 bitmask zp[1]:56 455.0
byte bitmap_init::bitmask#13 bitmask zp[1]:62 385.0 byte bitmap_init::bitmask#13 bitmask zp[1]:56 385.0
byte bitmap_init::bitmask#16 bitmask zp[1]:62 1001.0 byte bitmap_init::bitmask#16 bitmask zp[1]:56 1001.0
byte bitmap_init::bitmask#2 bitmask zp[1]:62 2002.0 byte bitmap_init::bitmask#2 bitmask zp[1]:56 2002.0
byte bitmap_init::bitmask#3 bitmask zp[1]:62 2002.0 byte bitmap_init::bitmask#3 bitmask zp[1]:56 2002.0
byte bitmap_init::bitmask#4 bitmask zp[1]:62 2002.0 byte bitmap_init::bitmask#4 bitmask zp[1]:56 2002.0
signed byte bitmap_init::bitshift signed byte bitmap_init::bitshift
signed byte bitmap_init::bitshift#0 reg byte x 202.0 signed byte bitmap_init::bitshift#0 reg byte x 202.0
signed byte bitmap_init::bitshift#1 reg byte x 1001.0 signed byte bitmap_init::bitshift#1 reg byte x 1001.0
@ -127,13 +126,13 @@ signed byte bitmap_init::bitshift#2 reg byte x 1001.0
signed byte bitmap_init::bitshift#3 reg byte x 1001.0 signed byte bitmap_init::bitshift#3 reg byte x 1001.0
signed byte bitmap_init::bitshift#4 reg byte x 2002.0 signed byte bitmap_init::bitshift#4 reg byte x 2002.0
word bitmap_init::hdelta word bitmap_init::hdelta
word bitmap_init::hdelta#0 hdelta zp[2]:98 122.44444444444446 word bitmap_init::hdelta#0 hdelta zp[2]:100 122.44444444444446
byte bitmap_init::layer byte bitmap_init::layer
constant byte bitmap_init::layer#0 layer = 0 constant byte bitmap_init::layer#0 layer = 0
byte~ bitmap_init::vera_layer_get_color_depth1_$0 reg byte a 202.0 byte~ bitmap_init::vera_layer_get_color_depth1_$0 reg byte a 202.0
byte~ bitmap_init::vera_layer_get_color_depth1_$1 reg byte a 202.0 byte~ bitmap_init::vera_layer_get_color_depth1_$1 reg byte a 202.0
byte* bitmap_init::vera_layer_get_color_depth1_config byte* bitmap_init::vera_layer_get_color_depth1_config
byte* bitmap_init::vera_layer_get_color_depth1_config#0 vera_layer_get_color_depth1_config zp[2]:63 202.0 byte* bitmap_init::vera_layer_get_color_depth1_config#0 vera_layer_get_color_depth1_config zp[2]:106 202.0
byte bitmap_init::vera_layer_get_color_depth1_layer byte bitmap_init::vera_layer_get_color_depth1_layer
byte bitmap_init::vera_layer_get_color_depth1_layer#0 reg byte a 202.0 byte bitmap_init::vera_layer_get_color_depth1_layer#0 reg byte a 202.0
byte bitmap_init::vera_layer_get_color_depth1_return byte bitmap_init::vera_layer_get_color_depth1_return
@ -146,9 +145,9 @@ word bitmap_init::y
word bitmap_init::y#1 y zp[2]:23 1501.5 word bitmap_init::y#1 y zp[2]:23 1501.5
word bitmap_init::y#2 y zp[2]:23 600.5999999999999 word bitmap_init::y#2 y zp[2]:23 600.5999999999999
dword bitmap_init::yoffs dword bitmap_init::yoffs
dword bitmap_init::yoffs#0 yoffs zp[4]:94 202.0 dword bitmap_init::yoffs#0 yoffs zp[4]:90 202.0
dword bitmap_init::yoffs#1 yoffs zp[4]:94 667.3333333333334 dword bitmap_init::yoffs#1 yoffs zp[4]:90 667.3333333333334
dword bitmap_init::yoffs#2 yoffs zp[4]:94 776.0 dword bitmap_init::yoffs#2 yoffs zp[4]:90 776.0
void bitmap_line(word bitmap_line::x0 , word bitmap_line::x1 , word bitmap_line::y0 , word bitmap_line::y1 , byte bitmap_line::c) void bitmap_line(word bitmap_line::x0 , word bitmap_line::x1 , word bitmap_line::y0 , word bitmap_line::y1 , byte bitmap_line::c)
byte bitmap_line::c byte bitmap_line::c
byte bitmap_line::c#0 reg byte x 202.0 byte bitmap_line::c#0 reg byte x 202.0
@ -159,217 +158,214 @@ word bitmap_line::x0#0 x0 zp[2]:3 8.782608695652174
word bitmap_line::x0#1 x0 zp[2]:3 667.3333333333334 word bitmap_line::x0#1 x0 zp[2]:3 667.3333333333334
word bitmap_line::x0#10 x0 zp[2]:3 4555.550000000001 word bitmap_line::x0#10 x0 zp[2]:3 4555.550000000001
word bitmap_line::x1 word bitmap_line::x1
word bitmap_line::x1#0 x1 zp[2]:65 11.882352941176471 word bitmap_line::x1#0 x1 zp[2]:57 11.882352941176471
word bitmap_line::x1#1 x1 zp[2]:65 1001.0 word bitmap_line::x1#1 x1 zp[2]:57 1001.0
word bitmap_line::x1#10 x1 zp[2]:65 4555.550000000001 word bitmap_line::x1#10 x1 zp[2]:57 4555.550000000001
word bitmap_line::xd word bitmap_line::xd
word bitmap_line::xd#1 xd zp[2]:23 3500.3500000000004 word bitmap_line::xd#1 xd zp[2]:23 3500.3500000000004
word bitmap_line::xd#2 xd zp[2]:23 3500.3500000000004 word bitmap_line::xd#2 xd zp[2]:23 3500.3500000000004
word bitmap_line::y0 word bitmap_line::y0
word bitmap_line::y0#0 y0 zp[2]:67 18.363636363636363 word bitmap_line::y0#0 y0 zp[2]:59 18.363636363636363
word bitmap_line::y0#10 y0 zp[2]:67 6005.6500000000015 word bitmap_line::y0#10 y0 zp[2]:59 6005.6500000000015
word bitmap_line::y1 word bitmap_line::y1
word bitmap_line::y1#0 y1 zp[2]:21 40.4 word bitmap_line::y1#0 y1 zp[2]:21 40.4
word bitmap_line::y1#10 y1 zp[2]:21 6005.6500000000015 word bitmap_line::y1#10 y1 zp[2]:21 6005.6500000000015
word bitmap_line::yd word bitmap_line::yd
word bitmap_line::yd#1 yd zp[2]:63 4444.888888888889 word bitmap_line::yd#1 yd zp[2]:106 4444.888888888889
word bitmap_line::yd#10 yd zp[2]:63 4444.888888888889 word bitmap_line::yd#10 yd zp[2]:106 4444.888888888889
word bitmap_line::yd#11 yd_1 zp[2]:69 4444.888888888889 word bitmap_line::yd#11 yd_1 zp[2]:62 4444.888888888889
word bitmap_line::yd#2 yd_1 zp[2]:69 4444.888888888889 word bitmap_line::yd#2 yd_1 zp[2]:62 4444.888888888889
void bitmap_line_xdyd(word bitmap_line_xdyd::x , word bitmap_line_xdyd::y , word bitmap_line_xdyd::x1 , word bitmap_line_xdyd::xd , word bitmap_line_xdyd::yd , byte bitmap_line_xdyd::c) void bitmap_line_xdyd(word bitmap_line_xdyd::x , word bitmap_line_xdyd::y , word bitmap_line_xdyd::x1 , word bitmap_line_xdyd::xd , word bitmap_line_xdyd::yd , byte bitmap_line_xdyd::c)
word~ bitmap_line_xdyd::$6 zp[2]:86 2.00000002E8 word~ bitmap_line_xdyd::$6 zp[2]:80 2.00000002E8
byte bitmap_line_xdyd::c byte bitmap_line_xdyd::c
byte bitmap_line_xdyd::c#0 c zp[1]:62 20002.0 byte bitmap_line_xdyd::c#0 c zp[1]:56 20002.0
byte bitmap_line_xdyd::c#1 c zp[1]:62 20002.0 byte bitmap_line_xdyd::c#1 c zp[1]:56 20002.0
byte bitmap_line_xdyd::c#3 c zp[1]:62 6668000.2 byte bitmap_line_xdyd::c#3 c zp[1]:56 6668000.2
word bitmap_line_xdyd::e word bitmap_line_xdyd::e
word bitmap_line_xdyd::e#0 e zp[2]:90 200002.0 word bitmap_line_xdyd::e#0 e zp[2]:70 200002.0
word bitmap_line_xdyd::e#1 e zp[2]:90 1.3333333466666667E8 word bitmap_line_xdyd::e#1 e zp[2]:70 1.3333333466666667E8
word bitmap_line_xdyd::e#2 e zp[2]:90 2.00000002E8 word bitmap_line_xdyd::e#2 e zp[2]:70 2.00000002E8
word bitmap_line_xdyd::e#3 e zp[2]:90 3.33500005E7 word bitmap_line_xdyd::e#3 e zp[2]:70 3.33500005E7
word bitmap_line_xdyd::e#6 e zp[2]:90 1.00000001E8 word bitmap_line_xdyd::e#6 e zp[2]:70 1.00000001E8
word bitmap_line_xdyd::x word bitmap_line_xdyd::x
word bitmap_line_xdyd::x#0 x zp[2]:74 3333.6666666666665 word bitmap_line_xdyd::x#0 x zp[2]:66 3333.6666666666665
word bitmap_line_xdyd::x#1 x zp[2]:74 3333.6666666666665 word bitmap_line_xdyd::x#1 x zp[2]:66 3333.6666666666665
word bitmap_line_xdyd::x#2 x zp[2]:74 3.7500000375E7 word bitmap_line_xdyd::x#2 x zp[2]:66 3.7500000375E7
word bitmap_line_xdyd::x#3 x zp[2]:74 6.00200008E7 word bitmap_line_xdyd::x#3 x zp[2]:66 6.00200008E7
word bitmap_line_xdyd::x#6 x zp[2]:74 60001.5 word bitmap_line_xdyd::x#6 x zp[2]:66 60001.5
word bitmap_line_xdyd::x1 word bitmap_line_xdyd::x1
word bitmap_line_xdyd::x1#0 x1 zp[2]:65 5000.5 word bitmap_line_xdyd::x1#0 x1 zp[2]:57 5000.5
word bitmap_line_xdyd::x1#1 x1 zp[2]:65 5000.5 word bitmap_line_xdyd::x1#1 x1 zp[2]:57 5000.5
word bitmap_line_xdyd::x1#6 x1 zp[2]:65 6668000.2 word bitmap_line_xdyd::x1#6 x1 zp[2]:57 6668000.2
word bitmap_line_xdyd::xd word bitmap_line_xdyd::xd
word bitmap_line_xdyd::xd#0 xd zp[2]:23 6667.333333333333 word bitmap_line_xdyd::xd#0 xd zp[2]:23 6667.333333333333
word bitmap_line_xdyd::xd#1 xd zp[2]:23 6667.333333333333 word bitmap_line_xdyd::xd#1 xd zp[2]:23 6667.333333333333
word bitmap_line_xdyd::xd#5 xd zp[2]:23 1.3334666933333334E7 word bitmap_line_xdyd::xd#5 xd zp[2]:23 1.3334666933333334E7
word bitmap_line_xdyd::y word bitmap_line_xdyd::y
word bitmap_line_xdyd::y#0 y zp[2]:67 4000.4 word bitmap_line_xdyd::y#0 y zp[2]:59 4000.4
word bitmap_line_xdyd::y#1 y zp[2]:67 4000.4 word bitmap_line_xdyd::y#1 y zp[2]:59 4000.4
word bitmap_line_xdyd::y#2 y zp[2]:67 1.00000001E8 word bitmap_line_xdyd::y#2 y zp[2]:59 1.00000001E8
word bitmap_line_xdyd::y#3 y zp[2]:67 5.0012500625E7 word bitmap_line_xdyd::y#3 y zp[2]:59 5.0012500625E7
word bitmap_line_xdyd::y#5 y zp[2]:67 60001.5 word bitmap_line_xdyd::y#5 y zp[2]:59 60001.5
word bitmap_line_xdyd::y#6 y zp[2]:67 1.00000001E8 word bitmap_line_xdyd::y#6 y zp[2]:59 1.00000001E8
word bitmap_line_xdyd::yd word bitmap_line_xdyd::yd
word bitmap_line_xdyd::yd#0 yd zp[2]:63 10001.0 word bitmap_line_xdyd::yd#0 yd zp[2]:106 10001.0
word bitmap_line_xdyd::yd#1 yd zp[2]:63 10001.0 word bitmap_line_xdyd::yd#1 yd zp[2]:106 10001.0
word bitmap_line_xdyd::yd#2 yd zp[2]:63 6674666.933333334 word bitmap_line_xdyd::yd#2 yd zp[2]:106 6674666.933333334
void bitmap_line_xdyi(word bitmap_line_xdyi::x , word bitmap_line_xdyi::y , word bitmap_line_xdyi::x1 , word bitmap_line_xdyi::xd , word bitmap_line_xdyi::yd , byte bitmap_line_xdyi::c) void bitmap_line_xdyi(word bitmap_line_xdyi::x , word bitmap_line_xdyi::y , word bitmap_line_xdyi::x1 , word bitmap_line_xdyi::xd , word bitmap_line_xdyi::yd , byte bitmap_line_xdyi::c)
word~ bitmap_line_xdyi::$6 zp[2]:82 2.00000002E8 word~ bitmap_line_xdyi::$6 zp[2]:76 2.00000002E8
byte bitmap_line_xdyi::c byte bitmap_line_xdyi::c
byte bitmap_line_xdyi::c#0 c zp[1]:62 20002.0 byte bitmap_line_xdyi::c#0 c zp[1]:56 20002.0
byte bitmap_line_xdyi::c#1 c zp[1]:62 20002.0 byte bitmap_line_xdyi::c#1 c zp[1]:56 20002.0
byte bitmap_line_xdyi::c#3 c zp[1]:62 6668000.2 byte bitmap_line_xdyi::c#3 c zp[1]:56 6668000.2
word bitmap_line_xdyi::e word bitmap_line_xdyi::e
word bitmap_line_xdyi::e#0 e zp[2]:90 200002.0 word bitmap_line_xdyi::e#0 e zp[2]:70 200002.0
word bitmap_line_xdyi::e#1 e zp[2]:90 1.3333333466666667E8 word bitmap_line_xdyi::e#1 e zp[2]:70 1.3333333466666667E8
word bitmap_line_xdyi::e#2 e zp[2]:90 2.00000002E8 word bitmap_line_xdyi::e#2 e zp[2]:70 2.00000002E8
word bitmap_line_xdyi::e#3 e zp[2]:90 3.33500005E7 word bitmap_line_xdyi::e#3 e zp[2]:70 3.33500005E7
word bitmap_line_xdyi::e#6 e zp[2]:90 1.00000001E8 word bitmap_line_xdyi::e#6 e zp[2]:70 1.00000001E8
word bitmap_line_xdyi::x word bitmap_line_xdyi::x
word bitmap_line_xdyi::x#0 x zp[2]:74 3333.6666666666665 word bitmap_line_xdyi::x#0 x zp[2]:66 3333.6666666666665
word bitmap_line_xdyi::x#1 x zp[2]:74 3333.6666666666665 word bitmap_line_xdyi::x#1 x zp[2]:66 3333.6666666666665
word bitmap_line_xdyi::x#2 x zp[2]:74 3.7500000375E7 word bitmap_line_xdyi::x#2 x zp[2]:66 3.7500000375E7
word bitmap_line_xdyi::x#3 x zp[2]:74 6.00200008E7 word bitmap_line_xdyi::x#3 x zp[2]:66 6.00200008E7
word bitmap_line_xdyi::x#6 x zp[2]:74 60001.5 word bitmap_line_xdyi::x#6 x zp[2]:66 60001.5
word bitmap_line_xdyi::x1 word bitmap_line_xdyi::x1
word bitmap_line_xdyi::x1#0 x1 zp[2]:65 5000.5 word bitmap_line_xdyi::x1#0 x1 zp[2]:57 5000.5
word bitmap_line_xdyi::x1#1 x1 zp[2]:65 5000.5 word bitmap_line_xdyi::x1#1 x1 zp[2]:57 5000.5
word bitmap_line_xdyi::x1#6 x1 zp[2]:65 6668000.2 word bitmap_line_xdyi::x1#6 x1 zp[2]:57 6668000.2
word bitmap_line_xdyi::xd word bitmap_line_xdyi::xd
word bitmap_line_xdyi::xd#0 xd zp[2]:23 6667.333333333333 word bitmap_line_xdyi::xd#0 xd zp[2]:23 6667.333333333333
word bitmap_line_xdyi::xd#1 xd zp[2]:23 6667.333333333333 word bitmap_line_xdyi::xd#1 xd zp[2]:23 6667.333333333333
word bitmap_line_xdyi::xd#5 xd zp[2]:23 1.3334666933333334E7 word bitmap_line_xdyi::xd#5 xd zp[2]:23 1.3334666933333334E7
word bitmap_line_xdyi::y word bitmap_line_xdyi::y
word bitmap_line_xdyi::y#0 y zp[2]:67 4000.4 word bitmap_line_xdyi::y#0 y zp[2]:59 4000.4
word bitmap_line_xdyi::y#1 y zp[2]:67 4000.4 word bitmap_line_xdyi::y#1 y zp[2]:59 4000.4
word bitmap_line_xdyi::y#2 y zp[2]:67 1.00000001E8 word bitmap_line_xdyi::y#2 y zp[2]:59 1.00000001E8
word bitmap_line_xdyi::y#3 y zp[2]:67 5.0012500625E7 word bitmap_line_xdyi::y#3 y zp[2]:59 5.0012500625E7
word bitmap_line_xdyi::y#5 y zp[2]:67 60001.5 word bitmap_line_xdyi::y#5 y zp[2]:59 60001.5
word bitmap_line_xdyi::y#6 y zp[2]:67 1.00000001E8 word bitmap_line_xdyi::y#6 y zp[2]:59 1.00000001E8
word bitmap_line_xdyi::yd word bitmap_line_xdyi::yd
word bitmap_line_xdyi::yd#0 yd zp[2]:69 10001.0 word bitmap_line_xdyi::yd#0 yd zp[2]:62 10001.0
word bitmap_line_xdyi::yd#1 yd zp[2]:69 10001.0 word bitmap_line_xdyi::yd#1 yd zp[2]:62 10001.0
word bitmap_line_xdyi::yd#2 yd zp[2]:69 6674666.933333334 word bitmap_line_xdyi::yd#2 yd zp[2]:62 6674666.933333334
void bitmap_line_ydxd(word bitmap_line_ydxd::y , word bitmap_line_ydxd::x , word bitmap_line_ydxd::y1 , word bitmap_line_ydxd::yd , word bitmap_line_ydxd::xd , byte bitmap_line_ydxd::c) void bitmap_line_ydxd(word bitmap_line_ydxd::y , word bitmap_line_ydxd::x , word bitmap_line_ydxd::y1 , word bitmap_line_ydxd::yd , word bitmap_line_ydxd::xd , byte bitmap_line_ydxd::c)
word~ bitmap_line_ydxd::$6 zp[2]:84 2.00000002E8 word~ bitmap_line_ydxd::$6 zp[2]:78 2.00000002E8
byte bitmap_line_ydxd::c byte bitmap_line_ydxd::c
byte bitmap_line_ydxd::c#0 c zp[1]:62 20002.0 byte bitmap_line_ydxd::c#0 c zp[1]:56 20002.0
byte bitmap_line_ydxd::c#1 c zp[1]:62 20002.0 byte bitmap_line_ydxd::c#1 c zp[1]:56 20002.0
byte bitmap_line_ydxd::c#3 c zp[1]:62 6668000.2 byte bitmap_line_ydxd::c#3 c zp[1]:56 6668000.2
word bitmap_line_ydxd::e word bitmap_line_ydxd::e
word bitmap_line_ydxd::e#0 e zp[2]:90 200002.0 word bitmap_line_ydxd::e#0 e zp[2]:70 200002.0
word bitmap_line_ydxd::e#1 e zp[2]:90 1.3333333466666667E8 word bitmap_line_ydxd::e#1 e zp[2]:70 1.3333333466666667E8
word bitmap_line_ydxd::e#2 e zp[2]:90 2.00000002E8 word bitmap_line_ydxd::e#2 e zp[2]:70 2.00000002E8
word bitmap_line_ydxd::e#3 e zp[2]:90 3.33500005E7 word bitmap_line_ydxd::e#3 e zp[2]:70 3.33500005E7
word bitmap_line_ydxd::e#6 e zp[2]:90 1.00000001E8 word bitmap_line_ydxd::e#6 e zp[2]:70 1.00000001E8
word bitmap_line_ydxd::x word bitmap_line_ydxd::x
word bitmap_line_ydxd::x#0 x zp[2]:65 4000.4 word bitmap_line_ydxd::x#0 x zp[2]:57 4000.4
word bitmap_line_ydxd::x#1 x zp[2]:65 4000.4 word bitmap_line_ydxd::x#1 x zp[2]:57 4000.4
word bitmap_line_ydxd::x#2 x zp[2]:65 1.00000001E8 word bitmap_line_ydxd::x#2 x zp[2]:57 1.00000001E8
word bitmap_line_ydxd::x#3 x zp[2]:65 5.0012500625E7 word bitmap_line_ydxd::x#3 x zp[2]:57 5.0012500625E7
word bitmap_line_ydxd::x#5 x zp[2]:65 60001.5 word bitmap_line_ydxd::x#5 x zp[2]:57 60001.5
word bitmap_line_ydxd::x#6 x zp[2]:65 1.00000001E8 word bitmap_line_ydxd::x#6 x zp[2]:57 1.00000001E8
word bitmap_line_ydxd::xd word bitmap_line_ydxd::xd
word bitmap_line_ydxd::xd#0 xd zp[2]:23 10001.0 word bitmap_line_ydxd::xd#0 xd zp[2]:23 10001.0
word bitmap_line_ydxd::xd#1 xd zp[2]:23 10001.0 word bitmap_line_ydxd::xd#1 xd zp[2]:23 10001.0
word bitmap_line_ydxd::xd#2 xd zp[2]:23 6674666.933333334 word bitmap_line_ydxd::xd#2 xd zp[2]:23 6674666.933333334
word bitmap_line_ydxd::y word bitmap_line_ydxd::y
word bitmap_line_ydxd::y#0 y zp[2]:72 3333.6666666666665 word bitmap_line_ydxd::y#0 y zp[2]:64 3333.6666666666665
word bitmap_line_ydxd::y#1 y zp[2]:72 3333.6666666666665 word bitmap_line_ydxd::y#1 y zp[2]:64 3333.6666666666665
word bitmap_line_ydxd::y#2 y zp[2]:72 6.00200008E7 word bitmap_line_ydxd::y#2 y zp[2]:64 6.00200008E7
word bitmap_line_ydxd::y#3 y zp[2]:72 3.7500000375E7 word bitmap_line_ydxd::y#3 y zp[2]:64 3.7500000375E7
word bitmap_line_ydxd::y#7 y zp[2]:72 60001.5 word bitmap_line_ydxd::y#7 y zp[2]:64 60001.5
word bitmap_line_ydxd::y1 word bitmap_line_ydxd::y1
word bitmap_line_ydxd::y1#0 y1 zp[2]:67 5000.5 word bitmap_line_ydxd::y1#0 y1 zp[2]:59 5000.5
word bitmap_line_ydxd::y1#1 y1 zp[2]:67 5000.5 word bitmap_line_ydxd::y1#1 y1 zp[2]:59 5000.5
word bitmap_line_ydxd::y1#6 y1 zp[2]:67 6668000.2 word bitmap_line_ydxd::y1#6 y1 zp[2]:59 6668000.2
word bitmap_line_ydxd::yd word bitmap_line_ydxd::yd
word bitmap_line_ydxd::yd#0 yd zp[2]:63 6667.333333333333 word bitmap_line_ydxd::yd#0 yd zp[2]:106 6667.333333333333
word bitmap_line_ydxd::yd#1 yd zp[2]:63 6667.333333333333 word bitmap_line_ydxd::yd#1 yd zp[2]:106 6667.333333333333
word bitmap_line_ydxd::yd#5 yd zp[2]:63 1.3334666933333334E7 word bitmap_line_ydxd::yd#5 yd zp[2]:106 1.3334666933333334E7
void bitmap_line_ydxi(word bitmap_line_ydxi::y , word bitmap_line_ydxi::x , word bitmap_line_ydxi::y1 , word bitmap_line_ydxi::yd , word bitmap_line_ydxi::xd , byte bitmap_line_ydxi::c) void bitmap_line_ydxi(word bitmap_line_ydxi::y , word bitmap_line_ydxi::x , word bitmap_line_ydxi::y1 , word bitmap_line_ydxi::yd , word bitmap_line_ydxi::xd , byte bitmap_line_ydxi::c)
word~ bitmap_line_ydxi::$6 zp[2]:80 2.00000002E8 word~ bitmap_line_ydxi::$6 zp[2]:74 2.00000002E8
byte bitmap_line_ydxi::c byte bitmap_line_ydxi::c
byte bitmap_line_ydxi::c#0 c zp[1]:62 20002.0 byte bitmap_line_ydxi::c#0 c zp[1]:56 20002.0
byte bitmap_line_ydxi::c#1 c zp[1]:62 20002.0 byte bitmap_line_ydxi::c#1 c zp[1]:56 20002.0
byte bitmap_line_ydxi::c#3 c zp[1]:62 6668000.2 byte bitmap_line_ydxi::c#3 c zp[1]:56 6668000.2
word bitmap_line_ydxi::e word bitmap_line_ydxi::e
word bitmap_line_ydxi::e#0 e zp[2]:90 200002.0 word bitmap_line_ydxi::e#0 e zp[2]:70 200002.0
word bitmap_line_ydxi::e#1 e zp[2]:90 1.3333333466666667E8 word bitmap_line_ydxi::e#1 e zp[2]:70 1.3333333466666667E8
word bitmap_line_ydxi::e#2 e zp[2]:90 2.00000002E8 word bitmap_line_ydxi::e#2 e zp[2]:70 2.00000002E8
word bitmap_line_ydxi::e#3 e zp[2]:90 3.33500005E7 word bitmap_line_ydxi::e#3 e zp[2]:70 3.33500005E7
word bitmap_line_ydxi::e#6 e zp[2]:90 1.00000001E8 word bitmap_line_ydxi::e#6 e zp[2]:70 1.00000001E8
word bitmap_line_ydxi::x word bitmap_line_ydxi::x
word bitmap_line_ydxi::x#0 x zp[2]:65 4000.4 word bitmap_line_ydxi::x#0 x zp[2]:57 4000.4
word bitmap_line_ydxi::x#1 x zp[2]:65 4000.4 word bitmap_line_ydxi::x#1 x zp[2]:57 4000.4
word bitmap_line_ydxi::x#2 x zp[2]:65 1.00000001E8 word bitmap_line_ydxi::x#2 x zp[2]:57 1.00000001E8
word bitmap_line_ydxi::x#3 x zp[2]:65 5.0012500625E7 word bitmap_line_ydxi::x#3 x zp[2]:57 5.0012500625E7
word bitmap_line_ydxi::x#5 x zp[2]:65 60001.5 word bitmap_line_ydxi::x#5 x zp[2]:57 60001.5
word bitmap_line_ydxi::x#6 x zp[2]:65 1.00000001E8 word bitmap_line_ydxi::x#6 x zp[2]:57 1.00000001E8
word bitmap_line_ydxi::xd word bitmap_line_ydxi::xd
word bitmap_line_ydxi::xd#0 xd zp[2]:23 10001.0 word bitmap_line_ydxi::xd#0 xd zp[2]:23 10001.0
word bitmap_line_ydxi::xd#1 xd zp[2]:23 10001.0 word bitmap_line_ydxi::xd#1 xd zp[2]:23 10001.0
word bitmap_line_ydxi::xd#2 xd zp[2]:23 6674666.933333334 word bitmap_line_ydxi::xd#2 xd zp[2]:23 6674666.933333334
word bitmap_line_ydxi::y word bitmap_line_ydxi::y
word bitmap_line_ydxi::y#0 y zp[2]:72 3333.6666666666665 word bitmap_line_ydxi::y#0 y zp[2]:64 3333.6666666666665
word bitmap_line_ydxi::y#1 y zp[2]:72 3333.6666666666665 word bitmap_line_ydxi::y#1 y zp[2]:64 3333.6666666666665
word bitmap_line_ydxi::y#2 y zp[2]:72 3.7500000375E7 word bitmap_line_ydxi::y#2 y zp[2]:64 3.7500000375E7
word bitmap_line_ydxi::y#3 y zp[2]:72 6.00200008E7 word bitmap_line_ydxi::y#3 y zp[2]:64 6.00200008E7
word bitmap_line_ydxi::y#6 y zp[2]:72 60001.5 word bitmap_line_ydxi::y#6 y zp[2]:64 60001.5
word bitmap_line_ydxi::y1 word bitmap_line_ydxi::y1
word bitmap_line_ydxi::y1#0 y1 zp[2]:67 5000.5 word bitmap_line_ydxi::y1#0 y1 zp[2]:59 5000.5
word bitmap_line_ydxi::y1#1 y1 zp[2]:67 5000.5 word bitmap_line_ydxi::y1#1 y1 zp[2]:59 5000.5
word bitmap_line_ydxi::y1#6 y1 zp[2]:67 6668000.2 word bitmap_line_ydxi::y1#6 y1 zp[2]:59 6668000.2
word bitmap_line_ydxi::yd word bitmap_line_ydxi::yd
word bitmap_line_ydxi::yd#0 yd zp[2]:69 6667.333333333333 word bitmap_line_ydxi::yd#0 yd zp[2]:62 6667.333333333333
word bitmap_line_ydxi::yd#1 yd zp[2]:69 6667.333333333333 word bitmap_line_ydxi::yd#1 yd zp[2]:62 6667.333333333333
word bitmap_line_ydxi::yd#5 yd zp[2]:69 1.3334666933333334E7 word bitmap_line_ydxi::yd#5 yd zp[2]:62 1.3334666933333334E7
void bitmap_plot(word bitmap_plot::x , word bitmap_plot::y , byte bitmap_plot::c) void bitmap_plot(word bitmap_plot::x , word bitmap_plot::y , byte bitmap_plot::c)
word~ bitmap_plot::$10 zp[2]:98 2.000000002E9 word~ bitmap_plot::$10 zp[2]:94 2.000000002E9
const word*~ bitmap_plot::$12 zp[2]:92 1.000000001E9 const word*~ bitmap_plot::$12 zp[2]:88 1.000000001E9
const dword*~ bitmap_plot::$13 zp[2]:98 2.000000002E9 const dword*~ bitmap_plot::$13 zp[2]:94 2.000000002E9
const byte*~ bitmap_plot::$14 zp[2]:104 2.000000002E9 const byte*~ bitmap_plot::$14 zp[2]:100 2.000000002E9
const byte*~ bitmap_plot::$15 zp[2]:110 2.000000002E9 const byte*~ bitmap_plot::$15 zp[2]:102 2.000000002E9
byte~ bitmap_plot::$3 reg byte x 2.000000002E9 byte~ bitmap_plot::$3 reg byte x 2.000000002E9
byte~ bitmap_plot::$6 reg byte a 2.000000002E9 byte~ bitmap_plot::$6 reg byte a 2.000000002E9
byte~ bitmap_plot::$7 reg byte a 2.000000002E9 byte~ bitmap_plot::$7 reg byte a 2.000000002E9
byte~ bitmap_plot::$8 reg byte a 2.000000002E9 byte~ bitmap_plot::$8 reg byte a 2.000000002E9
word~ bitmap_plot::$9 zp[2]:92 2.000000002E9 word~ bitmap_plot::$9 zp[2]:88 2.000000002E9
byte bitmap_plot::bitshift byte bitmap_plot::bitshift
byte bitmap_plot::bitshift#0 reg byte a 1.5000000015E9 byte bitmap_plot::bitshift#0 reg byte a 1.5000000015E9
byte bitmap_plot::c byte bitmap_plot::c
byte bitmap_plot::c#0 reg byte x 2.142857145E8 byte bitmap_plot::c#0 reg byte x 2.72727273E8
byte bitmap_plot::c#1 reg byte x 2.00000002E8 byte bitmap_plot::c#1 reg byte x 2.00000002E8
byte bitmap_plot::c#2 reg byte x 2.00000002E8 byte bitmap_plot::c#2 reg byte x 2.00000002E8
byte bitmap_plot::c#3 reg byte x 2.00000002E8 byte bitmap_plot::c#3 reg byte x 2.00000002E8
byte bitmap_plot::c#4 reg byte x 2.00000002E8 byte bitmap_plot::c#4 reg byte x 2.00000002E8
byte bitmap_plot::c#5 reg byte x 2.1818181872727272E8 byte bitmap_plot::c#5 reg byte x 2.1818181872727272E8
dword bitmap_plot::plot_x dword bitmap_plot::plot_x
dword bitmap_plot::plot_x#0 plot_x zp[4]:94 5.000000005E8 dword bitmap_plot::plot_x#0 plot_x zp[4]:90 5.000000005E8
dword bitmap_plot::plot_y dword bitmap_plot::plot_y
dword bitmap_plot::plot_y#0 plot_y zp[4]:100 2.000000002E9 dword bitmap_plot::plot_y#0 plot_y zp[4]:96 2.000000002E9
dword bitmap_plot::plotter dword bitmap_plot::plotter
word~ bitmap_plot::vera_vram_address01_$0 zp[2]:114 2.000000002E9 byte~ bitmap_plot::vera_vram_address01_$0 reg byte a 2.000000002E9
byte~ bitmap_plot::vera_vram_address01_$1 reg byte a 2.000000002E9 byte~ bitmap_plot::vera_vram_address01_$1 reg byte a 2.000000002E9
word~ bitmap_plot::vera_vram_address01_$2 zp[2]:106 2.000000002E9
byte~ bitmap_plot::vera_vram_address01_$3 reg byte a 2.000000002E9 byte~ bitmap_plot::vera_vram_address01_$3 reg byte a 2.000000002E9
word~ bitmap_plot::vera_vram_address01_$4 zp[2]:108 2.000000002E9
byte~ bitmap_plot::vera_vram_address01_$6 reg byte a 2.000000002E9
dword bitmap_plot::vera_vram_address01_bankaddr dword bitmap_plot::vera_vram_address01_bankaddr
dword bitmap_plot::vera_vram_address01_bankaddr#0 vera_vram_address01_bankaddr zp[4]:94 3.07692308E8 dword bitmap_plot::vera_vram_address01_bankaddr#0 vera_vram_address01_bankaddr zp[4]:90 3.63636364E8
byte bitmap_plot::vera_vram_address01_incr byte bitmap_plot::vera_vram_address01_incr
word bitmap_plot::x word bitmap_plot::x
word bitmap_plot::x#0 x zp[2]:74 6.6666667333333336E7 word bitmap_plot::x#0 x zp[2]:66 6.6666667333333336E7
word bitmap_plot::x#1 x zp[2]:74 6.6666667333333336E7 word bitmap_plot::x#1 x zp[2]:66 6.6666667333333336E7
word bitmap_plot::x#2 x zp[2]:74 6.6666667333333336E7 word bitmap_plot::x#2 x zp[2]:66 6.6666667333333336E7
word bitmap_plot::x#3 x zp[2]:74 6.6666667333333336E7 word bitmap_plot::x#3 x zp[2]:66 6.6666667333333336E7
word bitmap_plot::x#4 x zp[2]:74 1.4782608726086956E8 word bitmap_plot::x#4 x zp[2]:66 1.7000000035E8
word bitmap_plot::y word bitmap_plot::y
word bitmap_plot::y#0 y zp[2]:72 1.00000001E8 word bitmap_plot::y#0 y zp[2]:64 1.00000001E8
word bitmap_plot::y#1 y zp[2]:72 1.00000001E8 word bitmap_plot::y#1 y zp[2]:64 1.00000001E8
word bitmap_plot::y#2 y zp[2]:72 1.00000001E8 word bitmap_plot::y#2 y zp[2]:64 1.00000001E8
word bitmap_plot::y#3 y zp[2]:72 1.00000001E8 word bitmap_plot::y#3 y zp[2]:64 1.00000001E8
word bitmap_plot::y#4 y zp[2]:72 3.5000000125E8 word bitmap_plot::y#4 y zp[2]:64 3.5000000125E8
constant const byte* bitmasks[5] = { $80, $c0, $f0, $ff } constant const byte* bitmasks[5] = { $80, $c0, $f0, $ff }
constant const signed byte* bitshifts[5] = { 7, 6, 4, 0 } constant const signed byte* bitshifts[5] = { 7, 6, 4, 0 }
void clearline() void clearline()
@ -377,15 +373,15 @@ byte~ clearline::$1 reg byte a 2.00000002E8
byte~ clearline::$2 reg byte a 2.00000002E8 byte~ clearline::$2 reg byte a 2.00000002E8
byte~ clearline::$5 reg byte a 2.00000002E8 byte~ clearline::$5 reg byte a 2.00000002E8
byte* clearline::addr byte* clearline::addr
byte* clearline::addr#0 addr zp[2]:114 1.00000001E8 byte* clearline::addr#0 addr zp[2]:106 1.00000001E8
word clearline::c word clearline::c
word clearline::c#1 c zp[2]:74 2.0000000002E10 word clearline::c#1 c zp[2]:66 2.0000000002E10
word clearline::c#2 c zp[2]:74 7.50000000075E9 word clearline::c#2 c zp[2]:66 7.50000000075E9
byte clearline::color byte clearline::color
byte clearline::color#0 reg byte x 1.6833333336666665E9 byte clearline::color#0 reg byte x 1.6833333336666665E9
void clrscr() void clrscr()
byte~ clrscr::$0 reg byte a 202.0 byte~ clrscr::$0 reg byte a 202.0
byte~ clrscr::$1 zp[1]:62 40.4 byte~ clrscr::$1 zp[1]:56 40.4
byte~ clrscr::$2 reg byte a 202.0 byte~ clrscr::$2 reg byte a 202.0
byte~ clrscr::$5 reg byte a 2002.0 byte~ clrscr::$5 reg byte a 2002.0
byte~ clrscr::$6 reg byte a 2002.0 byte~ clrscr::$6 reg byte a 2002.0
@ -396,7 +392,7 @@ byte clrscr::c#1 reg byte y 20002.0
byte clrscr::c#2 reg byte y 7500.75 byte clrscr::c#2 reg byte y 7500.75
byte* clrscr::ch byte* clrscr::ch
byte clrscr::color byte clrscr::color
byte clrscr::color#0 color zp[1]:62 594.2352941176471 byte clrscr::color#0 color zp[1]:56 594.2352941176471
byte clrscr::l byte clrscr::l
byte clrscr::l#1 reg byte x 2002.0 byte clrscr::l#1 reg byte x 2002.0
byte clrscr::l#2 reg byte x 200.2 byte clrscr::l#2 reg byte x 200.2
@ -423,33 +419,33 @@ byte conio_x16_init::line#1 line zp[1]:2 22.0
byte conio_x16_init::line#3 line zp[1]:2 33.0 byte conio_x16_init::line#3 line zp[1]:2 33.0
void cputc(byte cputc::c) void cputc(byte cputc::c)
byte~ cputc::$15 reg byte a 20002.0 byte~ cputc::$15 reg byte a 20002.0
word~ cputc::$16 zp[2]:110 20002.0 word~ cputc::$16 zp[2]:72 20002.0
byte~ cputc::$2 reg byte a 20002.0 byte~ cputc::$2 reg byte a 20002.0
byte~ cputc::$4 reg byte a 20002.0 byte~ cputc::$4 reg byte a 20002.0
byte~ cputc::$5 reg byte a 20002.0 byte~ cputc::$5 reg byte a 20002.0
byte~ cputc::$6 reg byte a 20002.0 byte~ cputc::$6 reg byte a 20002.0
byte cputc::c byte cputc::c
byte cputc::c#0 c zp[1]:62 1235.4705882352941 byte cputc::c#0 c zp[1]:56 1235.4705882352941
byte cputc::color byte cputc::color
byte cputc::color#0 reg byte x 1428.7142857142858 byte cputc::color#0 reg byte x 1428.7142857142858
byte* cputc::conio_addr byte* cputc::conio_addr
byte* cputc::conio_addr#0 conio_addr zp[2]:108 10001.0 byte* cputc::conio_addr#0 conio_addr zp[2]:70 10001.0
byte* cputc::conio_addr#1 conio_addr zp[2]:108 6000.6 byte* cputc::conio_addr#1 conio_addr zp[2]:70 6000.6
byte cputc::scroll_enable byte cputc::scroll_enable
byte cputc::scroll_enable#0 reg byte a 20002.0 byte cputc::scroll_enable#0 reg byte a 20002.0
void cputln() void cputln()
byte~ cputln::$2 reg byte a 200002.0 byte~ cputln::$2 reg byte a 200002.0
byte~ cputln::$3 reg byte a 200002.0 byte~ cputln::$3 reg byte a 200002.0
word cputln::temp word cputln::temp
word cputln::temp#0 temp zp[2]:90 200002.0 word cputln::temp#0 temp zp[2]:86 200002.0
word cputln::temp#1 temp zp[2]:90 100001.0 word cputln::temp#1 temp zp[2]:86 100001.0
void cputs(const byte* cputs::s) void cputs(const byte* cputs::s)
byte cputs::c byte cputs::c
byte cputs::c#1 reg byte a 1001.0 byte cputs::c#1 reg byte a 1001.0
const byte* cputs::s const byte* cputs::s
const byte* cputs::s#0 s zp[2]:67 500.5 const byte* cputs::s#0 s zp[2]:59 500.5
const byte* cputs::s#8 s zp[2]:67 1552.0 const byte* cputs::s#8 s zp[2]:59 1552.0
const byte* cputs::s#9 s zp[2]:67 101.0 const byte* cputs::s#9 s zp[2]:59 101.0
void cscroll() void cscroll()
word divr16u(word divr16u::dividend , word divr16u::divisor , word divr16u::rem) word divr16u(word divr16u::dividend , word divr16u::divisor , word divr16u::rem)
byte~ divr16u::$1 reg byte a 2000002.0 byte~ divr16u::$1 reg byte a 2000002.0
@ -464,18 +460,18 @@ byte divr16u::i
byte divr16u::i#1 reg byte x 1500001.5 byte divr16u::i#1 reg byte x 1500001.5
byte divr16u::i#2 reg byte x 153846.3076923077 byte divr16u::i#2 reg byte x 153846.3076923077
word divr16u::quotient word divr16u::quotient
word divr16u::quotient#1 quotient zp[2]:72 1500001.5 word divr16u::quotient#1 quotient zp[2]:64 1500001.5
word divr16u::quotient#2 quotient zp[2]:72 1000001.0 word divr16u::quotient#2 quotient zp[2]:64 1000001.0
word divr16u::quotient#3 quotient zp[2]:72 250000.25 word divr16u::quotient#3 quotient zp[2]:64 250000.25
word divr16u::rem word divr16u::rem
word divr16u::rem#0 rem zp[2]:69 750000.75 word divr16u::rem#0 rem zp[2]:62 750000.75
word divr16u::rem#1 rem zp[2]:69 2000002.0 word divr16u::rem#1 rem zp[2]:62 2000002.0
word divr16u::rem#10 rem zp[2]:69 1003334.6666666666 word divr16u::rem#10 rem zp[2]:62 1003334.6666666666
word divr16u::rem#2 rem zp[2]:69 2000002.0 word divr16u::rem#2 rem zp[2]:62 2000002.0
word divr16u::rem#4 rem zp[2]:69 2000002.0 word divr16u::rem#4 rem zp[2]:62 2000002.0
word divr16u::rem#5 rem zp[2]:69 1000001.0 word divr16u::rem#5 rem zp[2]:62 1000001.0
word divr16u::return word divr16u::return
word divr16u::return#0 return zp[2]:72 1000001.0 word divr16u::return#0 return zp[2]:64 1000001.0
void gotoxy(byte gotoxy::x , byte gotoxy::y) void gotoxy(byte gotoxy::x , byte gotoxy::y)
byte~ gotoxy::$5 reg byte a 2.0000002E7 byte~ gotoxy::$5 reg byte a 2.0000002E7
word~ gotoxy::$6 zp[2]:48 2.0000002E7 word~ gotoxy::$6 zp[2]:48 2.0000002E7
@ -491,7 +487,7 @@ constant word* hdeltas[$10] = { 0, $50, $28, $14, 0, $a0, $50, $28, 0, $140, $a
void insertup() void insertup()
byte~ insertup::$3 reg byte a 2.000000002E9 byte~ insertup::$3 reg byte a 2.000000002E9
byte insertup::cy byte insertup::cy
byte insertup::cy#0 cy zp[1]:112 7.769230784615384E7 byte insertup::cy#0 cy zp[1]:104 7.769230784615384E7
byte insertup::i byte insertup::i
byte insertup::i#1 reg byte x 2.000000002E9 byte insertup::i#1 reg byte x 2.000000002E9
byte insertup::i#2 reg byte x 4.000000004E8 byte insertup::i#2 reg byte x 4.000000004E8
@ -500,11 +496,11 @@ word insertup::line#0 line zp[2]:21 2.000000002E9
byte* insertup::start byte* insertup::start
byte* insertup::start#0 start zp[2]:21 1.000000001E9 byte* insertup::start#0 start zp[2]:21 1.000000001E9
byte insertup::width byte insertup::width
byte insertup::width#0 width zp[1]:113 8.416666683333334E7 byte insertup::width#0 width zp[1]:105 8.416666683333334E7
byte kbhit() byte kbhit()
constant byte* const kbhit::GETIN = (byte*) 65508 constant byte* const kbhit::GETIN = (byte*) 65508
constant byte* const kbhit::IN_DEV = (byte*) 650 constant byte* const kbhit::IN_DEV = (byte*) 650
volatile byte kbhit::ch loadstore zp[1]:71 10001.0 volatile byte kbhit::ch loadstore zp[1]:61 10001.0
constant byte* const kbhit::chptr = &kbhit::ch constant byte* const kbhit::chptr = &kbhit::ch
byte kbhit::return byte kbhit::return
byte kbhit::return#0 reg byte a 20002.0 byte kbhit::return#0 reg byte a 20002.0
@ -554,8 +550,8 @@ byte memcpy_in_vram::dest_bank
byte memcpy_in_vram::dest_bank#2 reg byte y 8.333333334166666E8 byte memcpy_in_vram::dest_bank#2 reg byte y 8.333333334166666E8
byte memcpy_in_vram::dest_increment byte memcpy_in_vram::dest_increment
word memcpy_in_vram::i word memcpy_in_vram::i
word memcpy_in_vram::i#1 i zp[2]:65 2.00000000002E11 word memcpy_in_vram::i#1 i zp[2]:57 2.00000000002E11
word memcpy_in_vram::i#2 i zp[2]:65 1.00000000001E11 word memcpy_in_vram::i#2 i zp[2]:57 1.00000000001E11
word memcpy_in_vram::num word memcpy_in_vram::num
word memcpy_in_vram::num#0 num zp[2]:23 1.000000001E9 word memcpy_in_vram::num#0 num zp[2]:23 1.000000001E9
word memcpy_in_vram::num#3 num zp[2]:23 5.611111111222221E9 word memcpy_in_vram::num#3 num zp[2]:23 5.611111111222221E9
@ -572,14 +568,14 @@ byte~ memset_vram::$2 reg byte a 2002.0
byte memset_vram::data byte memset_vram::data
constant byte memset_vram::data#0 data = 0 constant byte memset_vram::data#0 data = 0
dword memset_vram::i dword memset_vram::i
dword memset_vram::i#1 i zp[4]:100 20002.0 dword memset_vram::i#1 i zp[4]:96 20002.0
dword memset_vram::i#2 i zp[4]:100 10001.0 dword memset_vram::i#2 i zp[4]:96 10001.0
dword memset_vram::num dword memset_vram::num
dword memset_vram::num#0 num zp[4]:94 841.8333333333333 dword memset_vram::num#0 num zp[4]:90 841.8333333333333
byte memset_vram::vbank byte memset_vram::vbank
byte memset_vram::vbank#0 reg byte x 137.75 byte memset_vram::vbank#0 reg byte x 137.75
void* memset_vram::vdest void* memset_vram::vdest
void* memset_vram::vdest#0 vdest zp[2]:69 420.59999999999997 void* memset_vram::vdest#0 vdest zp[2]:59 420.59999999999997
word modr16u(word modr16u::dividend , word modr16u::divisor , word modr16u::rem) word modr16u(word modr16u::dividend , word modr16u::divisor , word modr16u::rem)
word modr16u::dividend word modr16u::dividend
word modr16u::dividend#0 dividend zp[2]:19 202.0 word modr16u::dividend#0 dividend zp[2]:19 202.0
@ -594,8 +590,8 @@ word modr16u::return
word modr16u::return#0 return zp[2]:21 234.16666666666669 word modr16u::return#0 return zp[2]:21 234.16666666666669
word modr16u::return#10 return zp[2]:21 202.0 word modr16u::return#10 return zp[2]:21 202.0
word modr16u::return#2 return zp[2]:21 202.0 word modr16u::return#2 return zp[2]:21 202.0
word modr16u::return#3 return_1 zp[2]:65 202.0 word modr16u::return#3 return_1 zp[2]:57 202.0
word modr16u::return#4 return_2 zp[2]:67 202.0 word modr16u::return#4 return_2 zp[2]:59 202.0
dword mul16u(word mul16u::a , word mul16u::b) dword mul16u(word mul16u::a , word mul16u::b)
byte~ mul16u::$1 reg byte a 20002.0 byte~ mul16u::$1 reg byte a 20002.0
word mul16u::a word mul16u::a
@ -603,21 +599,21 @@ word mul16u::a#0 a zp[2]:21 367.33333333333337
word mul16u::a#1 a zp[2]:21 10001.0 word mul16u::a#1 a zp[2]:21 10001.0
word mul16u::a#2 a zp[2]:21 6834.166666666666 word mul16u::a#2 a zp[2]:21 6834.166666666666
word mul16u::b word mul16u::b
word mul16u::b#0 b zp[2]:65 101.0 word mul16u::b#0 b zp[2]:57 101.0
dword mul16u::mb dword mul16u::mb
dword mul16u::mb#0 mb zp[4]:100 2002.0 dword mul16u::mb#0 mb zp[4]:96 2002.0
dword mul16u::mb#1 mb zp[4]:100 20002.0 dword mul16u::mb#1 mb zp[4]:96 20002.0
dword mul16u::mb#2 mb zp[4]:100 4429.142857142857 dword mul16u::mb#2 mb zp[4]:96 4429.142857142857
dword mul16u::res dword mul16u::res
dword mul16u::res#1 res zp[4]:94 20002.0 dword mul16u::res#1 res zp[4]:90 20002.0
dword mul16u::res#2 res zp[4]:94 5017.333333333333 dword mul16u::res#2 res zp[4]:90 5017.333333333333
dword mul16u::res#6 res zp[4]:94 10001.0 dword mul16u::res#6 res zp[4]:90 10001.0
dword mul16u::return dword mul16u::return
dword mul16u::return#0 return zp[4]:94 202.0 dword mul16u::return#0 return zp[4]:90 202.0
word rand() word rand()
word~ rand::$0 zp[2]:72 2002.0 word~ rand::$0 zp[2]:62 2002.0
word~ rand::$1 zp[2]:74 2002.0 word~ rand::$1 zp[2]:64 2002.0
word~ rand::$2 zp[2]:106 2002.0 word~ rand::$2 zp[2]:66 2002.0
word rand::return word rand::return
word rand::return#0 return zp[2]:19 215.14285714285714 word rand::return#0 return zp[2]:19 215.14285714285714
word rand::return#10 return zp[2]:19 202.0 word rand::return#10 return zp[2]:19 202.0
@ -632,12 +628,12 @@ word rand_state#13 rand_state zp[2]:17 1253.5
word rand_state#14 rand_state zp[2]:17 78.34375 word rand_state#14 rand_state zp[2]:17 78.34375
word rand_state#23 rand_state zp[2]:17 33.666666666666664 word rand_state#23 rand_state zp[2]:17 33.666666666666664
word rem16u word rem16u
word rem16u#0 rem16u zp[2]:88 3667.333333333333 word rem16u#0 rem16u zp[2]:82 3667.333333333333
void screenlayer(byte screenlayer::layer) void screenlayer(byte screenlayer::layer)
word~ screenlayer::$2 zp[2]:56 202.0 word~ screenlayer::$2 zp[2]:68 202.0
byte~ screenlayer::$3 reg byte a 202.0 byte~ screenlayer::$3 reg byte a 202.0
word~ screenlayer::$4 zp[2]:48 202.0 word~ screenlayer::$4 zp[2]:48 202.0
word~ screenlayer::$5 zp[2]:53 202.0 word~ screenlayer::$5 zp[2]:54 202.0
byte screenlayer::layer byte screenlayer::layer
byte~ screenlayer::vera_layer_get_height1_$0 reg byte a 202.0 byte~ screenlayer::vera_layer_get_height1_$0 reg byte a 202.0
byte~ screenlayer::vera_layer_get_height1_$1 reg byte a 202.0 byte~ screenlayer::vera_layer_get_height1_$1 reg byte a 202.0
@ -648,8 +644,8 @@ byte* screenlayer::vera_layer_get_height1_config#0 vera_layer_get_height1_config
byte screenlayer::vera_layer_get_height1_layer byte screenlayer::vera_layer_get_height1_layer
byte screenlayer::vera_layer_get_height1_layer#0 reg byte a 202.0 byte screenlayer::vera_layer_get_height1_layer#0 reg byte a 202.0
word screenlayer::vera_layer_get_height1_return word screenlayer::vera_layer_get_height1_return
word screenlayer::vera_layer_get_height1_return#0 vera_layer_get_height1_return zp[2]:53 202.0 word screenlayer::vera_layer_get_height1_return#0 vera_layer_get_height1_return zp[2]:54 202.0
word screenlayer::vera_layer_get_height1_return#1 vera_layer_get_height1_return zp[2]:53 202.0 word screenlayer::vera_layer_get_height1_return#1 vera_layer_get_height1_return zp[2]:54 202.0
byte~ screenlayer::vera_layer_get_width1_$0 reg byte a 202.0 byte~ screenlayer::vera_layer_get_width1_$0 reg byte a 202.0
byte~ screenlayer::vera_layer_get_width1_$1 reg byte a 202.0 byte~ screenlayer::vera_layer_get_width1_$1 reg byte a 202.0
byte~ screenlayer::vera_layer_get_width1_$2 reg byte a 202.0 byte~ screenlayer::vera_layer_get_width1_$2 reg byte a 202.0
@ -659,8 +655,8 @@ byte* screenlayer::vera_layer_get_width1_config#0 vera_layer_get_width1_config z
byte screenlayer::vera_layer_get_width1_layer byte screenlayer::vera_layer_get_width1_layer
byte screenlayer::vera_layer_get_width1_layer#0 reg byte a 202.0 byte screenlayer::vera_layer_get_width1_layer#0 reg byte a 202.0
word screenlayer::vera_layer_get_width1_return word screenlayer::vera_layer_get_width1_return
word screenlayer::vera_layer_get_width1_return#0 vera_layer_get_width1_return zp[2]:56 202.0 word screenlayer::vera_layer_get_width1_return#0 vera_layer_get_width1_return zp[2]:68 202.0
word screenlayer::vera_layer_get_width1_return#1 vera_layer_get_width1_return zp[2]:56 202.0 word screenlayer::vera_layer_get_width1_return#1 vera_layer_get_width1_return zp[2]:68 202.0
void screensize(byte* screensize::x , byte* screensize::y) void screensize(byte* screensize::x , byte* screensize::y)
byte~ screensize::$1 reg byte a 202.0 byte~ screensize::$1 reg byte a 202.0
byte~ screensize::$3 reg byte a 202.0 byte~ screensize::$3 reg byte a 202.0
@ -707,7 +703,7 @@ byte~ vera_layer_get_color::$0 reg byte a 2.000000002E9
byte~ vera_layer_get_color::$1 reg byte a 2.000000002E9 byte~ vera_layer_get_color::$1 reg byte a 2.000000002E9
byte~ vera_layer_get_color::$3 reg byte a 2.000000002E9 byte~ vera_layer_get_color::$3 reg byte a 2.000000002E9
byte* vera_layer_get_color::addr byte* vera_layer_get_color::addr
byte* vera_layer_get_color::addr#0 addr zp[2]:114 2.000000002E9 byte* vera_layer_get_color::addr#0 addr zp[2]:84 2.000000002E9
byte vera_layer_get_color::layer byte vera_layer_get_color::layer
byte vera_layer_get_color::layer#0 reg byte x 20002.0 byte vera_layer_get_color::layer#0 reg byte x 20002.0
byte vera_layer_get_color::layer#1 reg byte x 2.00000002E8 byte vera_layer_get_color::layer#1 reg byte x 2.00000002E8
@ -780,17 +776,15 @@ byte vera_layer_mode_text::tilewidth
constant byte vera_layer_mode_text::tilewidth#0 tilewidth = 8 constant byte vera_layer_mode_text::tilewidth#0 tilewidth = 8
void vera_layer_mode_tile(byte vera_layer_mode_tile::layer , dword vera_layer_mode_tile::mapbase_address , dword vera_layer_mode_tile::tilebase_address , word vera_layer_mode_tile::mapwidth , word vera_layer_mode_tile::mapheight , byte vera_layer_mode_tile::tilewidth , byte vera_layer_mode_tile::tileheight , byte vera_layer_mode_tile::color_depth) void vera_layer_mode_tile(byte vera_layer_mode_tile::layer , dword vera_layer_mode_tile::mapbase_address , dword vera_layer_mode_tile::tilebase_address , word vera_layer_mode_tile::mapwidth , word vera_layer_mode_tile::mapheight , byte vera_layer_mode_tile::tilewidth , byte vera_layer_mode_tile::tileheight , byte vera_layer_mode_tile::color_depth)
word~ vera_layer_mode_tile::$1 zp[2]:50 1001.0 word~ vera_layer_mode_tile::$1 zp[2]:50 1001.0
word~ vera_layer_mode_tile::$10 zp[2]:60 2002.0 byte~ vera_layer_mode_tile::$11 reg byte a 2002.0
byte~ vera_layer_mode_tile::$12 reg byte a 2002.0
byte~ vera_layer_mode_tile::$13 reg byte a 2002.0 byte~ vera_layer_mode_tile::$13 reg byte a 2002.0
byte~ vera_layer_mode_tile::$14 reg byte a 2002.0 byte~ vera_layer_mode_tile::$14 reg byte a 2002.0
byte~ vera_layer_mode_tile::$15 reg byte a 2002.0 byte~ vera_layer_mode_tile::$17 zp[1]:52 250.25
byte~ vera_layer_mode_tile::$16 reg byte a 2002.0 byte~ vera_layer_mode_tile::$18 zp[1]:53 273.0
byte~ vera_layer_mode_tile::$19 zp[1]:52 231.0 byte~ vera_layer_mode_tile::$2 reg byte a 2002.0
word~ vera_layer_mode_tile::$2 zp[2]:53 1001.0 word~ vera_layer_mode_tile::$6 zp[2]:54 2002.0
byte~ vera_layer_mode_tile::$20 zp[1]:55 250.25 byte~ vera_layer_mode_tile::$7 reg byte a 2002.0
word~ vera_layer_mode_tile::$4 zp[2]:76 2002.0
word~ vera_layer_mode_tile::$7 zp[2]:56 2002.0
word~ vera_layer_mode_tile::$8 zp[2]:58 1001.0
byte vera_layer_mode_tile::color_depth byte vera_layer_mode_tile::color_depth
byte vera_layer_mode_tile::config byte vera_layer_mode_tile::config
byte vera_layer_mode_tile::config#10 reg byte x 2002.0 byte vera_layer_mode_tile::config#10 reg byte x 2002.0
@ -799,7 +793,7 @@ byte vera_layer_mode_tile::config#12 reg byte x 2002.0
byte vera_layer_mode_tile::config#21 reg byte x 1001.0 byte vera_layer_mode_tile::config#21 reg byte x 1001.0
byte vera_layer_mode_tile::config#25 reg byte x 3003.0 byte vera_layer_mode_tile::config#25 reg byte x 3003.0
byte vera_layer_mode_tile::layer byte vera_layer_mode_tile::layer
byte vera_layer_mode_tile::layer#10 layer zp[1]:6 254.4915254237289 byte vera_layer_mode_tile::layer#10 layer zp[1]:6 263.4210526315791
byte vera_layer_mode_tile::mapbase byte vera_layer_mode_tile::mapbase
byte vera_layer_mode_tile::mapbase#0 reg byte x 1001.0 byte vera_layer_mode_tile::mapbase#0 reg byte x 1001.0
dword vera_layer_mode_tile::mapbase_address dword vera_layer_mode_tile::mapbase_address
@ -818,11 +812,11 @@ byte vera_layer_mode_tile::tilebase#3 reg byte x 2002.0
byte vera_layer_mode_tile::tilebase#5 reg byte x 2002.0 byte vera_layer_mode_tile::tilebase#5 reg byte x 2002.0
dword vera_layer_mode_tile::tilebase_address dword vera_layer_mode_tile::tilebase_address
dword vera_layer_mode_tile::tilebase_address#0 tilebase_address zp[4]:11 2002.0 dword vera_layer_mode_tile::tilebase_address#0 tilebase_address zp[4]:11 2002.0
dword vera_layer_mode_tile::tilebase_address#10 tilebase_address zp[4]:11 85.19148936170212 dword vera_layer_mode_tile::tilebase_address#10 tilebase_address zp[4]:11 87.04347826086956
byte vera_layer_mode_tile::tileheight byte vera_layer_mode_tile::tileheight
byte vera_layer_mode_tile::tileheight#10 tileheight zp[1]:16 35.75 byte vera_layer_mode_tile::tileheight#10 tileheight zp[1]:16 37.074074074074076
byte vera_layer_mode_tile::tilewidth byte vera_layer_mode_tile::tilewidth
byte vera_layer_mode_tile::tilewidth#10 tilewidth zp[1]:15 38.5 byte vera_layer_mode_tile::tilewidth#10 tilewidth zp[1]:15 40.04
constant byte* vera_layer_rowshift[2] = { 0, 0 } constant byte* vera_layer_rowshift[2] = { 0, 0 }
constant word* vera_layer_rowskip[2] = { 0, 0 } constant word* vera_layer_rowskip[2] = { 0, 0 }
byte vera_layer_set_backcolor(byte vera_layer_set_backcolor::layer , byte vera_layer_set_backcolor::color) byte vera_layer_set_backcolor(byte vera_layer_set_backcolor::layer , byte vera_layer_set_backcolor::color)
@ -838,7 +832,7 @@ byte vera_layer_set_backcolor::return
void vera_layer_set_config(byte vera_layer_set_config::layer , byte vera_layer_set_config::config) void vera_layer_set_config(byte vera_layer_set_config::layer , byte vera_layer_set_config::config)
byte~ vera_layer_set_config::$0 reg byte a 20002.0 byte~ vera_layer_set_config::$0 reg byte a 20002.0
byte* vera_layer_set_config::addr byte* vera_layer_set_config::addr
byte* vera_layer_set_config::addr#0 addr zp[2]:78 20002.0 byte* vera_layer_set_config::addr#0 addr zp[2]:68 20002.0
byte vera_layer_set_config::config byte vera_layer_set_config::config
byte vera_layer_set_config::config#0 reg byte x 2002.0 byte vera_layer_set_config::config#0 reg byte x 2002.0
byte vera_layer_set_config::config#2 reg byte x 3667.333333333333 byte vera_layer_set_config::config#2 reg byte x 3667.333333333333
@ -848,7 +842,7 @@ byte vera_layer_set_config::layer#2 reg byte a 11002.0
void vera_layer_set_mapbase(byte vera_layer_set_mapbase::layer , byte vera_layer_set_mapbase::mapbase) void vera_layer_set_mapbase(byte vera_layer_set_mapbase::layer , byte vera_layer_set_mapbase::mapbase)
byte~ vera_layer_set_mapbase::$0 reg byte a 20002.0 byte~ vera_layer_set_mapbase::$0 reg byte a 20002.0
byte* vera_layer_set_mapbase::addr byte* vera_layer_set_mapbase::addr
byte* vera_layer_set_mapbase::addr#0 addr zp[2]:56 20002.0 byte* vera_layer_set_mapbase::addr#0 addr zp[2]:68 20002.0
byte vera_layer_set_mapbase::layer byte vera_layer_set_mapbase::layer
byte vera_layer_set_mapbase::layer#0 reg byte a 1001.0 byte vera_layer_set_mapbase::layer#0 reg byte a 1001.0
byte vera_layer_set_mapbase::layer#3 reg byte a 11002.0 byte vera_layer_set_mapbase::layer#3 reg byte a 11002.0
@ -857,7 +851,7 @@ byte vera_layer_set_mapbase::mapbase#0 reg byte x 2002.0
byte vera_layer_set_mapbase::mapbase#3 reg byte x 3667.333333333333 byte vera_layer_set_mapbase::mapbase#3 reg byte x 3667.333333333333
void vera_layer_set_text_color_mode(byte vera_layer_set_text_color_mode::layer , byte vera_layer_set_text_color_mode::color_mode) void vera_layer_set_text_color_mode(byte vera_layer_set_text_color_mode::layer , byte vera_layer_set_text_color_mode::color_mode)
byte* vera_layer_set_text_color_mode::addr byte* vera_layer_set_text_color_mode::addr
byte* vera_layer_set_text_color_mode::addr#0 addr zp[2]:76 2502.5 byte* vera_layer_set_text_color_mode::addr#0 addr zp[2]:68 2502.5
byte vera_layer_set_text_color_mode::color_mode byte vera_layer_set_text_color_mode::color_mode
byte vera_layer_set_text_color_mode::layer byte vera_layer_set_text_color_mode::layer
byte vera_layer_set_textcolor(byte vera_layer_set_textcolor::layer , byte vera_layer_set_textcolor::color) byte vera_layer_set_textcolor(byte vera_layer_set_textcolor::layer , byte vera_layer_set_textcolor::color)
@ -875,7 +869,7 @@ byte vera_layer_set_textcolor::return
void vera_layer_set_tilebase(byte vera_layer_set_tilebase::layer , byte vera_layer_set_tilebase::tilebase) void vera_layer_set_tilebase(byte vera_layer_set_tilebase::layer , byte vera_layer_set_tilebase::tilebase)
byte~ vera_layer_set_tilebase::$0 reg byte a 20002.0 byte~ vera_layer_set_tilebase::$0 reg byte a 20002.0
byte* vera_layer_set_tilebase::addr byte* vera_layer_set_tilebase::addr
byte* vera_layer_set_tilebase::addr#0 addr zp[2]:78 20002.0 byte* vera_layer_set_tilebase::addr#0 addr zp[2]:68 20002.0
byte vera_layer_set_tilebase::layer byte vera_layer_set_tilebase::layer
byte vera_layer_set_tilebase::layer#0 reg byte a 1001.0 byte vera_layer_set_tilebase::layer#0 reg byte a 1001.0
byte vera_layer_set_tilebase::layer#2 reg byte a 11002.0 byte vera_layer_set_tilebase::layer#2 reg byte a 11002.0
@ -976,19 +970,18 @@ reg byte a [ memcpy_in_vram::$1 ]
reg byte a [ memcpy_in_vram::$3 ] reg byte a [ memcpy_in_vram::$3 ]
reg byte a [ memcpy_in_vram::$4 ] reg byte a [ memcpy_in_vram::$4 ]
reg byte a [ memcpy_in_vram::$5 ] reg byte a [ memcpy_in_vram::$5 ]
reg byte a [ vera_layer_mode_tile::$16 ]
zp[2]:50 [ vera_layer_mode_tile::$1 screenlayer::vera_layer_get_height1_config#0 ]
zp[1]:52 [ vera_layer_mode_tile::$19 ]
zp[2]:53 [ vera_layer_mode_tile::$2 screenlayer::vera_layer_get_height1_return#0 screenlayer::vera_layer_get_height1_return#1 screenlayer::$5 ]
zp[1]:55 [ vera_layer_mode_tile::$20 ]
reg byte x [ vera_layer_mode_tile::mapbase#0 ]
zp[2]:56 [ vera_layer_mode_tile::$7 vera_layer_set_mapbase::addr#0 screenlayer::vera_layer_get_width1_return#0 screenlayer::vera_layer_get_width1_return#1 screenlayer::$2 ]
zp[2]:58 [ vera_layer_mode_tile::$8 ]
zp[2]:60 [ vera_layer_mode_tile::$10 ]
reg byte a [ vera_layer_mode_tile::tilebase#0 ]
reg byte a [ vera_layer_mode_tile::$15 ]
reg byte a [ vera_layer_mode_tile::$14 ] reg byte a [ vera_layer_mode_tile::$14 ]
zp[2]:50 [ vera_layer_mode_tile::$1 screenlayer::vera_layer_get_height1_config#0 ]
zp[1]:52 [ vera_layer_mode_tile::$17 ]
reg byte a [ vera_layer_mode_tile::$2 ]
zp[1]:53 [ vera_layer_mode_tile::$18 ]
reg byte x [ vera_layer_mode_tile::mapbase#0 ]
zp[2]:54 [ vera_layer_mode_tile::$6 screenlayer::vera_layer_get_height1_return#0 screenlayer::vera_layer_get_height1_return#1 screenlayer::$5 ]
reg byte a [ vera_layer_mode_tile::$7 ]
reg byte a [ vera_layer_mode_tile::tilebase#0 ]
reg byte a [ vera_layer_mode_tile::$13 ] reg byte a [ vera_layer_mode_tile::$13 ]
reg byte a [ vera_layer_mode_tile::$12 ]
reg byte a [ vera_layer_mode_tile::$11 ]
reg byte x [ vera_layer_get_backcolor::layer#0 ] reg byte x [ vera_layer_get_backcolor::layer#0 ]
reg byte a [ vera_layer_get_backcolor::return#0 ] reg byte a [ vera_layer_get_backcolor::return#0 ]
reg byte a [ clrscr::$0 ] reg byte a [ clrscr::$0 ]
@ -1000,10 +993,9 @@ reg byte a [ clrscr::$5 ]
reg byte a [ clrscr::$6 ] reg byte a [ clrscr::$6 ]
reg byte a [ clrscr::$7 ] reg byte a [ clrscr::$7 ]
reg byte a [ cputs::c#1 ] reg byte a [ cputs::c#1 ]
zp[1]:62 [ cputc::c#0 clrscr::$1 clrscr::color#0 bitmap_line_xdyd::c#3 bitmap_line_xdyd::c#1 bitmap_line_xdyd::c#0 bitmap_line_ydxd::c#3 bitmap_line_ydxd::c#0 bitmap_line_ydxd::c#1 bitmap_line_xdyi::c#3 bitmap_line_xdyi::c#1 bitmap_line_xdyi::c#0 bitmap_line_ydxi::c#3 bitmap_line_ydxi::c#1 bitmap_line_ydxi::c#0 bitmap_init::bitmask#13 bitmap_init::bitmask#3 bitmap_init::bitmask#12 bitmap_init::bitmask#11 bitmap_init::bitmask#10 bitmap_init::bitmask#0 bitmap_init::bitmask#16 bitmap_init::bitmask#1 bitmap_init::bitmask#2 bitmap_init::bitmask#4 ] zp[1]:56 [ cputc::c#0 clrscr::$1 clrscr::color#0 bitmap_line_xdyd::c#3 bitmap_line_xdyd::c#1 bitmap_line_xdyd::c#0 bitmap_line_ydxd::c#3 bitmap_line_ydxd::c#0 bitmap_line_ydxd::c#1 bitmap_line_xdyi::c#3 bitmap_line_xdyi::c#1 bitmap_line_xdyi::c#0 bitmap_line_ydxi::c#3 bitmap_line_ydxi::c#1 bitmap_line_ydxi::c#0 bitmap_init::bitmask#13 bitmap_init::bitmask#3 bitmap_init::bitmask#12 bitmap_init::bitmask#11 bitmap_init::bitmask#10 bitmap_init::bitmask#0 bitmap_init::bitmask#16 bitmap_init::bitmask#1 bitmap_init::bitmask#2 bitmap_init::bitmask#4 ]
reg byte a [ bitmap_init::vera_layer_get_color_depth1_layer#0 ] reg byte a [ bitmap_init::vera_layer_get_color_depth1_layer#0 ]
reg byte a [ bitmap_init::vera_layer_get_color_depth1_$1 ] reg byte a [ bitmap_init::vera_layer_get_color_depth1_$1 ]
zp[2]:63 [ bitmap_init::vera_layer_get_color_depth1_config#0 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::yd#0 bitmap_line_ydxd::yd#1 bitmap_line::yd#1 bitmap_line::yd#10 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::yd#1 bitmap_line_xdyd::yd#0 ]
reg byte a [ bitmap_init::vera_layer_get_color_depth1_$0 ] reg byte a [ bitmap_init::vera_layer_get_color_depth1_$0 ]
reg byte a [ bitmap_init::vera_layer_get_color_depth1_return#0 ] reg byte a [ bitmap_init::vera_layer_get_color_depth1_return#0 ]
reg byte a [ bitmap_init::vera_layer_get_color_depth1_return#1 ] reg byte a [ bitmap_init::vera_layer_get_color_depth1_return#1 ]
@ -1015,75 +1007,75 @@ reg byte x [ bitmap_init::$2 ]
reg byte a [ bitmap_init::$3 ] reg byte a [ bitmap_init::$3 ]
reg byte a [ bitmap_init::$4 ] reg byte a [ bitmap_init::$4 ]
reg byte a [ bitmap_init::$27 ] reg byte a [ bitmap_init::$27 ]
reg byte a [ bitmap_clear::$7 ] reg byte a [ bitmap_clear::$6 ]
zp[2]:65 [ bitmap_clear::vdelta#0 mul16u::b#0 bitmap_init::$7 bitmap_line::x1#10 bitmap_line::x1#0 bitmap_line::x1#1 bitmap_line_ydxi::x#3 bitmap_line_ydxi::x#5 bitmap_line_ydxi::x#1 bitmap_line_ydxi::x#0 bitmap_line_ydxi::x#6 bitmap_line_ydxi::x#2 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x1#1 bitmap_line_xdyi::x1#0 bitmap_line_ydxd::x#3 bitmap_line_ydxd::x#5 bitmap_line_ydxd::x#0 bitmap_line_ydxd::x#1 bitmap_line_ydxd::x#6 bitmap_line_ydxd::x#2 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x1#1 bitmap_line_xdyd::x1#0 modr16u::return#3 memcpy_in_vram::i#2 memcpy_in_vram::i#1 ] zp[2]:57 [ bitmap_clear::vdelta#0 mul16u::b#0 bitmap_init::$7 bitmap_line::x1#10 bitmap_line::x1#0 bitmap_line::x1#1 bitmap_line_ydxi::x#3 bitmap_line_ydxi::x#5 bitmap_line_ydxi::x#1 bitmap_line_ydxi::x#0 bitmap_line_ydxi::x#6 bitmap_line_ydxi::x#2 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x1#1 bitmap_line_xdyi::x1#0 bitmap_line_ydxd::x#3 bitmap_line_ydxd::x#5 bitmap_line_ydxd::x#0 bitmap_line_ydxd::x#1 bitmap_line_ydxd::x#6 bitmap_line_ydxd::x#2 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x1#1 bitmap_line_xdyd::x1#0 modr16u::return#3 memcpy_in_vram::i#2 memcpy_in_vram::i#1 ]
reg byte a [ bitmap_clear::$0 ] reg byte a [ bitmap_clear::$0 ]
reg byte a [ bitmap_clear::$1 ] reg byte a [ bitmap_clear::$1 ]
reg byte a [ bitmap_clear::$8 ] reg byte a [ bitmap_clear::$7 ]
zp[2]:67 [ bitmap_clear::$3 bitmap_init::$23 bitmap_init::$29 bitmap_line::y0#10 bitmap_line::y0#0 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::y1#1 bitmap_line_ydxi::y1#0 bitmap_line_xdyi::y#3 bitmap_line_xdyi::y#5 bitmap_line_xdyi::y#1 bitmap_line_xdyi::y#0 bitmap_line_xdyi::y#6 bitmap_line_xdyi::y#2 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::y1#0 bitmap_line_ydxd::y1#1 bitmap_line_xdyd::y#3 bitmap_line_xdyd::y#5 bitmap_line_xdyd::y#1 bitmap_line_xdyd::y#0 bitmap_line_xdyd::y#6 bitmap_line_xdyd::y#2 modr16u::return#4 cputs::s#8 cputs::s#9 cputs::s#0 ]
reg byte x [ bitmap_clear::vbank#0 ] reg byte x [ bitmap_clear::vbank#0 ]
zp[2]:69 [ bitmap_clear::vdest#0 memset_vram::vdest#0 bitmap_init::$30 divr16u::rem#4 divr16u::rem#10 divr16u::rem#5 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::yd#1 bitmap_line_ydxi::yd#0 bitmap_line::yd#2 bitmap_line::yd#11 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::yd#1 bitmap_line_xdyi::yd#0 ] zp[2]:59 [ bitmap_clear::vdest#0 memset_vram::vdest#0 bitmap_init::$23 bitmap_init::$29 bitmap_line::y0#10 bitmap_line::y0#0 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::y1#1 bitmap_line_ydxi::y1#0 bitmap_line_xdyi::y#3 bitmap_line_xdyi::y#5 bitmap_line_xdyi::y#1 bitmap_line_xdyi::y#0 bitmap_line_xdyi::y#6 bitmap_line_xdyi::y#2 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::y1#0 bitmap_line_ydxd::y1#1 bitmap_line_xdyd::y#3 bitmap_line_xdyd::y#5 bitmap_line_xdyd::y#1 bitmap_line_xdyd::y#0 bitmap_line_xdyd::y#6 bitmap_line_xdyd::y#2 modr16u::return#4 cputs::s#8 cputs::s#9 cputs::s#0 ]
reg byte x [ memset_vram::vbank#0 ] reg byte x [ memset_vram::vbank#0 ]
zp[1]:71 [ kbhit::ch ] zp[1]:61 [ kbhit::ch ]
reg byte a [ kbhit::return#0 ] reg byte a [ kbhit::return#0 ]
reg byte a [ kbhit::return#1 ] reg byte a [ kbhit::return#1 ]
zp[2]:72 [ rand::$0 bitmap_init::$31 divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 bitmap_line_ydxi::y#3 bitmap_line_ydxi::y#6 bitmap_line_ydxi::y#1 bitmap_line_ydxi::y#0 bitmap_line_ydxi::y#2 bitmap_plot::y#4 bitmap_plot::y#1 bitmap_plot::y#0 bitmap_plot::y#3 bitmap_plot::y#2 bitmap_line_ydxd::y#2 bitmap_line_ydxd::y#7 bitmap_line_ydxd::y#0 bitmap_line_ydxd::y#1 bitmap_line_ydxd::y#3 ] zp[2]:62 [ rand::$0 bitmap_init::$30 divr16u::rem#4 divr16u::rem#10 divr16u::rem#5 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::yd#1 bitmap_line_ydxi::yd#0 bitmap_line::yd#2 bitmap_line::yd#11 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::yd#1 bitmap_line_xdyi::yd#0 ]
zp[2]:74 [ rand::$1 bitmap_init::$10 clearline::c#2 clearline::c#1 bitmap_line_xdyi::x#3 bitmap_line_xdyi::x#6 bitmap_line_xdyi::x#1 bitmap_line_xdyi::x#0 bitmap_line_xdyi::x#2 bitmap_plot::x#4 bitmap_plot::x#1 bitmap_plot::x#0 bitmap_plot::x#3 bitmap_plot::x#2 bitmap_line_xdyd::x#3 bitmap_line_xdyd::x#6 bitmap_line_xdyd::x#1 bitmap_line_xdyd::x#0 bitmap_line_xdyd::x#2 ] zp[2]:64 [ rand::$1 bitmap_init::$31 divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 bitmap_line_ydxi::y#3 bitmap_line_ydxi::y#6 bitmap_line_ydxi::y#1 bitmap_line_ydxi::y#0 bitmap_line_ydxi::y#2 bitmap_plot::y#4 bitmap_plot::y#1 bitmap_plot::y#0 bitmap_plot::y#3 bitmap_plot::y#2 bitmap_line_ydxd::y#2 bitmap_line_ydxd::y#7 bitmap_line_ydxd::y#0 bitmap_line_ydxd::y#1 bitmap_line_ydxd::y#3 ]
zp[2]:76 [ vera_layer_set_text_color_mode::addr#0 vera_layer_mode_tile::$4 ] zp[2]:66 [ rand::$2 bitmap_init::$10 clearline::c#2 clearline::c#1 bitmap_line_xdyi::x#3 bitmap_line_xdyi::x#6 bitmap_line_xdyi::x#1 bitmap_line_xdyi::x#0 bitmap_line_xdyi::x#2 bitmap_plot::x#4 bitmap_plot::x#1 bitmap_plot::x#0 bitmap_plot::x#3 bitmap_plot::x#2 bitmap_line_xdyd::x#3 bitmap_line_xdyd::x#6 bitmap_line_xdyd::x#1 bitmap_line_xdyd::x#0 bitmap_line_xdyd::x#2 ]
reg byte a [ vera_layer_get_mapbase_bank::return#0 ] reg byte a [ vera_layer_get_mapbase_bank::return#0 ]
reg byte a [ vera_layer_get_mapbase_offset::$0 ] reg byte a [ vera_layer_get_mapbase_offset::$0 ]
reg byte a [ vera_layer_get_rowshift::return#0 ] reg byte a [ vera_layer_get_rowshift::return#0 ]
reg byte a [ vera_layer_get_rowskip::$0 ] reg byte a [ vera_layer_get_rowskip::$0 ]
reg byte a [ vera_layer_set_config::$0 ] reg byte a [ vera_layer_set_config::$0 ]
reg byte a [ vera_layer_set_tilebase::$0 ] reg byte a [ vera_layer_set_tilebase::$0 ]
zp[2]:78 [ vera_layer_set_tilebase::addr#0 vera_layer_set_config::addr#0 ] zp[2]:68 [ vera_layer_set_tilebase::addr#0 vera_layer_set_config::addr#0 vera_layer_set_text_color_mode::addr#0 vera_layer_set_mapbase::addr#0 screenlayer::vera_layer_get_width1_return#0 screenlayer::vera_layer_get_width1_return#1 screenlayer::$2 ]
reg byte a [ vera_layer_get_backcolor::return#1 ] reg byte a [ vera_layer_get_backcolor::return#1 ]
reg byte a [ vera_layer_get_textcolor::return#1 ] reg byte a [ vera_layer_get_textcolor::return#1 ]
reg byte a [ vera_layer_get_color::return#0 ] reg byte a [ vera_layer_get_color::return#0 ]
reg byte x [ cputc::color#0 ] reg byte x [ cputc::color#0 ]
reg byte a [ cputc::$15 ] reg byte a [ cputc::$15 ]
zp[2]:70 [ cputc::conio_addr#0 cputc::conio_addr#1 bitmap_init::$24 bitmap_init::$32 bitmap_line_xdyd::e#3 bitmap_line_xdyd::e#0 bitmap_line_xdyd::e#6 bitmap_line_xdyd::e#2 bitmap_line_xdyd::e#1 bitmap_line_ydxd::e#3 bitmap_line_ydxd::e#0 bitmap_line_ydxd::e#6 bitmap_line_ydxd::e#2 bitmap_line_ydxd::e#1 bitmap_line_xdyi::e#3 bitmap_line_xdyi::e#0 bitmap_line_xdyi::e#6 bitmap_line_xdyi::e#2 bitmap_line_xdyi::e#1 bitmap_line_ydxi::e#3 bitmap_line_ydxi::e#0 bitmap_line_ydxi::e#6 bitmap_line_ydxi::e#2 bitmap_line_ydxi::e#1 ]
reg byte a [ cputc::$2 ] reg byte a [ cputc::$2 ]
reg byte a [ cputc::$4 ] reg byte a [ cputc::$4 ]
reg byte a [ cputc::$5 ] reg byte a [ cputc::$5 ]
reg byte a [ cputc::$6 ] reg byte a [ cputc::$6 ]
reg byte a [ cputc::scroll_enable#0 ] reg byte a [ cputc::scroll_enable#0 ]
zp[2]:72 [ cputc::$16 bitmap_init::$33 ]
reg byte a [ mul16u::$1 ] reg byte a [ mul16u::$1 ]
reg byte a [ memset_vram::$0 ] reg byte a [ memset_vram::$0 ]
reg byte a [ memset_vram::$1 ] reg byte a [ memset_vram::$1 ]
reg byte a [ memset_vram::$2 ] reg byte a [ memset_vram::$2 ]
zp[2]:80 [ bitmap_line_ydxi::$6 bitmap_init::$13 ] zp[2]:74 [ bitmap_line_ydxi::$6 bitmap_init::$34 ]
zp[2]:82 [ bitmap_line_xdyi::$6 bitmap_init::$25 bitmap_init::$35 ] zp[2]:76 [ bitmap_line_xdyi::$6 bitmap_init::$13 ]
zp[2]:84 [ bitmap_line_ydxd::$6 bitmap_init::$36 ] zp[2]:78 [ bitmap_line_ydxd::$6 bitmap_init::$25 bitmap_init::$35 ]
zp[2]:86 [ bitmap_line_xdyd::$6 bitmap_init::$37 ] zp[2]:80 [ bitmap_line_xdyd::$6 bitmap_init::$36 ]
reg byte a [ divr16u::$1 ] reg byte a [ divr16u::$1 ]
reg byte a [ divr16u::$2 ] reg byte a [ divr16u::$2 ]
zp[2]:88 [ rem16u#0 ] zp[2]:82 [ rem16u#0 ]
reg byte a [ vera_layer_get_color::$3 ] reg byte a [ vera_layer_get_color::$3 ]
zp[2]:84 [ vera_layer_get_color::addr#0 bitmap_init::$37 ]
reg byte a [ vera_layer_get_color::$0 ] reg byte a [ vera_layer_get_color::$0 ]
reg byte a [ vera_layer_get_color::$1 ] reg byte a [ vera_layer_get_color::$1 ]
reg byte a [ cputln::$2 ] reg byte a [ cputln::$2 ]
zp[2]:90 [ cputln::temp#0 cputln::temp#1 bitmap_init::$39 bitmap_line_xdyd::e#3 bitmap_line_xdyd::e#0 bitmap_line_xdyd::e#6 bitmap_line_xdyd::e#2 bitmap_line_xdyd::e#1 bitmap_line_ydxd::e#3 bitmap_line_ydxd::e#0 bitmap_line_ydxd::e#6 bitmap_line_ydxd::e#2 bitmap_line_ydxd::e#1 bitmap_line_xdyi::e#3 bitmap_line_xdyi::e#0 bitmap_line_xdyi::e#6 bitmap_line_xdyi::e#2 bitmap_line_xdyi::e#1 bitmap_line_ydxi::e#3 bitmap_line_ydxi::e#0 bitmap_line_ydxi::e#6 bitmap_line_ydxi::e#2 bitmap_line_ydxi::e#1 ] zp[2]:86 [ cputln::temp#0 cputln::temp#1 bitmap_init::$26 bitmap_init::$38 ]
reg byte a [ cputln::$3 ] reg byte a [ cputln::$3 ]
zp[2]:92 [ bitmap_plot::$9 bitmap_plot::$12 bitmap_init::$40 ] zp[2]:88 [ bitmap_plot::$9 bitmap_plot::$12 bitmap_init::$39 ]
zp[4]:94 [ bitmap_plot::plot_x#0 bitmap_plot::vera_vram_address01_bankaddr#0 mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16u::return#0 bitmap_clear::count#0 memset_vram::num#0 bitmap_init::yoffs#2 bitmap_init::yoffs#0 bitmap_init::yoffs#1 ] zp[4]:90 [ bitmap_plot::plot_x#0 bitmap_plot::vera_vram_address01_bankaddr#0 mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16u::return#0 bitmap_clear::count#0 memset_vram::num#0 bitmap_init::yoffs#2 bitmap_init::yoffs#0 bitmap_init::yoffs#1 ]
zp[2]:98 [ bitmap_plot::$10 bitmap_plot::$13 bitmap_init::hdelta#0 ] zp[2]:94 [ bitmap_plot::$10 bitmap_plot::$13 bitmap_init::$40 ]
zp[4]:100 [ bitmap_plot::plot_y#0 memset_vram::i#2 memset_vram::i#1 mul16u::mb#2 mul16u::mb#0 mul16u::mb#1 ] zp[4]:96 [ bitmap_plot::plot_y#0 memset_vram::i#2 memset_vram::i#1 mul16u::mb#2 mul16u::mb#0 mul16u::mb#1 ]
zp[2]:104 [ bitmap_plot::$14 bitmap_init::$28 bitmap_init::$41 ] zp[2]:100 [ bitmap_plot::$14 bitmap_init::hdelta#0 ]
reg byte a [ bitmap_plot::bitshift#0 ] reg byte a [ bitmap_plot::bitshift#0 ]
reg byte a [ bitmap_plot::vera_vram_address01_$0 ]
reg byte a [ bitmap_plot::vera_vram_address01_$1 ] reg byte a [ bitmap_plot::vera_vram_address01_$1 ]
zp[2]:106 [ bitmap_plot::vera_vram_address01_$2 rand::$2 bitmap_init::$24 bitmap_init::$32 ]
reg byte a [ bitmap_plot::vera_vram_address01_$3 ] reg byte a [ bitmap_plot::vera_vram_address01_$3 ]
zp[2]:108 [ bitmap_plot::vera_vram_address01_$4 cputc::conio_addr#0 cputc::conio_addr#1 bitmap_init::$33 ] zp[2]:102 [ bitmap_plot::$15 bitmap_init::$28 bitmap_init::$41 ]
reg byte a [ bitmap_plot::vera_vram_address01_$6 ]
zp[2]:110 [ bitmap_plot::$15 cputc::$16 bitmap_init::$34 ]
reg byte a [ bitmap_plot::$6 ] reg byte a [ bitmap_plot::$6 ]
reg byte a [ bitmap_plot::$7 ] reg byte a [ bitmap_plot::$7 ]
reg byte a [ bitmap_plot::$8 ] reg byte a [ bitmap_plot::$8 ]
zp[1]:112 [ insertup::cy#0 ] zp[1]:104 [ insertup::cy#0 ]
zp[1]:113 [ insertup::width#0 ] zp[1]:105 [ insertup::width#0 ]
reg byte a [ insertup::$3 ] reg byte a [ insertup::$3 ]
reg byte a [ clearline::$5 ] reg byte a [ clearline::$5 ]
zp[2]:114 [ clearline::addr#0 bitmap_plot::vera_vram_address01_$0 vera_layer_get_color::addr#0 bitmap_init::$26 bitmap_init::$38 ] zp[2]:106 [ clearline::addr#0 bitmap_init::vera_layer_get_color_depth1_config#0 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::yd#0 bitmap_line_ydxd::yd#1 bitmap_line::yd#1 bitmap_line::yd#10 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::yd#1 bitmap_line_xdyd::yd#0 ]
reg byte a [ clearline::$1 ] reg byte a [ clearline::$1 ]
reg byte a [ clearline::$2 ] reg byte a [ clearline::$2 ]
reg byte a [ vera_layer_get_color::return#4 ] reg byte a [ vera_layer_get_color::return#4 ]