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6 Commits
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37a9788a10
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37a9788a10 | ||
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8416086294 | ||
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771fa9dbcd | ||
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dc65b10ece | ||
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ef7ab9be16 |
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@ -21,70 +21,70 @@
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/// Keyboard Codes for all 63 keys.
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/// Keyboard Codes are %00rrrccc, where rrr is the row ID (0-7) and ccc is the column ID (0-7).
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/// See C64 Keyboard Matrix Reference http://codebase64.org/doku.php?id=base:reading_the_keyboard
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const char KEY_DEL = $00;
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const char KEY_RETURN = $01;
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const char KEY_CRSR_RIGHT = $02;
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const char KEY_F7 = $03;
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const char KEY_F1 = $04;
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const char KEY_F3 = $05;
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const char KEY_F5 = $06;
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const char KEY_CRSR_DOWN = $07;
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const char KEY_3 = $08;
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const char KEY_W = $09;
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const char KEY_A = $0a;
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const char KEY_4 = $0b;
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const char KEY_Z = $0c;
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const char KEY_S = $0d;
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const char KEY_E = $0e;
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const char KEY_LSHIFT = $0f;
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const char KEY_5 = $10;
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const char KEY_R = $11;
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const char KEY_D = $12;
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const char KEY_6 = $13;
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const char KEY_C = $14;
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const char KEY_F = $15;
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const char KEY_T = $16;
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const char KEY_X = $17;
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const char KEY_7 = $18;
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const char KEY_Y = $19;
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const char KEY_G = $1a;
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const char KEY_8 = $1b;
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const char KEY_B = $1c;
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const char KEY_H = $1d;
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const char KEY_U = $1e;
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const char KEY_V = $1f;
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const char KEY_9 = $20;
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const char KEY_I = $21;
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const char KEY_J = $22;
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const char KEY_0 = $23;
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const char KEY_M = $24;
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const char KEY_K = $25;
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const char KEY_O = $26;
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const char KEY_N = $27;
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const char KEY_PLUS = $28;
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const char KEY_P = $29;
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const char KEY_L = $2a;
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const char KEY_MINUS = $2b;
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const char KEY_DOT = $2c;
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const char KEY_COLON = $2d;
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const char KEY_AT = $2e;
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const char KEY_COMMA = $2f;
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const char KEY_POUND = $30;
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const char KEY_ASTERISK = $31;
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const char KEY_SEMICOLON = $32;
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const char KEY_HOME = $33;
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const char KEY_RSHIFT = $34;
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const char KEY_EQUALS = $35;
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const char KEY_ARROW_UP = $36;
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const char KEY_SLASH = $37;
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const char KEY_1 = $38;
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const char KEY_ARROW_LEFT = $39;
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const char KEY_CTRL = $3a;
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const char KEY_2 = $3b;
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const char KEY_SPACE = $3c;
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const char KEY_COMMODORE = $3d;
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const char KEY_Q = $3e;
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const char KEY_RUNSTOP = $3f;
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const char KEY_DEL = 0x00;
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const char KEY_RETURN = 0x01;
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const char KEY_CRSR_RIGHT = 0x02;
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const char KEY_F7 = 0x03;
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const char KEY_F1 = 0x04;
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const char KEY_F3 = 0x05;
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const char KEY_F5 = 0x06;
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const char KEY_CRSR_DOWN = 0x07;
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const char KEY_3 = 0x08;
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const char KEY_W = 0x09;
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const char KEY_A = 0x0a;
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const char KEY_4 = 0x0b;
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const char KEY_Z = 0x0c;
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const char KEY_S = 0x0d;
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const char KEY_E = 0x0e;
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const char KEY_LSHIFT = 0x0f;
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const char KEY_5 = 0x10;
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const char KEY_R = 0x11;
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const char KEY_D = 0x12;
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const char KEY_6 = 0x13;
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const char KEY_C = 0x14;
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const char KEY_F = 0x15;
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const char KEY_T = 0x16;
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const char KEY_X = 0x17;
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const char KEY_7 = 0x18;
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const char KEY_Y = 0x19;
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const char KEY_G = 0x1a;
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const char KEY_8 = 0x1b;
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const char KEY_B = 0x1c;
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const char KEY_H = 0x1d;
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const char KEY_U = 0x1e;
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const char KEY_V = 0x1f;
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const char KEY_9 = 0x20;
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const char KEY_I = 0x21;
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const char KEY_J = 0x22;
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const char KEY_0 = 0x23;
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const char KEY_M = 0x24;
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const char KEY_K = 0x25;
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const char KEY_O = 0x26;
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const char KEY_N = 0x27;
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const char KEY_PLUS = 0x28;
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const char KEY_P = 0x29;
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const char KEY_L = 0x2a;
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const char KEY_MINUS = 0x2b;
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const char KEY_DOT = 0x2c;
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const char KEY_COLON = 0x2d;
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const char KEY_AT = 0x2e;
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const char KEY_COMMA = 0x2f;
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const char KEY_POUND = 0x30;
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const char KEY_ASTERISK = 0x31;
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const char KEY_SEMICOLON = 0x32;
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const char KEY_HOME = 0x33;
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const char KEY_RSHIFT = 0x34;
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const char KEY_EQUALS = 0x35;
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const char KEY_ARROW_UP = 0x36;
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const char KEY_SLASH = 0x37;
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const char KEY_1 = 0x38;
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const char KEY_ARROW_LEFT = 0x39;
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const char KEY_CTRL = 0x3a;
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const char KEY_2 = 0x3b;
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const char KEY_SPACE = 0x3c;
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const char KEY_COMMODORE = 0x3d;
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const char KEY_Q = 0x3e;
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const char KEY_RUNSTOP = 0x3f;
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/// Initialize keyboard reading by setting CIA#$ Data Direction Registers
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void keyboard_init();
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@ -47,8 +47,18 @@ char * const DEFAULT_FONT_MIXED = (char*)0x1800;
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struct MOS6526_CIA * const CIA1 = (struct MOS6526_CIA *)0xdc00;
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/// The CIA#2: Serial bus, RS-232, VIC memory bank
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struct MOS6526_CIA * const CIA2 = (struct MOS6526_CIA *)0xdd00;
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/// CIA#1 timer A
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unsigned int* const CIA1_TIMER_A = (unsigned int*)0xdc04;
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/// CIA#1 timer B
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unsigned int* const CIA1_TIMER_B = (unsigned int*)0xdc06;
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/// CIA#1 timer A&B as one single 32-bit value
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unsigned long* const CIA1_TIMER_AB = (unsigned long*)0xdc04;
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/// CIA#1 Interrupt for reading in ASM
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char * const CIA1_INTERRUPT = (char*)0xdc0d;
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/// CIA#2 timer A
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unsigned int* const CIA2_TIMER_A = (unsigned int*)0xdd04;
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/// CIA#2 timer B
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unsigned int* const CIA2_TIMER_B = (unsigned int*)0xdd06;
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/// CIA#2 timer A&B as one single 32-bit value
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unsigned long* const CIA2_TIMER_AB = (unsigned long*)0xdd04;
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/// CIA#2 Interrupt for reading in ASM
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@ -61,6 +71,10 @@ typedef void (*IRQ_TYPE)(void);
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IRQ_TYPE * const KERNEL_IRQ = (IRQ_TYPE*)0x0314;
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/// The vector used when the KERNAL serves NMI interrupts
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IRQ_TYPE * const KERNEL_NMI = (IRQ_TYPE*)0x0318;
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/// The vector used when the HARDWARE serves NMI interrupts
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IRQ_TYPE * const HARDWARE_NMI = (IRQ_TYPE*)0xfffa;
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/// The vector used when the HARDWARE is RESET
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IRQ_TYPE * const HARDWARE_RESET = (IRQ_TYPE*)0xfffc;
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/// The vector used when the HARDWARE serves IRQ interrupts
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IRQ_TYPE * const HARDWARE_IRQ = (IRQ_TYPE*)0xfffe;
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@ -9,58 +9,58 @@
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#include <c64.h>
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/// Feature enables or disables the extra C64 DTV features
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char* const DTV_FEATURE = (char*)$d03f;
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char* const DTV_FEATURE = (char*)0xd03f;
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const char DTV_FEATURE_ENABLE = 1;
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const char DTV_FEATURE_DISABLE_TIL_RESET = 2;
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/// Controls the graphics modes of the C64 DTV
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char* const DTV_CONTROL = (char*)$d03c;
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const char DTV_LINEAR = $01;
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const char DTV_BORDER_OFF = $02;
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const char DTV_HIGHCOLOR = $04;
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const char DTV_OVERSCAN = $08;
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const char DTV_COLORRAM_OFF = $10;
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const char DTV_BADLINE_OFF = $20;
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const char DTV_CHUNKY = $40;
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char* const DTV_CONTROL = (char*)0xd03c;
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const char DTV_LINEAR = 0x01;
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const char DTV_BORDER_OFF = 0x02;
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const char DTV_HIGHCOLOR = 0x04;
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const char DTV_OVERSCAN = 0x08;
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const char DTV_COLORRAM_OFF = 0x10;
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const char DTV_BADLINE_OFF = 0x20;
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const char DTV_CHUNKY = 0x40;
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/// Defines colors for the 16 first colors ($00-$0f)
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char* const DTV_PALETTE = (char*)$d200;
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char* const DTV_PALETTE = (char*)0xd200;
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/// Default vallues for the palette
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char DTV_PALETTE_DEFAULT[16] = { $00, $0f, $36, $be, $58, $db, $86, $ff, $29, $26, $3b, $05, $07, $df, $9a, $0a };
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char DTV_PALETTE_DEFAULT[16] = { 0x00, 0x0f, 0x36, 0xbe, 0x58, 0xdb, 0x86, 0xff, 0x29, 0x26, 0x3b, 0x05, 0x07, 0xdf, 0x9a, 0x0a };
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/// Linear Graphics Plane A Counter Control
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char* const DTV_PLANEA_START_LO = (char*)$d03a;
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char* const DTV_PLANEA_START_MI = (char*)$d03b;
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char* const DTV_PLANEA_START_HI = (char*)$d045;
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char* const DTV_PLANEA_STEP = (char*)$d046;
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char* const DTV_PLANEA_MODULO_LO = (char*)$d038;
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char* const DTV_PLANEA_MODULO_HI = (char*)$d039;
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char* const DTV_PLANEA_START_LO = (char*)0xd03a;
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char* const DTV_PLANEA_START_MI = (char*)0xd03b;
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char* const DTV_PLANEA_START_HI = (char*)0xd045;
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char* const DTV_PLANEA_STEP = (char*)0xd046;
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char* const DTV_PLANEA_MODULO_LO = (char*)0xd038;
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char* const DTV_PLANEA_MODULO_HI = (char*)0xd039;
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/// Linear Graphics Plane B Counter Control
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char* const DTV_PLANEB_START_LO = (char*)$d049;
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char* const DTV_PLANEB_START_MI = (char*)$d04a;
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char* const DTV_PLANEB_START_HI = (char*)$d04b;
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char* const DTV_PLANEB_STEP = (char*)$d04c;
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char* const DTV_PLANEB_MODULO_LO = (char*)$d047;
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char* const DTV_PLANEB_MODULO_HI = (char*)$d048;
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char* const DTV_PLANEB_START_LO = (char*)0xd049;
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char* const DTV_PLANEB_START_MI = (char*)0xd04a;
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char* const DTV_PLANEB_START_HI = (char*)0xd04b;
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char* const DTV_PLANEB_STEP = (char*)0xd04c;
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char* const DTV_PLANEB_MODULO_LO = (char*)0xd047;
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char* const DTV_PLANEB_MODULO_HI = (char*)0xd048;
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/// Select memory bank where sprite data is fetched from (bits 5:0) - source only (J)
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/// Memory address of Sprite RAM is SpriteBank*$10000
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char* const DTV_SPRITE_BANK = (char*)$d04d;
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char* const DTV_SPRITE_BANK = (char*)0xd04d;
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/// Select memory bank where color data is fetched from (bits 11:0)
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/// Memory address of Color RAM is ColorBank*$400
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char* const DTV_COLOR_BANK_LO = (char*)$d036;
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char* const DTV_COLOR_BANK_HI = (char*)$d037;
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char* const DTV_COLOR_BANK_LO = (char*)0xd036;
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char* const DTV_COLOR_BANK_HI = (char*)0xd037;
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const unsigned long DTV_COLOR_BANK_DEFAULT = $1d800;
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const unsigned long DTV_COLOR_BANK_DEFAULT = 0x1d800;
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/// Selects memory bank for normal VIC color mode and lower data for high color modes. (bits 5:0)
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/// Memory address of VIC Graphics is GraphicsBank*$10000
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char* const DTV_GRAPHICS_VIC_BANK = (char*)$d03d;
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char* const DTV_GRAPHICS_VIC_BANK = (char*)0xd03d;
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/// Selects memory bank for upper data for high color modes. (bits 5:0) - source only (H)
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char* const DTV_GRAPHICS_HICOL_BANK = (char*)$d03e;
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char* const DTV_GRAPHICS_HICOL_BANK = (char*)0xd03e;
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/// Set the memory pointed to by CPU BANK 1 SEGMENT ($4000-$7fff)
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/// This sets which actual memory is addressed when the CPU reads/writes to $4000-$7fff
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@ -68,107 +68,107 @@ char* const DTV_GRAPHICS_HICOL_BANK = (char*)$d03e;
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void dtvSetCpuBankSegment1(char cpuBankIdx);
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/// Blitter Source A Start
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char* const DTV_BLITTER_SRCA_LO = (char*)$d320;
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char* const DTV_BLITTER_SRCA_MI = (char*)$d321;
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char* const DTV_BLITTER_SRCA_HI = (char*)$d322;
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char* const DTV_BLITTER_SRCA_LO = (char*)0xd320;
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char* const DTV_BLITTER_SRCA_MI = (char*)0xd321;
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char* const DTV_BLITTER_SRCA_HI = (char*)0xd322;
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/// Blitter Source A Modulo
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char* const DTV_BLITTER_SRCA_MOD_LO = (char*)$d323;
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char* const DTV_BLITTER_SRCA_MOD_HI = (char*)$d324;
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char* const DTV_BLITTER_SRCA_MOD_LO = (char*)0xd323;
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char* const DTV_BLITTER_SRCA_MOD_HI = (char*)0xd324;
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/// Blitter Source A Line Length
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char* const DTV_BLITTER_SRCA_LIN_LO = (char*)$d325;
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char* const DTV_BLITTER_SRCA_LIN_HI = (char*)$d326;
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char* const DTV_BLITTER_SRCA_LIN_LO = (char*)0xd325;
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char* const DTV_BLITTER_SRCA_LIN_HI = (char*)0xd326;
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/// Blitter Source A Step ([7:4] integral part, [3:0] fractional part)
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char* const DTV_BLITTER_SRCA_STEP = (char*)$d327;
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char* const DTV_BLITTER_SRCA_STEP = (char*)0xd327;
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/// Blitter Source B Start
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char* const DTV_BLITTER_SRCB_LO = (char*)$d328;
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char* const DTV_BLITTER_SRCB_MI = (char*)$d329;
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char* const DTV_BLITTER_SRCB_HI = (char*)$d32a;
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char* const DTV_BLITTER_SRCB_LO = (char*)0xd328;
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char* const DTV_BLITTER_SRCB_MI = (char*)0xd329;
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char* const DTV_BLITTER_SRCB_HI = (char*)0xd32a;
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/// Blitter Source B Modulo
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char* const DTV_BLITTER_SRCB_MOD_LO = (char*)$d32b;
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char* const DTV_BLITTER_SRCB_MOD_HI = (char*)$d32c;
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char* const DTV_BLITTER_SRCB_MOD_LO = (char*)0xd32b;
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char* const DTV_BLITTER_SRCB_MOD_HI = (char*)0xd32c;
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/// Blitter Source B Line Length
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char* const DTV_BLITTER_SRCB_LIN_LO = (char*)$d32d;
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char* const DTV_BLITTER_SRCB_LIN_HI = (char*)$d32e;
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char* const DTV_BLITTER_SRCB_LIN_LO = (char*)0xd32d;
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char* const DTV_BLITTER_SRCB_LIN_HI = (char*)0xd32e;
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/// Blitter Source B Step ([7:4] integral part, [3:0] fractional part)
|
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char* const DTV_BLITTER_SRCB_STEP = (char*)$d32f;
|
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char* const DTV_BLITTER_SRCB_STEP = (char*)0xd32f;
|
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/// Blitter Destination Start
|
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char* const DTV_BLITTER_DEST_LO = (char*)$d330;
|
||||
char* const DTV_BLITTER_DEST_MI = (char*)$d331;
|
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char* const DTV_BLITTER_DEST_HI = (char*)$d332;
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||||
char* const DTV_BLITTER_DEST_LO = (char*)0xd330;
|
||||
char* const DTV_BLITTER_DEST_MI = (char*)0xd331;
|
||||
char* const DTV_BLITTER_DEST_HI = (char*)0xd332;
|
||||
/// Blitter Source B Modulo
|
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char* const DTV_BLITTER_DEST_MOD_LO = (char*)$d333;
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char* const DTV_BLITTER_DEST_MOD_HI = (char*)$d334;
|
||||
char* const DTV_BLITTER_DEST_MOD_LO = (char*)0xd333;
|
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char* const DTV_BLITTER_DEST_MOD_HI = (char*)0xd334;
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/// Blitter Source B Line Length
|
||||
char* const DTV_BLITTER_DEST_LIN_LO = (char*)$d335;
|
||||
char* const DTV_BLITTER_DEST_LIN_HI = (char*)$d336;
|
||||
char* const DTV_BLITTER_DEST_LIN_LO = (char*)0xd335;
|
||||
char* const DTV_BLITTER_DEST_LIN_HI = (char*)0xd336;
|
||||
/// Blitter Source B Step ([7:4] integral part, [3:0] fractional part)
|
||||
char* const DTV_BLITTER_DEST_STEP = (char*)$d337;
|
||||
char* const DTV_BLITTER_DEST_STEP = (char*)0xd337;
|
||||
/// Blitter Blit Length
|
||||
char* const DTV_BLITTER_LEN_LO = (char*)$d338;
|
||||
char* const DTV_BLITTER_LEN_HI = (char*)$d339;
|
||||
char* const DTV_BLITTER_LEN_LO = (char*)0xd338;
|
||||
char* const DTV_BLITTER_LEN_HI = (char*)0xd339;
|
||||
/// Blitter Control
|
||||
char* const DTV_BLITTER_CONTROL = (char*)$d33a;
|
||||
char* const DTV_BLITTER_CONTROL = (char*)0xd33a;
|
||||
/// Bit[0] Force Start Strobe when set
|
||||
const char DTV_BLIT_FORCE_START = %00000001;
|
||||
const char DTV_BLIT_FORCE_START = 0b00000001;
|
||||
/// Bit[1] Source A Direction Positive when set
|
||||
const char DTV_BLIT_SRCA_FWD = %00000010;
|
||||
const char DTV_BLIT_SRCA_FWD = 0b00000010;
|
||||
/// Bit[2] Source B Direction Positive when set
|
||||
const char DTV_BLIT_SRCB_FWD = %00000100;
|
||||
const char DTV_BLIT_SRCB_FWD = 0b00000100;
|
||||
/// Bit[3] Destination Direction Positive when set
|
||||
const char DTV_BLIT_DEST_FWD = %00001000;
|
||||
const char DTV_BLIT_DEST_FWD = 0b00001000;
|
||||
/// Bit[4] VIC IRQ Start when set
|
||||
const char DTV_BLIT_VIC_IRQ = %00010000;
|
||||
const char DTV_BLIT_VIC_IRQ = 0b00010000;
|
||||
/// Bit[5] CIA IRQ Start when set($DCXX CIA)
|
||||
const char DTV_BLIT_CIA_IRQ = %00100000;
|
||||
const char DTV_BLIT_CIA_IRQ = 0b00100000;
|
||||
/// Bit[6] V Blank Start when set
|
||||
const char DTV_BLIT_VBLANK = %01000000;
|
||||
const char DTV_BLIT_VBLANK = 0b01000000;
|
||||
/// Bit[7] Blitter IRQ Enable when set
|
||||
const char DTV_BLIT_IRQ_EN = %10000000;
|
||||
const char DTV_BLIT_IRQ_EN = 0b10000000;
|
||||
/// Blitter Transparency
|
||||
char* const DTV_BLITTER_TRANSPARANCY = (char*)$d33b;
|
||||
char* const DTV_BLITTER_TRANSPARANCY = (char*)0xd33b;
|
||||
/// Bit[0] Disable Channel B.
|
||||
/// (data into b port of ALU is forced to %00000000. ALU functions as normal)
|
||||
const char DTV_BLIT_DISABLE_B = %00000001;
|
||||
const char DTV_BLIT_DISABLE_B = 0b00000001;
|
||||
/// Bit[1] Write Transparent Data when set
|
||||
//(Data will be written if source a data *IS* %00000000. This can be used with channel b and ALU set to OR to write Data masked by source A.) Cycles will be saved if No writes.
|
||||
const char DTV_BLIT_WRITE_TRANSPARENT = %00000010;
|
||||
const char DTV_BLIT_WRITE_TRANSPARENT = 0b00000010;
|
||||
/// Bit[2] Write Non Transparent
|
||||
/// when set (Data will be written if SourceA fetched data is *NOT* %00000000. This may be used combined with channel b data and/or ALU) Cycles will be Saved if no write. Bit[2]==Bit[1]==0: write in any case
|
||||
const char DTV_BLIT_WRITE_NONTRANSPARENT = %00000100;
|
||||
const char DTV_BLIT_WRITE_NONTRANSPARENT = 0b00000100;
|
||||
/// No transparancy
|
||||
/// Bit[2]==Bit[1]==0: write in any case
|
||||
const char DTV_BLIT_TRANSPARANCY_NONE = %00000000;
|
||||
const char DTV_BLIT_TRANSPARANCY_NONE = 0b00000000;
|
||||
/// Controls the ALU operation
|
||||
char* DTV_BLITTER_ALU = (char*)$d33e;
|
||||
char* DTV_BLITTER_ALU = (char*)0xd33e;
|
||||
/// Bit[2:0] Source A right Shift: 000 SourceA Data, 001 LastA[0],SourceA[7:1], ..., 111 LastA[6:0],SourceA[7]
|
||||
const char DTV_BLIT_SHIFT0 = %00000000;
|
||||
const char DTV_BLIT_SHIFT1 = %00000001;
|
||||
const char DTV_BLIT_SHIFT2 = %00000010;
|
||||
const char DTV_BLIT_SHIFT3 = %00000011;
|
||||
const char DTV_BLIT_SHIFT4 = %00000100;
|
||||
const char DTV_BLIT_SHIFT5 = %00000101;
|
||||
const char DTV_BLIT_SHIFT6 = %00000110;
|
||||
const char DTV_BLIT_SHIFT7 = %00000111;
|
||||
const char DTV_BLIT_SHIFT0 = 0b00000000;
|
||||
const char DTV_BLIT_SHIFT1 = 0b00000001;
|
||||
const char DTV_BLIT_SHIFT2 = 0b00000010;
|
||||
const char DTV_BLIT_SHIFT3 = 0b00000011;
|
||||
const char DTV_BLIT_SHIFT4 = 0b00000100;
|
||||
const char DTV_BLIT_SHIFT5 = 0b00000101;
|
||||
const char DTV_BLIT_SHIFT6 = 0b00000110;
|
||||
const char DTV_BLIT_SHIFT7 = 0b00000111;
|
||||
/// Bit[5:3] Minterms/ALU
|
||||
const char DTV_BLIT_AND = %00000000;
|
||||
const char DTV_BLIT_NAND = %00001000;
|
||||
const char DTV_BLIT_NOR = %00010000;
|
||||
const char DTV_BLIT_OR = %00011000;
|
||||
const char DTV_BLIT_XOR = %00100000;
|
||||
const char DTV_BLIT_XNOR = %00101000;
|
||||
const char DTV_BLIT_ADD = %00110000;
|
||||
const char DTV_BLIT_SUB = %00111000;
|
||||
const char DTV_BLIT_AND = 0b00000000;
|
||||
const char DTV_BLIT_NAND = 0b00001000;
|
||||
const char DTV_BLIT_NOR = 0b00010000;
|
||||
const char DTV_BLIT_OR = 0b00011000;
|
||||
const char DTV_BLIT_XOR = 0b00100000;
|
||||
const char DTV_BLIT_XNOR = 0b00101000;
|
||||
const char DTV_BLIT_ADD = 0b00110000;
|
||||
const char DTV_BLIT_SUB = 0b00111000;
|
||||
/// Blitter Control 2
|
||||
char* const DTV_BLITTER_CONTROL2 = (char*)$d33f;
|
||||
char* const DTV_BLITTER_CONTROL2 = (char*)0xd33f;
|
||||
/// Bit[0] Clear Blitter IRQ
|
||||
const char DTV_BLIT_CLEAR_IRQ = %00000001;
|
||||
const char DTV_BLIT_CLEAR_IRQ = 0b00000001;
|
||||
/// Bit[1] Source A Continue
|
||||
const char DTV_BLIT_SRCA_CONT = %00000010;
|
||||
const char DTV_BLIT_SRCA_CONT = 0b00000010;
|
||||
/// Bit[2] Source B Continue
|
||||
const char DTV_BLIT_SRCB_CONT = %00000100;
|
||||
const char DTV_BLIT_SRCB_CONT = 0b00000100;
|
||||
/// Bit[3] Destination Continue
|
||||
const char DTV_BLIT_DEST_CONT = %00001000;
|
||||
const char DTV_BLIT_DEST_CONT = 0b00001000;
|
||||
/// Bit[0] Busy when set (When reading)
|
||||
const char DTV_BLIT_STATUS_BUSY = %00000001;
|
||||
const char DTV_BLIT_STATUS_BUSY = 0b00000001;
|
||||
/// Bit[1] IRQ when set (When reading)
|
||||
const char DTV_BLIT_STATUS_IRQ = %00000010;
|
||||
const char DTV_BLIT_STATUS_IRQ = 0b00000010;
|
||||
|
|
|
|||
|
|
@ -37,7 +37,21 @@ struct MOS6526_CIA {
|
|||
};
|
||||
|
||||
/// Value that disables all CIA interrupts when stored to the CIA Interrupt registers
|
||||
const char CIA_INTERRUPT_CLEAR = $7f;
|
||||
const char CIA_INTERRUPT_CLEAR_ALL = 0x7f;
|
||||
/// CIA Interrupt: Mask for clearing CIA interrupt flags.
|
||||
const char CIA_INTERRUPT_CLEAR = 0x00;
|
||||
/// CIA Interrupt: Mask for setting CIA interrupt flags.
|
||||
const char CIA_INTERRUPT_SET = 0x80;
|
||||
/// CIA Interrupt: Mask modifying Timer A interrupt. Must be combined the SET/CLEAR.
|
||||
const char CIA_INTERRUPT_TIMERA = 0x01;
|
||||
/// CIA Interrupt: Mask modifying Timer B interrupt. Must be combined the SET/CLEAR.
|
||||
const char CIA_INTERRUPT_TIMERB = 0x02;
|
||||
/// CIA Interrupt: Mask modifying TOD alarm interrupt. Must be combined the SET/CLEAR.
|
||||
const char CIA_INTERRUPT_ALARM = 0x04;
|
||||
/// CIA Interrupt: Mask modifying Serial Data Register Full/Empty interrupt. Must be combined the SET/CLEAR.
|
||||
const char CIA_INTERRUPT_SP = 0x08;
|
||||
/// CIA Interrupt: Mask modifying FLAG pin interrupt. Must be combined the SET/CLEAR.
|
||||
const char CIA_INTERRUPT_FLAG = 0x10;
|
||||
|
||||
/// Timer Control - Start/stop timer (0:stop, 1: start)
|
||||
const char CIA_TIMER_CONTROL_STOP = 0b00000000;
|
||||
|
|
@ -47,6 +61,8 @@ const char CIA_TIMER_CONTROL_START = 0b00000001;
|
|||
const char CIA_TIMER_CONTROL_CONTINUOUS = 0b00000000;
|
||||
/// Timer Control - Time CONTINUOUS/ONE-SHOT (0:CONTINUOUS, 1: ONE-SHOT)
|
||||
const char CIA_TIMER_CONTROL_ONESHOT = 0b00001000;
|
||||
/// Timer Control - FORCE LOAD (this is a STROBE input) (1: FORCE LOAD)
|
||||
const char CIA_TIMER_CONTROL_FORCELOAD = 0b00010000;
|
||||
/// Timer A Control - Timer counts (0:system cycles, 1: CNT pulses)
|
||||
const char CIA_TIMER_CONTROL_A_COUNT_CYCLES = 0b00000000;
|
||||
/// Timer A Control - Timer counts (0:system cycles, 1: CNT pulses)
|
||||
|
|
|
|||
|
|
@ -216,19 +216,19 @@ char* const VICII_CONTROL1 = (char*)0xd011;
|
|||
/// @see #VICII_CONTROL1
|
||||
char* const D011 = (char*)0xd011;
|
||||
/// $D011 Control Register #1 Bit#7: RST8 9th Bit for $D012 Rasterline counter
|
||||
const char VICII_RST8 = %10000000;
|
||||
const char VICII_RST8 = 0b10000000;
|
||||
/// $D011 Control Register #1 Bit#6: ECM Turn Extended Color Mode on/off
|
||||
const char VICII_ECM = %01000000;
|
||||
const char VICII_ECM = 0b01000000;
|
||||
/// $D011 Control Register #1 Bit#5: BMM Turn Bitmap Mode on/off
|
||||
const char VICII_BMM = %00100000;
|
||||
const char VICII_BMM = 0b00100000;
|
||||
/// $D011 Control Register #1 Bit#4: DEN Switch VIC-II output on/off
|
||||
const char VICII_DEN = %00010000;
|
||||
const char VICII_DEN = 0b00010000;
|
||||
/// $D011 Control Register #1 Bit#3: RSEL Switch betweem 25 or 24 visible rows
|
||||
/// RSEL| Display window height | First line | Last line
|
||||
/// ----+--------------------------+-------------+----------
|
||||
/// 0 | 24 text lines/192 pixels | 55 ($37) | 246 ($f6)
|
||||
/// 1 | 25 text lines/200 pixels | 51 ($33) | 250 ($fa)
|
||||
const char VICII_RSEL = %00001000;
|
||||
const char VICII_RSEL = 0b00001000;
|
||||
|
||||
/// $D016 Control register 2
|
||||
/// - Bit#0-#2: XSCROLL Screen Soft Scroll Horizontal
|
||||
|
|
@ -245,13 +245,13 @@ char* const VICII_CONTROL2 = (char*)0xd016;
|
|||
/// @see #VICII_CONTROL2
|
||||
char* const D016 = (char*)0xd016;
|
||||
/// $D016 Control register #2 Bit#4: MCM Turn Multicolor Mode on/off
|
||||
const char VICII_MCM = %00010000;
|
||||
const char VICII_MCM = 0b00010000;
|
||||
/// $D016 Control register #2 Bit#3: CSEL Switch betweem 40 or 38 visible columns
|
||||
/// CSEL| Display window width | First X coo. | Last X coo.
|
||||
/// ----+--------------------------+--------------+------------
|
||||
/// 0 | 38 characters/304 pixels | 31 ($1f) | 334 ($14e)
|
||||
/// 1 | 40 characters/320 pixels | 24 ($18) | 343 ($157)
|
||||
const char VICII_CSEL = %00001000;
|
||||
const char VICII_CSEL = 0b00001000;
|
||||
|
||||
/// $D018 VIC-II base addresses
|
||||
/// - Bit#0: not used
|
||||
|
|
@ -275,20 +275,20 @@ char* const IRQ_ENABLE = (char*)0xd01a;
|
|||
/// | | the VIC for the raster compare. The test for reaching the
|
||||
/// | | interrupt raster line is done in cycle 0 of every line (for line
|
||||
/// | | 0, in cycle 1).
|
||||
const char IRQ_RASTER = %00000001;
|
||||
const char IRQ_RASTER = 0b00000001;
|
||||
/// VICII IRQ Status/Enable Background Collision
|
||||
// @see #IRQ_ENABLE #IRQ_STATUS
|
||||
/// 1 | MBC| Collision of at least one sprite with the text/bitmap graphics
|
||||
/// | | (one sprite data sequencer outputs non-transparent pixel at the
|
||||
/// | | same time at which the graphics data sequencer outputs a
|
||||
/// | | foreground pixel)
|
||||
const char IRQ_COLLISION_BG = %00000010;
|
||||
const char IRQ_COLLISION_BG = 0b00000010;
|
||||
/// VICII IRQ Status/Enable Sprite Collision
|
||||
// @see #IRQ_ENABLE #IRQ_STATUS
|
||||
/// 2 | MMC| Collision of two or more sprites (two sprite data sequencers
|
||||
/// | | output a non-transparent pixel at the same time)
|
||||
const char IRQ_COLLISION_SPRITE = %00000100;
|
||||
const char IRQ_COLLISION_SPRITE = 0b00000100;
|
||||
/// VICII IRQ Status/Enable Lightpen
|
||||
// @see #IRQ_ENABLE #IRQ_STATUS
|
||||
/// 3 | LP | Negative edge on the LP input (lightpen)const char IRQ_RASTER = %00000001;
|
||||
const char IRQ_LIGHTPEN = %00001000;
|
||||
const char IRQ_LIGHTPEN = 0b00001000;
|
||||
|
|
|
|||
|
|
@ -16,19 +16,19 @@ const char bitmap_plot_bit[256];
|
|||
void bitmap_init(char* gfx, char* screen) {
|
||||
bitmap_gfx = gfx;
|
||||
bitmap_screen = screen;
|
||||
char bits = $80;
|
||||
char bits = 0x80;
|
||||
for(char x : 0..255) {
|
||||
bitmap_plot_bit[x] = bits;
|
||||
bits >>= 1;
|
||||
if(bits==0) {
|
||||
bits = $80;
|
||||
bits = 0x80;
|
||||
}
|
||||
}
|
||||
char* yoffs = gfx;
|
||||
for(char y : 0..255) {
|
||||
bitmap_plot_ylo[y] = y&$7 | BYTE0(yoffs);
|
||||
bitmap_plot_ylo[y] = y&0x7 | BYTE0(yoffs);
|
||||
bitmap_plot_yhi[y] = BYTE1(yoffs);
|
||||
if((y&$7)==7) {
|
||||
if((y&0x7)==7) {
|
||||
yoffs = yoffs + 40*8;
|
||||
}
|
||||
}
|
||||
|
|
@ -46,13 +46,13 @@ void bitmap_clear(char bgcol, char fgcol) {
|
|||
// Plot a single dot in the bitmap
|
||||
void bitmap_plot(unsigned int x, char y) {
|
||||
char* plotter = (char*) MAKEWORD( bitmap_plot_yhi[y], bitmap_plot_ylo[y] );
|
||||
plotter += ( x & $fff8 );
|
||||
plotter += ( x & 0xfff8 );
|
||||
*plotter |= bitmap_plot_bit[BYTE0(x)];
|
||||
}
|
||||
|
||||
void bitmap_unplot(unsigned int x, char y) {
|
||||
char* plotter = (char*) MAKEWORD( bitmap_plot_yhi[y], bitmap_plot_ylo[y] );
|
||||
plotter += ( x & $fff8 );
|
||||
plotter += ( x & 0xfff8 );
|
||||
*plotter &= ~(bitmap_plot_bit[BYTE0(x)]);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -25,25 +25,25 @@ const char keyboard_char_keycodes[] = {
|
|||
/*@*/KEY_AT, /*a*/KEY_A, /*b*/KEY_B, /*c*/KEY_C, /*d*/KEY_D, /*e*/KEY_E, /*f*/KEY_F, /*g*/KEY_G,
|
||||
/*h*/KEY_H, /*i*/KEY_I, /*j*/KEY_J, /*k*/KEY_K, /*l*/KEY_L, /*m*/KEY_M, /*n*/KEY_N, /*o*/KEY_O,
|
||||
/*p*/KEY_P, /*q*/KEY_Q, /*r*/KEY_R, /*s*/KEY_S, /*t*/KEY_T, /*u*/KEY_U, /*v*/KEY_V, /*w*/KEY_W,
|
||||
/*x*/KEY_X, /*y*/KEY_Y, /*z*/KEY_Z, /*[*/$3f, /*£*/KEY_POUND, /*]*/$3f, /*^*/KEY_ARROW_UP, /*<-*/KEY_ARROW_LEFT,
|
||||
/* */KEY_SPACE, /*!*/$3f, /*"*/$3f, /*#*/$3f, /*$*/$3f, /*%*/$3f, /*&*/$3f, /*´*/$3f,
|
||||
/*(*/$3f, /*)*/$3f, /***/KEY_ASTERISK, /*+*/KEY_PLUS, /*,*/KEY_COMMA, /*-*/KEY_MINUS, /*.*/KEY_DOT, /*/*/KEY_SLASH,
|
||||
/*x*/KEY_X, /*y*/KEY_Y, /*z*/KEY_Z, /*[*/0x3f, /*£*/KEY_POUND, /*]*/0x3f, /*^*/KEY_ARROW_UP, /*<-*/KEY_ARROW_LEFT,
|
||||
/* */KEY_SPACE, /*!*/0x3f, /*"*/0x3f, /*#*/0x3f, /*$*/0x3f, /*%*/0x3f, /*&*/0x3f, /*´*/0x3f,
|
||||
/*(*/0x3f, /*)*/0x3f, /***/KEY_ASTERISK, /*+*/KEY_PLUS, /*,*/KEY_COMMA, /*-*/KEY_MINUS, /*.*/KEY_DOT, /*/*/KEY_SLASH,
|
||||
/*0*/KEY_0, /*1*/KEY_1, /*2*/KEY_2, /*3*/KEY_3, /*4*/KEY_4, /*5*/KEY_5, /*6*/KEY_6, /*7*/KEY_7,
|
||||
/*8*/KEY_8, /*9*/KEY_9, /*:*/KEY_COLON, /*;*/KEY_SEMICOLON, /*<*/$3f, /*=*/KEY_EQUALS, /*>*/$3f, /*?*/$3f
|
||||
/*8*/KEY_8, /*9*/KEY_9, /*:*/KEY_COLON, /*;*/KEY_SEMICOLON, /*<*/0x3f, /*=*/KEY_EQUALS, /*>*/0x3f, /*?*/0x3f
|
||||
};
|
||||
|
||||
// Keyboard row bitmask as expected by CIA#1 Port A when reading a specific keyboard matrix row (rows are numbered 0-7)
|
||||
char keyboard_matrix_row_bitmask[8] = { %11111110, %11111101, %11111011, %11110111, %11101111, %11011111, %10111111, %01111111 };
|
||||
char keyboard_matrix_row_bitmask[8] = { 0b11111110, 0b11111101, 0b11111011, 0b11110111, 0b11101111, 0b11011111, 0b10111111, 0b01111111 };
|
||||
|
||||
// Keyboard matrix column bitmasks for a specific keybooard matrix column when reading the keyboard. (columns are numbered 0-7)
|
||||
char keyboard_matrix_col_bitmask[8] = { %00000001, %00000010, %00000100, %00001000, %00010000, %00100000, %01000000, %10000000 };
|
||||
char keyboard_matrix_col_bitmask[8] = { 0b00000001, 0b00000010, 0b00000100, 0b00001000, 0b00010000, 0b00100000, 0b01000000, 0b10000000 };
|
||||
|
||||
// Initialize keyboard reading by setting CIA#1 Data Direction Registers
|
||||
void keyboard_init() {
|
||||
// Keyboard Matrix Columns Write Mode
|
||||
CIA1->PORT_A_DDR = $ff;
|
||||
CIA1->PORT_A_DDR = 0xff;
|
||||
// Keyboard Matrix Columns Read Mode
|
||||
CIA1->PORT_B_DDR = $00;
|
||||
CIA1->PORT_B_DDR = 0x00;
|
||||
}
|
||||
|
||||
// Check if any key is currently pressed on the keyboard matrix
|
||||
|
|
@ -121,7 +121,7 @@ void keyboard_event_scan() {
|
|||
char event_type = row_scan&keyboard_matrix_col_bitmask[col];
|
||||
if(event_type==0) {
|
||||
// Key released
|
||||
keyboard_events[keyboard_events_size++] = keycode|$40;
|
||||
keyboard_events[keyboard_events_size++] = keycode|0x40;
|
||||
} else {
|
||||
// Key pressed
|
||||
keyboard_events[keyboard_events_size++] = keycode;
|
||||
|
|
@ -165,7 +165,7 @@ char keyboard_event_pressed(char keycode) {
|
|||
// The buffer is filled by keyboard_event_scan()
|
||||
char keyboard_event_get() {
|
||||
if(keyboard_events_size==0) {
|
||||
return $ff;
|
||||
return 0xff;
|
||||
} else {
|
||||
return keyboard_events[--keyboard_events_size];
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
|
||||
char* print_screen = (char*)$0400;
|
||||
char* print_screen = (char*)0x0400;
|
||||
char* print_line_cursor = print_screen;
|
||||
char* print_char_cursor = print_line_cursor;
|
||||
|
||||
|
|
@ -41,7 +41,7 @@ void print_str_at(char* str, char* at) {
|
|||
// Print a newline
|
||||
void print_ln() {
|
||||
do {
|
||||
print_line_cursor = print_line_cursor + $28;
|
||||
print_line_cursor = print_line_cursor + 0x28;
|
||||
} while (print_line_cursor<print_char_cursor);
|
||||
print_char_cursor = print_line_cursor;
|
||||
}
|
||||
|
|
@ -163,7 +163,7 @@ const char print_hextab[] = "0123456789abcdef"z;
|
|||
void print_uchar(char b) {
|
||||
// Table of hexadecimal digits
|
||||
print_char(print_hextab[b>>4]);
|
||||
print_char(print_hextab[b&$f]);
|
||||
print_char(print_hextab[b&0xf]);
|
||||
}
|
||||
|
||||
// Prints a char as HEX at a specific position on the screen
|
||||
|
|
@ -176,7 +176,7 @@ inline void print_uchar_pos(char b, char row, char col) {
|
|||
void print_uchar_at(char b, char* at) {
|
||||
// Table of hexadecimal digits
|
||||
print_char_at(print_hextab[b>>4], at);
|
||||
print_char_at(print_hextab[b&$f], at+1);
|
||||
print_char_at(print_hextab[b&0xf], at+1);
|
||||
}
|
||||
|
||||
// Print a single char
|
||||
|
|
|
|||
|
|
@ -4,25 +4,25 @@
|
|||
// Get the value to store into D018 to display a specific screen and charset/bitmap
|
||||
// Optimized for ASM from (char)((((unsigned int)screen&$3fff)/$40)|(((unsigned int)charset&$3fff)/$400));
|
||||
inline char toD018(char* screen, char* gfx) {
|
||||
return BYTE1(((unsigned int)screen&$3fff)*4)|(((BYTE1((unsigned int)gfx))/4)&$f);
|
||||
return BYTE1(((unsigned int)screen&0x3fff)*4)|(((BYTE1((unsigned int)gfx))/4)&0xf);
|
||||
}
|
||||
|
||||
// Get the value to store into DD00 (CIA 2 port A) to choose a specific VIC bank
|
||||
// Optimized for ASM from %00000011 ^ (char)((unsigned int)gfx/$4000)
|
||||
inline char toDd00(char* gfx) {
|
||||
return %00000011 ^ (BYTE1((unsigned int)gfx))/$40;
|
||||
return 0b00000011 ^ (BYTE1((unsigned int)gfx))/0x40;
|
||||
}
|
||||
|
||||
// Get the sprite pointer for a sprite.
|
||||
// The sprite pointer is the index of the sprite within the graphics bank and equal to the sprite (char)(sprite_addr/64)
|
||||
// The sprite pointers are stored SCREEN+$3f8+sprite_id to set the pointer of each sprite
|
||||
inline char toSpritePtr(char* sprite) {
|
||||
return (char)(((unsigned int)sprite)/$40);
|
||||
return (char)(((unsigned int)sprite)/0x40);
|
||||
}
|
||||
|
||||
// Select a specific VIC graphics bank by setting the CIA 2 port A ($dd00) as needed
|
||||
inline void vicSelectGfxBank(char* gfx) {
|
||||
CIA2->PORT_A_DDR = %00000011;
|
||||
CIA2->PORT_A_DDR = 0b00000011;
|
||||
CIA2->PORT_A = toDd00(gfx);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -11,7 +11,7 @@
|
|||
// The actual memory addressed will be $4000*cpuSegmentIdx
|
||||
void dtvSetCpuBankSegment1(char cpuBankIdx) {
|
||||
// Move CPU BANK 1 SEGMENT ($4000-$7fff)
|
||||
char* cpuBank = (char*)$ff;
|
||||
char* cpuBank = (char*)0xff;
|
||||
*cpuBank = cpuBankIdx;
|
||||
asm {
|
||||
// SAC $dd - A register points to 13 BANK 1 segment
|
||||
|
|
|
|||
|
|
@ -233,8 +233,8 @@ inline unsigned char convertToScreenCode(unsigned char* v) {
|
|||
char rawmap[0x100] = kickasm {{
|
||||
.var ht = Hashtable().put(0,64, 1,0, 2,32, 3,96) // the table for converting bit 6,7 into ora value
|
||||
.for(var i=0; i<256; i++) {
|
||||
.var idx = (i & $60) / 32
|
||||
.var mask = i & $9f
|
||||
.var idx = (i & 0x60) / 32
|
||||
.var mask = i & 0x9f
|
||||
.byte mask | ht.get(idx)
|
||||
}
|
||||
}};
|
||||
|
|
|
|||
|
|
@ -391,7 +391,7 @@ void vera_layer_set_tilebase_address(byte layer, dword tilebase_address) {
|
|||
dword vera_layer_get_tilebase_address(byte layer) {
|
||||
byte tilebase = *vera_layer_tilebase[layer];
|
||||
dword address = tilebase;
|
||||
address &= $FC;
|
||||
address &= 0xFC;
|
||||
address <<= 8;
|
||||
address <<= 1;
|
||||
return address;
|
||||
|
|
|
|||
|
|
@ -23,7 +23,7 @@ char divr8u(char dividend, char divisor, char rem) {
|
|||
char quotient = 0;
|
||||
for( char i : 0..7) {
|
||||
rem = rem << 1;
|
||||
if( (dividend & $80) != 0 ) {
|
||||
if( (dividend & 0x80) != 0 ) {
|
||||
rem = rem | 1;
|
||||
}
|
||||
dividend = dividend << 1;
|
||||
|
|
@ -57,7 +57,7 @@ unsigned int divr16u(unsigned int dividend, unsigned int divisor, unsigned int r
|
|||
unsigned int quotient = 0;
|
||||
for( char i : 0..15) {
|
||||
rem = rem << 1;
|
||||
if( (BYTE1(dividend) & $80) != 0 ) {
|
||||
if( (BYTE1(dividend) & 0x80) != 0 ) {
|
||||
rem = rem | 1;
|
||||
}
|
||||
dividend = dividend << 1;
|
||||
|
|
|
|||
|
|
@ -6,13 +6,13 @@
|
|||
|
||||
// mulf_sqr tables will contain f(x)=int(x*x/4) and g(x) = f(x-255).
|
||||
// <f(x) = <(( x * x )/4)
|
||||
char __align($100) mulf_sqr1_lo[512];
|
||||
char __align(0x100) mulf_sqr1_lo[512];
|
||||
// >f(x) = >(( x * x )/4)
|
||||
char __align($100) mulf_sqr1_hi[512];
|
||||
char __align(0x100) mulf_sqr1_hi[512];
|
||||
// <g(x) = <((( x - 255) * ( x - 255 ))/4)
|
||||
char __align($100) mulf_sqr2_lo[512];
|
||||
char __align(0x100) mulf_sqr2_lo[512];
|
||||
// >g(x) = >((( x - 255) * ( x - 255 ))/4)
|
||||
char __align($100) mulf_sqr2_hi[512];
|
||||
char __align(0x100) mulf_sqr2_hi[512];
|
||||
|
||||
// Initialize the mulf_sqr multiplication tables with f(x)=int(x*x/4)
|
||||
void mulf_init() {
|
||||
|
|
@ -33,7 +33,7 @@ void mulf_init() {
|
|||
// Fill mulf_sqr2 = g(x) = f(x-255) : If x-255<0 then g(x)=f(255-x) (because x*x = -x*-x)
|
||||
// g(0) = f(255), g(1) = f(254), ..., g(254) = f(1), g(255) = f(0), g(256) = f(1), ..., g(510) = f(255), g(511) = f(256)
|
||||
char x_255 = (char)-1; //Start with g(0)=f(255)
|
||||
char dir = $ff; // Decrease or increase x_255 - initially we decrease
|
||||
char dir = 0xff; // Decrease or increase x_255 - initially we decrease
|
||||
char* sqr2_hi = mulf_sqr2_hi;
|
||||
for(char* sqr2_lo = mulf_sqr2_lo; sqr2_lo!=mulf_sqr2_lo+511; sqr2_lo++) {
|
||||
*sqr2_lo = mulf_sqr1_lo[x_255];
|
||||
|
|
@ -50,7 +50,7 @@ void mulf_init() {
|
|||
|
||||
// Prepare for fast multiply with an unsigned char to a unsigned int result
|
||||
void mulf8u_prepare(char a) {
|
||||
char* const memA = (char*)$fd;
|
||||
char* const memA = (char*)0xfd;
|
||||
*memA = a;
|
||||
asm {
|
||||
lda memA
|
||||
|
|
@ -65,8 +65,8 @@ void mulf8u_prepare(char a) {
|
|||
// Calculate fast multiply with a prepared unsigned char to a unsigned int result
|
||||
// The prepared number is set by calling mulf8u_prepare(char a)
|
||||
unsigned int mulf8u_prepared(char b) {
|
||||
char* const resL = (char*)$fe;
|
||||
char* const memB = (char*)$ff;
|
||||
char* const resL = (char*)0xfe;
|
||||
char* const memB = (char*)0xff;
|
||||
*memB = b;
|
||||
asm {
|
||||
ldx memB
|
||||
|
|
@ -99,7 +99,7 @@ inline void mulf8s_prepare(signed char a) {
|
|||
// Calculate fast multiply with a prepared unsigned char to a unsigned int result
|
||||
// The prepared number is set by calling mulf8s_prepare(char a)
|
||||
signed int mulf8s_prepared(signed char b) {
|
||||
signed char* const memA = (signed char*)$fd;
|
||||
signed char* const memA = (signed char*)0xfd;
|
||||
unsigned int m = mulf8u_prepared((char) b);
|
||||
if(*memA<0) {
|
||||
BYTE1(m) = BYTE1(m)-(char)b;
|
||||
|
|
@ -119,9 +119,9 @@ signed int mulf8s(signed char a, signed char b) {
|
|||
// Fast multiply two unsigned ints to a double unsigned int result
|
||||
// Done in assembler to utilize fast addition A+X
|
||||
unsigned long mulf16u(unsigned int a, unsigned int b) {
|
||||
unsigned int* const memA = (unsigned int*)$f8;
|
||||
unsigned int* const memB = (unsigned int*)$fa;
|
||||
unsigned long* const memR = (unsigned long*)$fc;
|
||||
unsigned int* const memA = (unsigned int*)0xf8;
|
||||
unsigned int* const memB = (unsigned int*)0xfa;
|
||||
unsigned long* const memR = (unsigned long*)0xfc;
|
||||
*memA = a;
|
||||
*memB = b;
|
||||
asm {
|
||||
|
|
|
|||
|
|
@ -59,7 +59,7 @@ void memoryRemapBlock(unsigned char blockPage, unsigned int memoryPage) {
|
|||
// Find the page offset (the number of pages to offset the block)
|
||||
unsigned int pageOffset = memoryPage-blockPage;
|
||||
// Which block is being remapped? (0-7)
|
||||
char block = blockPage / $20;
|
||||
char block = blockPage / 0x20;
|
||||
char blockBits = 1<<block;
|
||||
memoryRemap(blockBits, pageOffset, pageOffset);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -4,24 +4,24 @@
|
|||
// Get the value to store into D018 to display a specific screen and charset/bitmap
|
||||
// Optimized for ASM from (char)((((unsigned int)screen&$3fff)/$40)|(((unsigned int)charset&$3fff)/$400));
|
||||
inline char toD018(char* screen, char* gfx) {
|
||||
return BYTE1(((unsigned int)screen&$3fff)*4)|(((BYTE1((unsigned int)gfx))/4)&$f);
|
||||
return BYTE1(((unsigned int)screen&0x3fff)*4)|(((BYTE1((unsigned int)gfx))/4)&0xf);
|
||||
}
|
||||
|
||||
// Get the value to store into DD00 (CIA 2 port A) to choose a specific VIC bank
|
||||
// Optimized for ASM from %00000011 ^ (char)((unsigned int)gfx/$4000)
|
||||
inline char toDd00(char* gfx) {
|
||||
return %00000011 ^ BYTE1((unsigned int)gfx)/$40;
|
||||
return 0b00000011 ^ BYTE1((unsigned int)gfx)/0x40;
|
||||
}
|
||||
|
||||
// Get the sprite pointer for a sprite.
|
||||
// The sprite pointer is the index of the sprite within the graphics bank and equal to the sprite (char)(sprite_addr/64)
|
||||
// The sprite pointers are stored SCREEN+$3f8+sprite_id to set the pointer of each sprite
|
||||
inline char toSpritePtr(char* sprite) {
|
||||
return (char)(((unsigned int)sprite)/$40);
|
||||
return (char)(((unsigned int)sprite)/0x40);
|
||||
}
|
||||
|
||||
// Select a specific VIC graphics bank by setting the CIA 2 port A ($dd00) as needed
|
||||
inline void vicSelectGfxBank(char* gfx) {
|
||||
CIA2->PORT_A_DDR = %00000011;
|
||||
CIA2->PORT_A_DDR = 0b00000011;
|
||||
CIA2->PORT_A = toDd00(gfx);
|
||||
}
|
||||
|
|
@ -9,18 +9,18 @@
|
|||
#include <multiply.h>
|
||||
|
||||
// PI*2 in u[4.28] format
|
||||
const unsigned long PI2_u4f28 = $6487ed51;
|
||||
const unsigned long PI2_u4f28 = 0x6487ed51;
|
||||
// PI in u[4.28] format
|
||||
const unsigned long PI_u4f28 = $3243f6a9;
|
||||
const unsigned long PI_u4f28 = 0x3243f6a9;
|
||||
// PI/2 in u[4.28] format
|
||||
const unsigned long PI_HALF_u4f28 = $1921FB54;
|
||||
const unsigned long PI_HALF_u4f28 = 0x1921FB54;
|
||||
|
||||
// PI*2 in u[4.12] format
|
||||
const unsigned int PI2_u4f12 = $6488;
|
||||
const unsigned int PI2_u4f12 = 0x6488;
|
||||
// PI in u[4.12] format
|
||||
const unsigned int PI_u4f12 = $3244;
|
||||
const unsigned int PI_u4f12 = 0x3244;
|
||||
// PI/2 in u[4.12] format
|
||||
const unsigned int PI_HALF_u4f12 = $1922;
|
||||
const unsigned int PI_HALF_u4f12 = 0x1922;
|
||||
|
||||
// Generate signed (large) unsigned int sine table - on the full -$7fff - $7fff range
|
||||
// sintab - the table to generate into
|
||||
|
|
@ -83,7 +83,7 @@ signed int sin16s(unsigned long x) {
|
|||
unsigned int x1 = WORD1(x<<3); // u[1.15]
|
||||
unsigned int x2 = mulu16_sel(x1, x1, 0); // u[2.14] x^2
|
||||
unsigned int x3 = mulu16_sel(x2, x1, 1); // u[2.14] x^3
|
||||
unsigned int x3_6 = mulu16_sel(x3, $10000/6, 1); // u[1.15] x^3/6;
|
||||
unsigned int x3_6 = mulu16_sel(x3, 0x10000/6, 1); // u[1.15] x^3/6;
|
||||
unsigned int usinx = x1 - x3_6; // u[1.15] x - x^3/6
|
||||
unsigned int x4 = mulu16_sel(x3, x1, 0); // u[3.13] x^4
|
||||
unsigned int x5 = mulu16_sel(x4, x1, 0); // u[4.12] x^5
|
||||
|
|
@ -113,7 +113,7 @@ signed char sin8s(unsigned int x) {
|
|||
char x1 = BYTE1(x<<3); // u[1.7]
|
||||
char x2 = mulu8_sel(x1, x1, 0); // u[2.6] x^2
|
||||
char x3 = mulu8_sel(x2, x1, 1); // u[2.6] x^3
|
||||
const char DIV_6 = $2b; // u[0.7] - $2a.aa rounded to $2b
|
||||
const char DIV_6 = 0x2b; // u[0.7] - $2a.aa rounded to $2b
|
||||
char x3_6 = mulu8_sel(x3, DIV_6, 1); // u[1.7] x^3/6;
|
||||
char usinx = x1 - x3_6; // u[1.7] x - x^3/6
|
||||
char x4 = mulu8_sel(x3, x1, 0); // u[3.5] x^4
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@ void init_irq() {
|
|||
*PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK;
|
||||
*PROCPORT = PROCPORT_RAM_IO;
|
||||
// Disable CIA 1 Timer IRQ
|
||||
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR;
|
||||
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL;
|
||||
// Set raster line to $100
|
||||
*VICII_CONTROL1 |=$80;
|
||||
*RASTER = $00;
|
||||
|
|
|
|||
|
|
@ -45,7 +45,7 @@ void init_irq() {
|
|||
*PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK;
|
||||
*PROCPORT = PROCPORT_RAM_IO;
|
||||
// Disable CIA 1 Timer IRQ
|
||||
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR;
|
||||
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL;
|
||||
// Set raster line to $100
|
||||
*VICII_CONTROL1 |=$80;
|
||||
*RASTER = $00;
|
||||
|
|
|
|||
|
|
@ -54,7 +54,7 @@ void init_irq() {
|
|||
*PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK;
|
||||
*PROCPORT = PROCPORT_RAM_IO;
|
||||
// Disable CIA 1 Timer IRQ
|
||||
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR;
|
||||
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL;
|
||||
// Set raster line to $100
|
||||
*VICII_CONTROL1 |=$80;
|
||||
*RASTER = $00;
|
||||
|
|
|
|||
|
|
@ -203,7 +203,7 @@ void splash_run() {
|
|||
// Stop kernel IRQ
|
||||
SEI();
|
||||
// Disable CIA 1 Timer IRQ
|
||||
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR;
|
||||
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL;
|
||||
// Disable kernal & basic & IO
|
||||
*PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK;
|
||||
*PROCPORT = PROCPORT_RAM_ALL;
|
||||
|
|
|
|||
|
|
@ -78,7 +78,7 @@ void demo_init() {
|
|||
*PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK;
|
||||
*PROCPORT = PROCPORT_RAM_IO;
|
||||
// Disable CIA 1 Timer IRQ
|
||||
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR;
|
||||
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL;
|
||||
// Acknowledge any timer IRQ
|
||||
asm { lda CIA1_INTERRUPT }
|
||||
// Acknowledge any VIC IRQ
|
||||
|
|
|
|||
|
|
@ -122,7 +122,7 @@ void part1_run() {
|
|||
*PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK;
|
||||
*PROCPORT = PROCPORT_RAM_IO;
|
||||
// Disable CIA 1 Timer IRQ
|
||||
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR;
|
||||
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL;
|
||||
// Acknowledge any timer IRQ
|
||||
asm { lda CIA1_INTERRUPT }
|
||||
// Acknowledge any VIC IRQ
|
||||
|
|
|
|||
|
|
@ -295,7 +295,7 @@ void part2_run() {
|
|||
// Enable & initialize sprites
|
||||
*SPRITES_ENABLE = 0xff;
|
||||
// Disable CIA 1 Timer IRQ
|
||||
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR;
|
||||
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL;
|
||||
// Acknowledge any timer IRQ
|
||||
asm { lda CIA1_INTERRUPT }
|
||||
// Acknowledge any VIC IRQ
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ void main() {
|
|||
*GHOST_BYTE = 0;
|
||||
asm { sei }
|
||||
// Disable CIA 1 Timer IRQ
|
||||
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR;
|
||||
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL;
|
||||
// Set raster line to 0xfa
|
||||
VICII->CONTROL1 &= 0x7f;
|
||||
VICII->RASTER = 0xfa;
|
||||
|
|
|
|||
|
|
@ -18,7 +18,7 @@ void main() {
|
|||
asm { sei }
|
||||
(*musicInit)();
|
||||
// Disable CIA 1 Timer IRQ
|
||||
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR;
|
||||
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL;
|
||||
// Set raster line to $fd
|
||||
VICII->CONTROL1 &=$7f;
|
||||
VICII->RASTER = $fd;
|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@ void main() {
|
|||
sta $d412
|
||||
}
|
||||
asm { sei }
|
||||
CIA2->INTERRUPT = CIA_INTERRUPT_CLEAR;
|
||||
CIA2->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL;
|
||||
*KERNEL_NMI = &nmi;
|
||||
CIA2->TIMER_A = 0x88; // speed
|
||||
CIA2->INTERRUPT = 0x81;
|
||||
|
|
|
|||
|
|
@ -36,7 +36,7 @@ void main() {
|
|||
|
||||
// Set up raster interrupts C64 style
|
||||
// Disable CIA 1 Timer IRQ
|
||||
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR;
|
||||
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL;
|
||||
// Set raster line to 0xff
|
||||
VICII->RASTER = 0xff;
|
||||
VICII->CONTROL1 &= 0x7f;
|
||||
|
|
|
|||
|
|
@ -73,7 +73,7 @@ void main() {
|
|||
// Set up raster interrupts C64 style
|
||||
asm { sei }
|
||||
// Disable CIA 1 Timer IRQ
|
||||
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR;
|
||||
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL;
|
||||
// Set raster line to 0x16
|
||||
VICII->RASTER = IRQ_Y;
|
||||
VICII->CONTROL1 &= 0x7f;
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ void main() {
|
|||
*PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK;
|
||||
*PROCPORT = PROCPORT_RAM_IO;
|
||||
// Disable CIA 1 Timer IRQ
|
||||
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR;
|
||||
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL;
|
||||
// Set raster line to $100
|
||||
*VICII_CONTROL1 |=$80;
|
||||
*RASTER = $00;
|
||||
|
|
|
|||
|
|
@ -17,7 +17,7 @@ const byte WHITE = 1;
|
|||
const byte BLACK = 0;
|
||||
|
||||
byte* const CIA1_INTERRUPT = (byte*)$dc0d;
|
||||
const byte CIA_INTERRUPT_CLEAR = $7f;
|
||||
const byte CIA_INTERRUPT_CLEAR_ALL = $7f;
|
||||
|
||||
// Processor port data direction register
|
||||
byte* const PROCPORT_DDR = (byte*)$00;
|
||||
|
|
@ -36,7 +36,7 @@ void main() {
|
|||
*PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK;
|
||||
*PROCPORT = PROCPORT_RAM_IO;
|
||||
// Disable CIA 1 Timer IRQ
|
||||
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR;
|
||||
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR_ALL;
|
||||
// Set raster line to $100
|
||||
*VICII_CONTROL1 |=$80;
|
||||
*RASTER = $00;
|
||||
|
|
|
|||
|
|
@ -19,7 +19,7 @@ const byte WHITE = 1;
|
|||
const byte BLACK = 0;
|
||||
|
||||
byte* const CIA1_INTERRUPT = (byte*)$dc0d;
|
||||
const byte CIA_INTERRUPT_CLEAR = $7f;
|
||||
const byte CIA_INTERRUPT_CLEAR_ALL = $7f;
|
||||
|
||||
// Processor port data direction register
|
||||
byte* const PROCPORT_DDR = (byte*)$00;
|
||||
|
|
@ -38,7 +38,7 @@ void main() {
|
|||
*PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK;
|
||||
*PROCPORT = PROCPORT_RAM_IO;
|
||||
// Disable CIA 1 Timer IRQ
|
||||
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR;
|
||||
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR_ALL;
|
||||
// Set raster line to $100
|
||||
*VICII_CONTROL1 |=$80;
|
||||
*RASTER = $00;
|
||||
|
|
|
|||
|
|
@ -17,7 +17,7 @@ const byte WHITE = 1;
|
|||
const byte BLACK = 0;
|
||||
|
||||
byte* const CIA1_INTERRUPT = (byte*)$dc0d;
|
||||
const byte CIA_INTERRUPT_CLEAR = $7f;
|
||||
const byte CIA_INTERRUPT_CLEAR_ALL = $7f;
|
||||
|
||||
// Processor port data direction register
|
||||
byte* const PROCPORT_DDR = (byte*)$00;
|
||||
|
|
@ -36,7 +36,7 @@ void main() {
|
|||
*PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK;
|
||||
*PROCPORT = PROCPORT_RAM_IO;
|
||||
// Disable CIA 1 Timer IRQ
|
||||
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR;
|
||||
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR_ALL;
|
||||
// Set raster line to $100
|
||||
*VICII_CONTROL1 |=$80;
|
||||
*RASTER = $00;
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@ byte* const SCREEN = (byte*)$400;
|
|||
void main() {
|
||||
asm { sei }
|
||||
// Disable CIA 1 Timer IRQ
|
||||
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR;
|
||||
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL;
|
||||
// Set raster line to $60
|
||||
*VICII_CONTROL1 &=$7f;
|
||||
*RASTER = $60;
|
||||
|
|
|
|||
|
|
@ -15,12 +15,12 @@ const byte WHITE = 1;
|
|||
const byte BLACK = 0;
|
||||
|
||||
byte* const CIA1_INTERRUPT = (byte*)$dc0d;
|
||||
const byte CIA_INTERRUPT_CLEAR = $7f;
|
||||
const byte CIA_INTERRUPT_CLEAR_ALL = $7f;
|
||||
|
||||
void main() {
|
||||
asm { sei }
|
||||
// Disable CIA 1 Timer IRQ
|
||||
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR;
|
||||
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR_ALL;
|
||||
// Set raster line to $100
|
||||
*VICII_CONTROL1 |=$80;
|
||||
*RASTER = $00;
|
||||
|
|
|
|||
|
|
@ -11,13 +11,13 @@ byte* const BG_COLOR = (byte*)$d020;
|
|||
byte* const FGCOL = (byte*)$d021;
|
||||
|
||||
byte* const CIA1_INTERRUPT = (byte*)$dc0d;
|
||||
const byte CIA_INTERRUPT_CLEAR = $7f;
|
||||
const byte CIA_INTERRUPT_CLEAR_ALL = $7f;
|
||||
|
||||
|
||||
void main() {
|
||||
asm { sei }
|
||||
// Disable CIA 1 Timer IRQ
|
||||
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR;
|
||||
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR_ALL;
|
||||
// Set raster line to $0fd
|
||||
*VICII_CONTROL1 &=$7f;
|
||||
*RASTER = $fd;
|
||||
|
|
|
|||
|
|
@ -16,12 +16,12 @@ const byte WHITE = 1;
|
|||
const byte BLACK = 0;
|
||||
|
||||
byte* const CIA1_INTERRUPT = (byte*)$dc0d;
|
||||
const byte CIA_INTERRUPT_CLEAR = $7f;
|
||||
const byte CIA_INTERRUPT_CLEAR_ALL = $7f;
|
||||
|
||||
void main() {
|
||||
asm { sei }
|
||||
// Disable CIA 1 Timer IRQ
|
||||
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR;
|
||||
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR_ALL;
|
||||
// Set raster line to $100
|
||||
*VICII_CONTROL1 |=$80;
|
||||
*RASTER = $00;
|
||||
|
|
|
|||
|
|
@ -11,13 +11,13 @@ const byte IRQ_RASTER = %00000001;
|
|||
byte* const BG_COLOR = (byte*)$d020;
|
||||
|
||||
byte* const CIA1_INTERRUPT = (byte*)$dc0d;
|
||||
const byte CIA_INTERRUPT_CLEAR = $7f;
|
||||
const byte CIA_INTERRUPT_CLEAR_ALL = $7f;
|
||||
|
||||
|
||||
void main() {
|
||||
asm { sei }
|
||||
// Disable CIA 1 Timer IRQ
|
||||
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR;
|
||||
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR_ALL;
|
||||
// Set raster line to $0fd
|
||||
*VICII_CONTROL1 &=$7f;
|
||||
*RASTER = $fd;
|
||||
|
|
|
|||
|
|
@ -40,7 +40,7 @@ void init() {
|
|||
}
|
||||
// enable the interrupt
|
||||
asm { sei }
|
||||
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR;
|
||||
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL;
|
||||
*IRQ_ENABLE = IRQ_RASTER;
|
||||
*IRQ_STATUS = IRQ_RASTER;
|
||||
*KERNEL_IRQ = &plex_irq;
|
||||
|
|
|
|||
|
|
@ -94,20 +94,20 @@ bitmap_init: {
|
|||
sta.z yoffs+1
|
||||
ldx #0
|
||||
__b3:
|
||||
// y&$7
|
||||
// y&0x7
|
||||
lda #7
|
||||
sax.z __7
|
||||
// BYTE0(yoffs)
|
||||
lda.z yoffs
|
||||
// y&$7 | BYTE0(yoffs)
|
||||
// y&0x7 | BYTE0(yoffs)
|
||||
ora.z __7
|
||||
// bitmap_plot_ylo[y] = y&$7 | BYTE0(yoffs)
|
||||
// bitmap_plot_ylo[y] = y&0x7 | BYTE0(yoffs)
|
||||
sta bitmap_plot_ylo,x
|
||||
// BYTE1(yoffs)
|
||||
lda.z yoffs+1
|
||||
// bitmap_plot_yhi[y] = BYTE1(yoffs)
|
||||
sta bitmap_plot_yhi,x
|
||||
// if((y&$7)==7)
|
||||
// if((y&0x7)==7)
|
||||
lda #7
|
||||
cmp.z __7
|
||||
bne __b4
|
||||
|
|
@ -515,14 +515,14 @@ bitmap_plot: {
|
|||
sta.z plotter+1
|
||||
lda bitmap_plot_ylo,x
|
||||
sta.z plotter
|
||||
// x & $fff8
|
||||
// x & 0xfff8
|
||||
lda.z x
|
||||
and #<$fff8
|
||||
sta.z __1
|
||||
lda.z x+1
|
||||
and #>$fff8
|
||||
sta.z __1+1
|
||||
// plotter += ( x & $fff8 )
|
||||
// plotter += ( x & 0xfff8 )
|
||||
clc
|
||||
lda.z plotter
|
||||
adc.z __1
|
||||
|
|
|
|||
|
|
@ -3584,17 +3584,17 @@ bitmap_init: {
|
|||
// [22] phi bitmap_init::y#2 = bitmap_init::y#1 [phi:bitmap_init::@4->bitmap_init::@3#1] -- register_copy
|
||||
// bitmap_init::@3
|
||||
__b3:
|
||||
// y&$7
|
||||
// y&0x7
|
||||
// [23] bitmap_init::$7 = bitmap_init::y#2 & 7 -- vbuz1=vbuxx_band_vbuc1
|
||||
lda #7
|
||||
sax.z __7
|
||||
// BYTE0(yoffs)
|
||||
// [24] bitmap_init::$4 = byte0 bitmap_init::yoffs#2 -- vbuaa=_byte0_pbuz1
|
||||
lda.z yoffs
|
||||
// y&$7 | BYTE0(yoffs)
|
||||
// y&0x7 | BYTE0(yoffs)
|
||||
// [25] bitmap_init::$5 = bitmap_init::$7 | bitmap_init::$4 -- vbuaa=vbuz1_bor_vbuaa
|
||||
ora.z __7
|
||||
// bitmap_plot_ylo[y] = y&$7 | BYTE0(yoffs)
|
||||
// bitmap_plot_ylo[y] = y&0x7 | BYTE0(yoffs)
|
||||
// [26] bitmap_plot_ylo[bitmap_init::y#2] = bitmap_init::$5 -- pbuc1_derefidx_vbuxx=vbuaa
|
||||
sta bitmap_plot_ylo,x
|
||||
// BYTE1(yoffs)
|
||||
|
|
@ -3603,7 +3603,7 @@ bitmap_init: {
|
|||
// bitmap_plot_yhi[y] = BYTE1(yoffs)
|
||||
// [28] bitmap_plot_yhi[bitmap_init::y#2] = bitmap_init::$6 -- pbuc1_derefidx_vbuxx=vbuaa
|
||||
sta bitmap_plot_yhi,x
|
||||
// if((y&$7)==7)
|
||||
// if((y&0x7)==7)
|
||||
// [29] if(bitmap_init::$7!=7) goto bitmap_init::@4 -- vbuz1_neq_vbuc1_then_la1
|
||||
lda #7
|
||||
cmp.z __7
|
||||
|
|
@ -4194,7 +4194,7 @@ bitmap_plot: {
|
|||
sta.z plotter+1
|
||||
lda bitmap_plot_ylo,x
|
||||
sta.z plotter
|
||||
// x & $fff8
|
||||
// x & 0xfff8
|
||||
// [119] bitmap_plot::$1 = bitmap_plot::x#4 & $fff8 -- vwuz1=vwuz2_band_vwuc1
|
||||
lda.z x
|
||||
and #<$fff8
|
||||
|
|
@ -4202,7 +4202,7 @@ bitmap_plot: {
|
|||
lda.z x+1
|
||||
and #>$fff8
|
||||
sta.z __1+1
|
||||
// plotter += ( x & $fff8 )
|
||||
// plotter += ( x & 0xfff8 )
|
||||
// [120] bitmap_plot::plotter#1 = (char *)bitmap_plot::plotter#0 + bitmap_plot::$1 -- pbuz1=pbuz1_plus_vwuz2
|
||||
clc
|
||||
lda.z plotter
|
||||
|
|
|
|||
|
|
@ -103,20 +103,20 @@ bitmap_init: {
|
|||
sta.z yoffs+1
|
||||
ldx #0
|
||||
__b3:
|
||||
// y&$7
|
||||
// y&0x7
|
||||
lda #7
|
||||
sax.z __7
|
||||
// BYTE0(yoffs)
|
||||
lda.z yoffs
|
||||
// y&$7 | BYTE0(yoffs)
|
||||
// y&0x7 | BYTE0(yoffs)
|
||||
ora.z __7
|
||||
// bitmap_plot_ylo[y] = y&$7 | BYTE0(yoffs)
|
||||
// bitmap_plot_ylo[y] = y&0x7 | BYTE0(yoffs)
|
||||
sta bitmap_plot_ylo,x
|
||||
// BYTE1(yoffs)
|
||||
lda.z yoffs+1
|
||||
// bitmap_plot_yhi[y] = BYTE1(yoffs)
|
||||
sta bitmap_plot_yhi,x
|
||||
// if((y&$7)==7)
|
||||
// if((y&0x7)==7)
|
||||
lda #7
|
||||
cmp.z __7
|
||||
bne __b4
|
||||
|
|
@ -496,14 +496,14 @@ bitmap_plot: {
|
|||
sta.z plotter+1
|
||||
lda bitmap_plot_ylo,x
|
||||
sta.z plotter
|
||||
// x & $fff8
|
||||
// x & 0xfff8
|
||||
lda.z x
|
||||
and #<$fff8
|
||||
sta.z __1
|
||||
lda.z x+1
|
||||
and #>$fff8
|
||||
sta.z __1+1
|
||||
// plotter += ( x & $fff8 )
|
||||
// plotter += ( x & 0xfff8 )
|
||||
clc
|
||||
lda.z plotter
|
||||
adc.z __1
|
||||
|
|
|
|||
|
|
@ -3545,17 +3545,17 @@ bitmap_init: {
|
|||
// [23] phi bitmap_init::y#2 = bitmap_init::y#1 [phi:bitmap_init::@4->bitmap_init::@3#1] -- register_copy
|
||||
// bitmap_init::@3
|
||||
__b3:
|
||||
// y&$7
|
||||
// y&0x7
|
||||
// [24] bitmap_init::$7 = bitmap_init::y#2 & 7 -- vbuz1=vbuxx_band_vbuc1
|
||||
lda #7
|
||||
sax.z __7
|
||||
// BYTE0(yoffs)
|
||||
// [25] bitmap_init::$4 = byte0 bitmap_init::yoffs#2 -- vbuaa=_byte0_pbuz1
|
||||
lda.z yoffs
|
||||
// y&$7 | BYTE0(yoffs)
|
||||
// y&0x7 | BYTE0(yoffs)
|
||||
// [26] bitmap_init::$5 = bitmap_init::$7 | bitmap_init::$4 -- vbuaa=vbuz1_bor_vbuaa
|
||||
ora.z __7
|
||||
// bitmap_plot_ylo[y] = y&$7 | BYTE0(yoffs)
|
||||
// bitmap_plot_ylo[y] = y&0x7 | BYTE0(yoffs)
|
||||
// [27] bitmap_plot_ylo[bitmap_init::y#2] = bitmap_init::$5 -- pbuc1_derefidx_vbuxx=vbuaa
|
||||
sta bitmap_plot_ylo,x
|
||||
// BYTE1(yoffs)
|
||||
|
|
@ -3564,7 +3564,7 @@ bitmap_init: {
|
|||
// bitmap_plot_yhi[y] = BYTE1(yoffs)
|
||||
// [29] bitmap_plot_yhi[bitmap_init::y#2] = bitmap_init::$6 -- pbuc1_derefidx_vbuxx=vbuaa
|
||||
sta bitmap_plot_yhi,x
|
||||
// if((y&$7)==7)
|
||||
// if((y&0x7)==7)
|
||||
// [30] if(bitmap_init::$7!=7) goto bitmap_init::@4 -- vbuz1_neq_vbuc1_then_la1
|
||||
lda #7
|
||||
cmp.z __7
|
||||
|
|
@ -4115,7 +4115,7 @@ bitmap_plot: {
|
|||
sta.z plotter+1
|
||||
lda bitmap_plot_ylo,x
|
||||
sta.z plotter
|
||||
// x & $fff8
|
||||
// x & 0xfff8
|
||||
// [114] bitmap_plot::$1 = bitmap_plot::x#4 & $fff8 -- vwuz1=vwuz2_band_vwuc1
|
||||
lda.z x
|
||||
and #<$fff8
|
||||
|
|
@ -4123,7 +4123,7 @@ bitmap_plot: {
|
|||
lda.z x+1
|
||||
and #>$fff8
|
||||
sta.z __1+1
|
||||
// plotter += ( x & $fff8 )
|
||||
// plotter += ( x & 0xfff8 )
|
||||
// [115] bitmap_plot::plotter#1 = (char *)bitmap_plot::plotter#0 + bitmap_plot::$1 -- pbuz1=pbuz1_plus_vwuz2
|
||||
clc
|
||||
lda.z plotter
|
||||
|
|
|
|||
|
|
@ -15,7 +15,7 @@
|
|||
.segment Basic
|
||||
:BasicUpstart(__start)
|
||||
/// Value that disables all CIA interrupts when stored to the CIA Interrupt registers
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
.const CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
/// $D011 Control Register #1 Bit#5: BMM Turn Bitmap Mode on/off
|
||||
.const VICII_BMM = $20
|
||||
/// $D011 Control Register #1 Bit#4: DEN Switch VIC-II output on/off
|
||||
|
|
@ -223,20 +223,20 @@ bitmap_init: {
|
|||
sta.z yoffs+1
|
||||
ldx #0
|
||||
__b3:
|
||||
// y&$7
|
||||
// y&0x7
|
||||
lda #7
|
||||
sax.z __7
|
||||
// BYTE0(yoffs)
|
||||
lda.z yoffs
|
||||
// y&$7 | BYTE0(yoffs)
|
||||
// y&0x7 | BYTE0(yoffs)
|
||||
ora.z __7
|
||||
// bitmap_plot_ylo[y] = y&$7 | BYTE0(yoffs)
|
||||
// bitmap_plot_ylo[y] = y&0x7 | BYTE0(yoffs)
|
||||
sta bitmap_plot_ylo,x
|
||||
// BYTE1(yoffs)
|
||||
lda.z yoffs+1
|
||||
// bitmap_plot_yhi[y] = BYTE1(yoffs)
|
||||
sta bitmap_plot_yhi,x
|
||||
// if((y&$7)==7)
|
||||
// if((y&0x7)==7)
|
||||
lda #7
|
||||
cmp.z __7
|
||||
bne __b4
|
||||
|
|
@ -298,9 +298,9 @@ init_irq: {
|
|||
// *PROCPORT = PROCPORT_RAM_IO
|
||||
lda #PROCPORT_RAM_IO
|
||||
sta.z PROCPORT
|
||||
// CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR
|
||||
// CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL
|
||||
// Disable CIA 1 Timer IRQ
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
lda #CIA_INTERRUPT_CLEAR_ALL
|
||||
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
// *VICII_CONTROL1 |=$80
|
||||
// Set raster line to $100
|
||||
|
|
@ -336,14 +336,14 @@ bitmap_plot: {
|
|||
sta.z plotter+1
|
||||
lda bitmap_plot_ylo,x
|
||||
sta.z plotter
|
||||
// x & $fff8
|
||||
// x & 0xfff8
|
||||
lda.z x
|
||||
and #<$fff8
|
||||
sta.z __1
|
||||
lda.z x+1
|
||||
and #>$fff8
|
||||
sta.z __1+1
|
||||
// plotter += ( x & $fff8 )
|
||||
// plotter += ( x & 0xfff8 )
|
||||
clc
|
||||
lda.z plotter
|
||||
adc.z __1
|
||||
|
|
|
|||
|
|
@ -146,7 +146,7 @@ init_irq: scope:[init_irq] from main::@7
|
|||
asm { sei }
|
||||
[62] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
|
||||
[63] *PROCPORT = PROCPORT_RAM_IO
|
||||
[64] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
|
||||
[64] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL
|
||||
[65] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
|
||||
[66] *RASTER = 0
|
||||
[67] *IRQ_ENABLE = IRQ_RASTER
|
||||
|
|
|
|||
|
|
@ -333,7 +333,7 @@ init_irq: scope:[init_irq] from main::@7
|
|||
asm { sei }
|
||||
*PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
|
||||
*PROCPORT = PROCPORT_RAM_IO
|
||||
*((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
|
||||
*((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL
|
||||
*VICII_CONTROL1 = *VICII_CONTROL1 | $80
|
||||
*RASTER = 0
|
||||
*IRQ_ENABLE = IRQ_RASTER
|
||||
|
|
@ -394,7 +394,7 @@ __constant char * const BG_COLOR = (char *)$d021
|
|||
__constant char *BITMAP = (char *)$2000
|
||||
__constant const char BLACK = 0
|
||||
__constant struct MOS6526_CIA * const CIA1 = (struct MOS6526_CIA *)$dc00
|
||||
__constant const char CIA_INTERRUPT_CLEAR = $7f
|
||||
__constant const char CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
__constant char * const D011 = (char *)$d011
|
||||
__constant char * const D018 = (char *)$d018
|
||||
__constant void (** const HARDWARE_IRQ)() = (void (**)())$fffe
|
||||
|
|
@ -1272,7 +1272,7 @@ init_irq: scope:[init_irq] from main::@7
|
|||
asm { sei }
|
||||
[62] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
|
||||
[63] *PROCPORT = PROCPORT_RAM_IO
|
||||
[64] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
|
||||
[64] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL
|
||||
[65] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
|
||||
[66] *RASTER = 0
|
||||
[67] *IRQ_ENABLE = IRQ_RASTER
|
||||
|
|
@ -1493,7 +1493,7 @@ Statement [51] bitmap_init::yoffs#1 = bitmap_init::yoffs#2 + (unsigned int)$28*8
|
|||
Removing always clobbered register reg byte a as potential for zp[1]:9 [ bitmap_init::y#2 bitmap_init::y#1 ]
|
||||
Statement [62] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
|
||||
Statement [63] *PROCPORT = PROCPORT_RAM_IO [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
|
||||
Statement [64] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
|
||||
Statement [64] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
|
||||
Statement [65] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
|
||||
Statement [66] *RASTER = 0 [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
|
||||
Statement [67] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
|
||||
|
|
@ -1533,7 +1533,7 @@ Statement [44] bitmap_init::$7 = bitmap_init::y#2 & 7 [ bitmap_init::y#2 bitmap_
|
|||
Statement [51] bitmap_init::yoffs#1 = bitmap_init::yoffs#2 + (unsigned int)$28*8 [ bitmap_init::y#2 bitmap_init::yoffs#1 ] ( main:3::bitmap_init:12 [ frame_cnt bitmap_init::y#2 bitmap_init::yoffs#1 ] { } ) always clobbers reg byte a
|
||||
Statement [62] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
|
||||
Statement [63] *PROCPORT = PROCPORT_RAM_IO [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
|
||||
Statement [64] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
|
||||
Statement [64] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
|
||||
Statement [65] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
|
||||
Statement [66] *RASTER = 0 [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
|
||||
Statement [67] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
|
||||
|
|
@ -1649,7 +1649,7 @@ ASSEMBLER BEFORE OPTIMIZATION
|
|||
:BasicUpstart(__start)
|
||||
// Global Constants & labels
|
||||
/// Value that disables all CIA interrupts when stored to the CIA Interrupt registers
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
.const CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
/// $D011 Control Register #1 Bit#5: BMM Turn Bitmap Mode on/off
|
||||
.const VICII_BMM = $20
|
||||
/// $D011 Control Register #1 Bit#4: DEN Switch VIC-II output on/off
|
||||
|
|
@ -2101,9 +2101,9 @@ init_irq: {
|
|||
// [63] *PROCPORT = PROCPORT_RAM_IO -- _deref_pbuc1=vbuc2
|
||||
lda #PROCPORT_RAM_IO
|
||||
sta.z PROCPORT
|
||||
// [64] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR -- _deref_pbuc1=vbuc2
|
||||
// [64] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL -- _deref_pbuc1=vbuc2
|
||||
// Disable CIA 1 Timer IRQ
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
lda #CIA_INTERRUPT_CLEAR_ALL
|
||||
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
// [65] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
|
||||
// Set raster line to $100
|
||||
|
|
@ -2344,7 +2344,7 @@ __constant char * const BG_COLOR = (char *) 53281
|
|||
__constant char *BITMAP = (char *) 8192
|
||||
__constant const char BLACK = 0
|
||||
__constant struct MOS6526_CIA * const CIA1 = (struct MOS6526_CIA *) 56320
|
||||
__constant const char CIA_INTERRUPT_CLEAR = $7f
|
||||
__constant const char CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
__constant char * const D011 = (char *) 53265
|
||||
__constant char * const D018 = (char *) 53272
|
||||
__constant void (** const HARDWARE_IRQ)() = (void (**)()) 65534
|
||||
|
|
@ -2485,7 +2485,7 @@ Score: 3198
|
|||
:BasicUpstart(__start)
|
||||
// Global Constants & labels
|
||||
/// Value that disables all CIA interrupts when stored to the CIA Interrupt registers
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
.const CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
/// $D011 Control Register #1 Bit#5: BMM Turn Bitmap Mode on/off
|
||||
.const VICII_BMM = $20
|
||||
/// $D011 Control Register #1 Bit#4: DEN Switch VIC-II output on/off
|
||||
|
|
@ -2790,17 +2790,17 @@ bitmap_init: {
|
|||
// [43] phi bitmap_init::y#2 = bitmap_init::y#1 [phi:bitmap_init::@4->bitmap_init::@3#1] -- register_copy
|
||||
// bitmap_init::@3
|
||||
__b3:
|
||||
// y&$7
|
||||
// y&0x7
|
||||
// [44] bitmap_init::$7 = bitmap_init::y#2 & 7 -- vbuz1=vbuxx_band_vbuc1
|
||||
lda #7
|
||||
sax.z __7
|
||||
// BYTE0(yoffs)
|
||||
// [45] bitmap_init::$4 = byte0 bitmap_init::yoffs#2 -- vbuaa=_byte0_pbuz1
|
||||
lda.z yoffs
|
||||
// y&$7 | BYTE0(yoffs)
|
||||
// y&0x7 | BYTE0(yoffs)
|
||||
// [46] bitmap_init::$5 = bitmap_init::$7 | bitmap_init::$4 -- vbuaa=vbuz1_bor_vbuaa
|
||||
ora.z __7
|
||||
// bitmap_plot_ylo[y] = y&$7 | BYTE0(yoffs)
|
||||
// bitmap_plot_ylo[y] = y&0x7 | BYTE0(yoffs)
|
||||
// [47] bitmap_plot_ylo[bitmap_init::y#2] = bitmap_init::$5 -- pbuc1_derefidx_vbuxx=vbuaa
|
||||
sta bitmap_plot_ylo,x
|
||||
// BYTE1(yoffs)
|
||||
|
|
@ -2809,7 +2809,7 @@ bitmap_init: {
|
|||
// bitmap_plot_yhi[y] = BYTE1(yoffs)
|
||||
// [49] bitmap_plot_yhi[bitmap_init::y#2] = bitmap_init::$6 -- pbuc1_derefidx_vbuxx=vbuaa
|
||||
sta bitmap_plot_yhi,x
|
||||
// if((y&$7)==7)
|
||||
// if((y&0x7)==7)
|
||||
// [50] if(bitmap_init::$7!=7) goto bitmap_init::@4 -- vbuz1_neq_vbuc1_then_la1
|
||||
lda #7
|
||||
cmp.z __7
|
||||
|
|
@ -2900,10 +2900,10 @@ init_irq: {
|
|||
// [63] *PROCPORT = PROCPORT_RAM_IO -- _deref_pbuc1=vbuc2
|
||||
lda #PROCPORT_RAM_IO
|
||||
sta.z PROCPORT
|
||||
// CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR
|
||||
// [64] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR -- _deref_pbuc1=vbuc2
|
||||
// CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL
|
||||
// [64] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL -- _deref_pbuc1=vbuc2
|
||||
// Disable CIA 1 Timer IRQ
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
lda #CIA_INTERRUPT_CLEAR_ALL
|
||||
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
// *VICII_CONTROL1 |=$80
|
||||
// [65] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
|
||||
|
|
@ -2948,7 +2948,7 @@ bitmap_plot: {
|
|||
sta.z plotter+1
|
||||
lda bitmap_plot_ylo,x
|
||||
sta.z plotter
|
||||
// x & $fff8
|
||||
// x & 0xfff8
|
||||
// [72] bitmap_plot::$1 = bitmap_plot::x#0 & $fff8 -- vwuz1=vwuz2_band_vwuc1
|
||||
lda.z x
|
||||
and #<$fff8
|
||||
|
|
@ -2956,7 +2956,7 @@ bitmap_plot: {
|
|||
lda.z x+1
|
||||
and #>$fff8
|
||||
sta.z __1+1
|
||||
// plotter += ( x & $fff8 )
|
||||
// plotter += ( x & 0xfff8 )
|
||||
// [73] bitmap_plot::plotter#1 = (char *)bitmap_plot::plotter#0 + bitmap_plot::$1 -- pbuz1=pbuz1_plus_vwuz2
|
||||
clc
|
||||
lda.z plotter
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@ __constant char * const BG_COLOR = (char *) 53281
|
|||
__constant char *BITMAP = (char *) 8192
|
||||
__constant const char BLACK = 0
|
||||
__constant struct MOS6526_CIA * const CIA1 = (struct MOS6526_CIA *) 56320
|
||||
__constant const char CIA_INTERRUPT_CLEAR = $7f
|
||||
__constant const char CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
__constant char * const D011 = (char *) 53265
|
||||
__constant char * const D018 = (char *) 53272
|
||||
__constant void (** const HARDWARE_IRQ)() = (void (**)()) 65534
|
||||
|
|
|
|||
|
|
@ -137,20 +137,20 @@ bitmap_init: {
|
|||
sta.z yoffs+1
|
||||
ldx #0
|
||||
__b3:
|
||||
// y&$7
|
||||
// y&0x7
|
||||
lda #7
|
||||
sax.z __7
|
||||
// BYTE0(yoffs)
|
||||
lda.z yoffs
|
||||
// y&$7 | BYTE0(yoffs)
|
||||
// y&0x7 | BYTE0(yoffs)
|
||||
ora.z __7
|
||||
// bitmap_plot_ylo[y] = y&$7 | BYTE0(yoffs)
|
||||
// bitmap_plot_ylo[y] = y&0x7 | BYTE0(yoffs)
|
||||
sta bitmap_plot_ylo,x
|
||||
// BYTE1(yoffs)
|
||||
lda.z yoffs+1
|
||||
// bitmap_plot_yhi[y] = BYTE1(yoffs)
|
||||
sta bitmap_plot_yhi,x
|
||||
// if((y&$7)==7)
|
||||
// if((y&0x7)==7)
|
||||
lda #7
|
||||
cmp.z __7
|
||||
bne __b4
|
||||
|
|
@ -522,14 +522,14 @@ bitmap_plot: {
|
|||
sta.z plotter+1
|
||||
lda bitmap_plot_ylo,x
|
||||
sta.z plotter
|
||||
// x & $fff8
|
||||
// x & 0xfff8
|
||||
lda.z x
|
||||
and #<$fff8
|
||||
sta.z __1
|
||||
lda.z x+1
|
||||
and #>$fff8
|
||||
sta.z __1+1
|
||||
// plotter += ( x & $fff8 )
|
||||
// plotter += ( x & 0xfff8 )
|
||||
clc
|
||||
lda.z plotter
|
||||
adc.z __1
|
||||
|
|
|
|||
|
|
@ -3853,17 +3853,17 @@ bitmap_init: {
|
|||
// [28] phi bitmap_init::y#2 = bitmap_init::y#1 [phi:bitmap_init::@4->bitmap_init::@3#1] -- register_copy
|
||||
// bitmap_init::@3
|
||||
__b3:
|
||||
// y&$7
|
||||
// y&0x7
|
||||
// [29] bitmap_init::$7 = bitmap_init::y#2 & 7 -- vbuz1=vbuxx_band_vbuc1
|
||||
lda #7
|
||||
sax.z __7
|
||||
// BYTE0(yoffs)
|
||||
// [30] bitmap_init::$4 = byte0 bitmap_init::yoffs#2 -- vbuaa=_byte0_pbuz1
|
||||
lda.z yoffs
|
||||
// y&$7 | BYTE0(yoffs)
|
||||
// y&0x7 | BYTE0(yoffs)
|
||||
// [31] bitmap_init::$5 = bitmap_init::$7 | bitmap_init::$4 -- vbuaa=vbuz1_bor_vbuaa
|
||||
ora.z __7
|
||||
// bitmap_plot_ylo[y] = y&$7 | BYTE0(yoffs)
|
||||
// bitmap_plot_ylo[y] = y&0x7 | BYTE0(yoffs)
|
||||
// [32] bitmap_plot_ylo[bitmap_init::y#2] = bitmap_init::$5 -- pbuc1_derefidx_vbuxx=vbuaa
|
||||
sta bitmap_plot_ylo,x
|
||||
// BYTE1(yoffs)
|
||||
|
|
@ -3872,7 +3872,7 @@ bitmap_init: {
|
|||
// bitmap_plot_yhi[y] = BYTE1(yoffs)
|
||||
// [34] bitmap_plot_yhi[bitmap_init::y#2] = bitmap_init::$6 -- pbuc1_derefidx_vbuxx=vbuaa
|
||||
sta bitmap_plot_yhi,x
|
||||
// if((y&$7)==7)
|
||||
// if((y&0x7)==7)
|
||||
// [35] if(bitmap_init::$7!=7) goto bitmap_init::@4 -- vbuz1_neq_vbuc1_then_la1
|
||||
lda #7
|
||||
cmp.z __7
|
||||
|
|
@ -4410,7 +4410,7 @@ bitmap_plot: {
|
|||
sta.z plotter+1
|
||||
lda bitmap_plot_ylo,x
|
||||
sta.z plotter
|
||||
// x & $fff8
|
||||
// x & 0xfff8
|
||||
// [122] bitmap_plot::$1 = bitmap_plot::x#4 & $fff8 -- vwuz1=vwuz2_band_vwuc1
|
||||
lda.z x
|
||||
and #<$fff8
|
||||
|
|
@ -4418,7 +4418,7 @@ bitmap_plot: {
|
|||
lda.z x+1
|
||||
and #>$fff8
|
||||
sta.z __1+1
|
||||
// plotter += ( x & $fff8 )
|
||||
// plotter += ( x & 0xfff8 )
|
||||
// [123] bitmap_plot::plotter#1 = (char *)bitmap_plot::plotter#0 + bitmap_plot::$1 -- pbuz1=pbuz1_plus_vwuz2
|
||||
clc
|
||||
lda.z plotter
|
||||
|
|
|
|||
|
|
@ -298,10 +298,10 @@ print_uchar: {
|
|||
lda print_hextab,y
|
||||
// Table of hexadecimal digits
|
||||
jsr print_char
|
||||
// b&$f
|
||||
// b&0xf
|
||||
lda #$f
|
||||
axs #0
|
||||
// print_char(print_hextab[b&$f])
|
||||
// print_char(print_hextab[b&0xf])
|
||||
lda print_hextab,x
|
||||
jsr print_char
|
||||
// }
|
||||
|
|
@ -337,7 +337,7 @@ print_schar: {
|
|||
// Print a newline
|
||||
print_ln: {
|
||||
__b1:
|
||||
// print_line_cursor + $28
|
||||
// print_line_cursor + 0x28
|
||||
lda #$28
|
||||
clc
|
||||
adc.z print_line_cursor
|
||||
|
|
|
|||
|
|
@ -3978,11 +3978,11 @@ print_uchar: {
|
|||
// [95] phi print_char::ch#17 = print_char::ch#7 [phi:print_uchar->print_char#1] -- register_copy
|
||||
jsr print_char
|
||||
// print_uchar::@1
|
||||
// b&$f
|
||||
// b&0xf
|
||||
// [91] print_uchar::$2 = print_uchar::b#5 & $f -- vbuxx=vbuxx_band_vbuc1
|
||||
lda #$f
|
||||
axs #0
|
||||
// print_char(print_hextab[b&$f])
|
||||
// print_char(print_hextab[b&0xf])
|
||||
// [92] print_char::ch#8 = print_hextab[print_uchar::$2] -- vbuaa=pbuc1_derefidx_vbuxx
|
||||
lda print_hextab,x
|
||||
// [93] call print_char
|
||||
|
|
@ -4049,7 +4049,7 @@ print_ln: {
|
|||
// [106] phi print_line_cursor#21 = print_line_cursor#41 [phi:print_ln/print_ln::@1->print_ln::@1#0] -- register_copy
|
||||
// print_ln::@1
|
||||
__b1:
|
||||
// print_line_cursor + $28
|
||||
// print_line_cursor + 0x28
|
||||
// [107] print_line_cursor#0 = print_line_cursor#21 + $28 -- pbuz1=pbuz1_plus_vbuc1
|
||||
lda #$28
|
||||
clc
|
||||
|
|
|
|||
|
|
@ -180,11 +180,11 @@ print_uchar_at: {
|
|||
sta.z print_char_at.at+1
|
||||
// Table of hexadecimal digits
|
||||
jsr print_char_at
|
||||
// b&$f
|
||||
// b&0xf
|
||||
lda #$f
|
||||
and.z b
|
||||
tay
|
||||
// print_char_at(print_hextab[b&$f], at+1)
|
||||
// print_char_at(print_hextab[b&0xf], at+1)
|
||||
clc
|
||||
lda.z at
|
||||
adc #1
|
||||
|
|
|
|||
|
|
@ -1313,12 +1313,12 @@ print_uchar_at: {
|
|||
// [43] phi print_char_at::ch#2 = print_char_at::ch#0 [phi:print_uchar_at->print_char_at#1] -- register_copy
|
||||
jsr print_char_at
|
||||
// print_uchar_at::@1
|
||||
// b&$f
|
||||
// b&0xf
|
||||
// [38] print_uchar_at::$2 = print_uchar_at::b#2 & $f -- vbuyy=vbuz1_band_vbuc1
|
||||
lda #$f
|
||||
and.z b
|
||||
tay
|
||||
// print_char_at(print_hextab[b&$f], at+1)
|
||||
// print_char_at(print_hextab[b&0xf], at+1)
|
||||
// [39] print_char_at::at#1 = print_uchar_at::at#2 + 1 -- pbuz1=pbuz2_plus_1
|
||||
clc
|
||||
lda.z at
|
||||
|
|
|
|||
|
|
@ -157,11 +157,11 @@ print_uchar_at: {
|
|||
sta.z print_char_at.at+1
|
||||
// Table of hexadecimal digits
|
||||
jsr print_char_at
|
||||
// b&$f
|
||||
// b&0xf
|
||||
lda #$f
|
||||
and.z b
|
||||
tay
|
||||
// print_char_at(print_hextab[b&$f], at+1)
|
||||
// print_char_at(print_hextab[b&0xf], at+1)
|
||||
clc
|
||||
lda.z at
|
||||
adc #1
|
||||
|
|
|
|||
|
|
@ -1227,12 +1227,12 @@ print_uchar_at: {
|
|||
// [40] phi print_char_at::ch#2 = print_char_at::ch#0 [phi:print_uchar_at->print_char_at#1] -- register_copy
|
||||
jsr print_char_at
|
||||
// print_uchar_at::@1
|
||||
// b&$f
|
||||
// b&0xf
|
||||
// [35] print_uchar_at::$2 = print_uchar_at::b#2 & $f -- vbuyy=vbuz1_band_vbuc1
|
||||
lda #$f
|
||||
and.z b
|
||||
tay
|
||||
// print_char_at(print_hextab[b&$f], at+1)
|
||||
// print_char_at(print_hextab[b&0xf], at+1)
|
||||
// [36] print_char_at::at#1 = print_uchar_at::at#2 + 1 -- pbuz1=pbuz2_plus_1
|
||||
clc
|
||||
lda.z at
|
||||
|
|
|
|||
|
|
@ -297,7 +297,7 @@ print_str: {
|
|||
// Print a newline
|
||||
print_ln: {
|
||||
__b1:
|
||||
// print_line_cursor + $28
|
||||
// print_line_cursor + 0x28
|
||||
lda #$28
|
||||
clc
|
||||
adc.z print_line_cursor
|
||||
|
|
|
|||
|
|
@ -2892,7 +2892,7 @@ print_ln: {
|
|||
// [69] phi print_line_cursor#25 = print_line_cursor#49 [phi:print_ln/print_ln::@1->print_ln::@1#0] -- register_copy
|
||||
// print_ln::@1
|
||||
__b1:
|
||||
// print_line_cursor + $28
|
||||
// print_line_cursor + 0x28
|
||||
// [70] print_line_cursor#0 = print_line_cursor#25 + $28 -- pbuz1=pbuz1_plus_vbuc1
|
||||
lda #$28
|
||||
clc
|
||||
|
|
|
|||
|
|
@ -1917,11 +1917,11 @@ divr8u: {
|
|||
__b1:
|
||||
// rem = rem << 1
|
||||
asl.z rem
|
||||
// dividend & $80
|
||||
// dividend & 0x80
|
||||
lda #$80
|
||||
and.z dividend
|
||||
sta.z __1
|
||||
// if( (dividend & $80) != 0 )
|
||||
// if( (dividend & 0x80) != 0 )
|
||||
beq __b2
|
||||
// rem = rem | 1
|
||||
lda #1
|
||||
|
|
|
|||
|
|
@ -16613,12 +16613,12 @@ divr8u: {
|
|||
// rem = rem << 1
|
||||
// [458] divr8u::rem#0 = divr8u::rem#5 << 1 -- vbuz1=vbuz1_rol_1
|
||||
asl.z rem
|
||||
// dividend & $80
|
||||
// dividend & 0x80
|
||||
// [459] divr8u::$1 = divr8u::dividend#3 & $80 -- vbuz1=vbuz2_band_vbuc1
|
||||
lda #$80
|
||||
and.z dividend
|
||||
sta.z __1
|
||||
// if( (dividend & $80) != 0 )
|
||||
// if( (dividend & 0x80) != 0 )
|
||||
// [460] if(divr8u::$1==0) goto divr8u::@2 -- vbuz1_eq_0_then_la1
|
||||
beq __b2
|
||||
// divr8u::@4
|
||||
|
|
|
|||
|
|
@ -169,10 +169,10 @@ print_uchar: {
|
|||
lda print_hextab,y
|
||||
// Table of hexadecimal digits
|
||||
jsr print_char
|
||||
// b&$f
|
||||
// b&0xf
|
||||
lda #$f
|
||||
axs #0
|
||||
// print_char(print_hextab[b&$f])
|
||||
// print_char(print_hextab[b&0xf])
|
||||
lda print_hextab,x
|
||||
jsr print_char
|
||||
// }
|
||||
|
|
@ -223,7 +223,7 @@ euclid: {
|
|||
// Print a newline
|
||||
print_ln: {
|
||||
__b1:
|
||||
// print_line_cursor + $28
|
||||
// print_line_cursor + 0x28
|
||||
lda #$28
|
||||
clc
|
||||
adc.z print_line_cursor
|
||||
|
|
|
|||
|
|
@ -2155,11 +2155,11 @@ print_uchar: {
|
|||
// [50] phi print_char::ch#4 = print_char::ch#0 [phi:print_uchar->print_char#1] -- register_copy
|
||||
jsr print_char
|
||||
// print_uchar::@1
|
||||
// b&$f
|
||||
// b&0xf
|
||||
// [46] print_uchar::$2 = print_uchar::b#3 & $f -- vbuxx=vbuxx_band_vbuc1
|
||||
lda #$f
|
||||
axs #0
|
||||
// print_char(print_hextab[b&$f])
|
||||
// print_char(print_hextab[b&0xf])
|
||||
// [47] print_char::ch#1 = print_hextab[print_uchar::$2] -- vbuaa=pbuc1_derefidx_vbuxx
|
||||
lda print_hextab,x
|
||||
// [48] call print_char
|
||||
|
|
@ -2240,7 +2240,7 @@ print_ln: {
|
|||
// [62] phi print_line_cursor#17 = print_line_cursor#35 [phi:print_ln/print_ln::@1->print_ln::@1#0] -- register_copy
|
||||
// print_ln::@1
|
||||
__b1:
|
||||
// print_line_cursor + $28
|
||||
// print_line_cursor + 0x28
|
||||
// [63] print_line_cursor#0 = print_line_cursor#17 + $28 -- pbuz1=pbuz1_plus_vbuc1
|
||||
lda #$28
|
||||
clc
|
||||
|
|
|
|||
|
|
@ -350,10 +350,10 @@ print_uchar: {
|
|||
lda print_hextab,y
|
||||
// Table of hexadecimal digits
|
||||
jsr print_char
|
||||
// b&$f
|
||||
// b&0xf
|
||||
lda #$f
|
||||
axs #0
|
||||
// print_char(print_hextab[b&$f])
|
||||
// print_char(print_hextab[b&0xf])
|
||||
lda print_hextab,x
|
||||
jsr print_char
|
||||
// }
|
||||
|
|
@ -366,7 +366,7 @@ print_ln: {
|
|||
lda #>print_screen
|
||||
sta.z print_line_cursor+1
|
||||
__b1:
|
||||
// print_line_cursor + $28
|
||||
// print_line_cursor + 0x28
|
||||
lda #$28
|
||||
clc
|
||||
adc.z print_line_cursor
|
||||
|
|
|
|||
|
|
@ -3271,11 +3271,11 @@ print_uchar: {
|
|||
// [107] phi print_char::ch#5 = print_char::ch#3 [phi:print_uchar->print_char#1] -- register_copy
|
||||
jsr print_char
|
||||
// print_uchar::@1
|
||||
// b&$f
|
||||
// b&0xf
|
||||
// [98] print_uchar::$2 = print_uchar::b#3 & $f -- vbuxx=vbuxx_band_vbuc1
|
||||
lda #$f
|
||||
axs #0
|
||||
// print_char(print_hextab[b&$f])
|
||||
// print_char(print_hextab[b&0xf])
|
||||
// [99] print_char::ch#4 = print_hextab[print_uchar::$2] -- vbuaa=pbuc1_derefidx_vbuxx
|
||||
lda print_hextab,x
|
||||
// [100] call print_char
|
||||
|
|
@ -3301,7 +3301,7 @@ print_ln: {
|
|||
// [103] phi print_line_cursor#12 = print_line_cursor#0 [phi:print_ln::@1->print_ln::@1#0] -- register_copy
|
||||
// print_ln::@1
|
||||
__b1:
|
||||
// print_line_cursor + $28
|
||||
// print_line_cursor + 0x28
|
||||
// [104] print_line_cursor#0 = print_line_cursor#12 + $28 -- pbuz1=pbuz1_plus_vbuc1
|
||||
lda #$28
|
||||
clc
|
||||
|
|
|
|||
|
|
@ -90,20 +90,20 @@ bitmap_init: {
|
|||
sta.z yoffs+1
|
||||
ldx #0
|
||||
__b3:
|
||||
// y&$7
|
||||
// y&0x7
|
||||
lda #7
|
||||
sax.z __7
|
||||
// BYTE0(yoffs)
|
||||
lda.z yoffs
|
||||
// y&$7 | BYTE0(yoffs)
|
||||
// y&0x7 | BYTE0(yoffs)
|
||||
ora.z __7
|
||||
// bitmap_plot_ylo[y] = y&$7 | BYTE0(yoffs)
|
||||
// bitmap_plot_ylo[y] = y&0x7 | BYTE0(yoffs)
|
||||
sta bitmap_plot_ylo,x
|
||||
// BYTE1(yoffs)
|
||||
lda.z yoffs+1
|
||||
// bitmap_plot_yhi[y] = BYTE1(yoffs)
|
||||
sta bitmap_plot_yhi,x
|
||||
// if((y&$7)==7)
|
||||
// if((y&0x7)==7)
|
||||
lda #7
|
||||
cmp.z __7
|
||||
bne __b4
|
||||
|
|
@ -538,14 +538,14 @@ bitmap_plot: {
|
|||
sta.z plotter+1
|
||||
lda bitmap_plot_ylo,x
|
||||
sta.z plotter
|
||||
// x & $fff8
|
||||
// x & 0xfff8
|
||||
lda.z x
|
||||
and #<$fff8
|
||||
sta.z __1
|
||||
lda.z x+1
|
||||
and #>$fff8
|
||||
sta.z __1+1
|
||||
// plotter += ( x & $fff8 )
|
||||
// plotter += ( x & 0xfff8 )
|
||||
clc
|
||||
lda.z plotter
|
||||
adc.z __1
|
||||
|
|
|
|||
|
|
@ -3672,17 +3672,17 @@ bitmap_init: {
|
|||
// [20] phi bitmap_init::y#2 = bitmap_init::y#1 [phi:bitmap_init::@4->bitmap_init::@3#1] -- register_copy
|
||||
// bitmap_init::@3
|
||||
__b3:
|
||||
// y&$7
|
||||
// y&0x7
|
||||
// [21] bitmap_init::$7 = bitmap_init::y#2 & 7 -- vbuz1=vbuxx_band_vbuc1
|
||||
lda #7
|
||||
sax.z __7
|
||||
// BYTE0(yoffs)
|
||||
// [22] bitmap_init::$4 = byte0 bitmap_init::yoffs#2 -- vbuaa=_byte0_pbuz1
|
||||
lda.z yoffs
|
||||
// y&$7 | BYTE0(yoffs)
|
||||
// y&0x7 | BYTE0(yoffs)
|
||||
// [23] bitmap_init::$5 = bitmap_init::$7 | bitmap_init::$4 -- vbuaa=vbuz1_bor_vbuaa
|
||||
ora.z __7
|
||||
// bitmap_plot_ylo[y] = y&$7 | BYTE0(yoffs)
|
||||
// bitmap_plot_ylo[y] = y&0x7 | BYTE0(yoffs)
|
||||
// [24] bitmap_plot_ylo[bitmap_init::y#2] = bitmap_init::$5 -- pbuc1_derefidx_vbuxx=vbuaa
|
||||
sta bitmap_plot_ylo,x
|
||||
// BYTE1(yoffs)
|
||||
|
|
@ -3691,7 +3691,7 @@ bitmap_init: {
|
|||
// bitmap_plot_yhi[y] = BYTE1(yoffs)
|
||||
// [26] bitmap_plot_yhi[bitmap_init::y#2] = bitmap_init::$6 -- pbuc1_derefidx_vbuxx=vbuaa
|
||||
sta bitmap_plot_yhi,x
|
||||
// if((y&$7)==7)
|
||||
// if((y&0x7)==7)
|
||||
// [27] if(bitmap_init::$7!=7) goto bitmap_init::@4 -- vbuz1_neq_vbuc1_then_la1
|
||||
lda #7
|
||||
cmp.z __7
|
||||
|
|
@ -4321,7 +4321,7 @@ bitmap_plot: {
|
|||
sta.z plotter+1
|
||||
lda bitmap_plot_ylo,x
|
||||
sta.z plotter
|
||||
// x & $fff8
|
||||
// x & 0xfff8
|
||||
// [130] bitmap_plot::$1 = bitmap_plot::x#4 & $fff8 -- vwuz1=vwuz2_band_vwuc1
|
||||
lda.z x
|
||||
and #<$fff8
|
||||
|
|
@ -4329,7 +4329,7 @@ bitmap_plot: {
|
|||
lda.z x+1
|
||||
and #>$fff8
|
||||
sta.z __1+1
|
||||
// plotter += ( x & $fff8 )
|
||||
// plotter += ( x & 0xfff8 )
|
||||
// [131] bitmap_plot::plotter#1 = (char *)bitmap_plot::plotter#0 + bitmap_plot::$1 -- pbuz1=pbuz1_plus_vwuz2
|
||||
clc
|
||||
lda.z plotter
|
||||
|
|
|
|||
|
|
@ -258,11 +258,11 @@ print_uchar_at: {
|
|||
ldx print_hextab,y
|
||||
// Table of hexadecimal digits
|
||||
jsr print_char_at
|
||||
// b&$f
|
||||
// b&0xf
|
||||
lda #$f
|
||||
and.z b
|
||||
tay
|
||||
// print_char_at(print_hextab[b&$f], at+1)
|
||||
// print_char_at(print_hextab[b&0xf], at+1)
|
||||
inc.z print_char_at.at
|
||||
bne !+
|
||||
inc.z print_char_at.at+1
|
||||
|
|
|
|||
|
|
@ -2444,12 +2444,12 @@ print_uchar_at: {
|
|||
// [65] phi print_char_at::ch#4 = print_char_at::ch#2 [phi:print_uchar_at->print_char_at#1] -- register_copy
|
||||
jsr print_char_at
|
||||
// print_uchar_at::@1
|
||||
// b&$f
|
||||
// b&0xf
|
||||
// [72] print_uchar_at::$2 = print_uchar_at::b#0 & $f -- vbuyy=vbuz1_band_vbuc1
|
||||
lda #$f
|
||||
and.z b
|
||||
tay
|
||||
// print_char_at(print_hextab[b&$f], at+1)
|
||||
// print_char_at(print_hextab[b&0xf], at+1)
|
||||
// [73] print_char_at::at#3 = print_uchar_at::at#0 + 1 -- pbuz1=pbuz1_plus_1
|
||||
inc.z print_char_at.at
|
||||
bne !+
|
||||
|
|
|
|||
|
|
@ -14,7 +14,7 @@
|
|||
.segment Basic
|
||||
:BasicUpstart(main)
|
||||
/// Value that disables all CIA interrupts when stored to the CIA Interrupt registers
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
.const CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
/// $D011 Control Register #1 Bit#3: RSEL Switch betweem 25 or 24 visible rows
|
||||
/// RSEL| Display window height | First line | Last line
|
||||
/// ----+--------------------------+-------------+----------
|
||||
|
|
@ -123,9 +123,9 @@ main: {
|
|||
sta GHOST_BYTE
|
||||
// asm
|
||||
sei
|
||||
// CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR
|
||||
// CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL
|
||||
// Disable CIA 1 Timer IRQ
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
lda #CIA_INTERRUPT_CLEAR_ALL
|
||||
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
// VICII->CONTROL1 &= 0x7f
|
||||
// Set raster line to 0xfa
|
||||
|
|
|
|||
|
|
@ -29,7 +29,7 @@ void main()
|
|||
main: scope:[main] from
|
||||
[14] *GHOST_BYTE = 0
|
||||
asm { sei }
|
||||
[16] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
|
||||
[16] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL
|
||||
[17] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $7f
|
||||
[18] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $fa
|
||||
[19] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE) = IRQ_RASTER
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ void main()
|
|||
main: scope:[main] from __start
|
||||
*GHOST_BYTE = 0
|
||||
asm { sei }
|
||||
*((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
|
||||
*((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL
|
||||
*((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $7f
|
||||
*((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $fa
|
||||
*((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE) = IRQ_RASTER
|
||||
|
|
@ -61,7 +61,7 @@ __start::@return: scope:[__start] from __start::@1
|
|||
|
||||
SYMBOL TABLE SSA
|
||||
__constant struct MOS6526_CIA * const CIA1 = (struct MOS6526_CIA *)$dc00
|
||||
__constant const char CIA_INTERRUPT_CLEAR = $7f
|
||||
__constant const char CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
__constant char * const GHOST_BYTE = (char *)$3fff
|
||||
__constant void (** const HARDWARE_IRQ)() = (void (**)())$fffe
|
||||
__constant const char IRQ_RASTER = 1
|
||||
|
|
@ -164,7 +164,7 @@ void main()
|
|||
main: scope:[main] from
|
||||
[14] *GHOST_BYTE = 0
|
||||
asm { sei }
|
||||
[16] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
|
||||
[16] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL
|
||||
[17] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $7f
|
||||
[18] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $fa
|
||||
[19] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE) = IRQ_RASTER
|
||||
|
|
@ -201,7 +201,7 @@ Statement [11] *HARDWARE_IRQ = &irq_bottom_2 [ ] ( [ ] { } ) always clobbers r
|
|||
Statement [12] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = RED [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [13] return [ ] ( [ ] { } ) always clobbers reg byte a reg byte x reg byte y
|
||||
Statement [14] *GHOST_BYTE = 0 [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [16] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [16] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [17] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $7f [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [18] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $fa [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [19] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE) = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
|
|
@ -248,7 +248,7 @@ ASSEMBLER BEFORE OPTIMIZATION
|
|||
:BasicUpstart(main)
|
||||
// Global Constants & labels
|
||||
/// Value that disables all CIA interrupts when stored to the CIA Interrupt registers
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
.const CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
/// $D011 Control Register #1 Bit#3: RSEL Switch betweem 25 or 24 visible rows
|
||||
/// RSEL| Display window height | First line | Last line
|
||||
/// ----+--------------------------+-------------+----------
|
||||
|
|
@ -370,9 +370,9 @@ main: {
|
|||
sta GHOST_BYTE
|
||||
// asm { sei }
|
||||
sei
|
||||
// [16] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR -- _deref_pbuc1=vbuc2
|
||||
// [16] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL -- _deref_pbuc1=vbuc2
|
||||
// Disable CIA 1 Timer IRQ
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
lda #CIA_INTERRUPT_CLEAR_ALL
|
||||
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
// [17] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
|
||||
// Set raster line to 0xfa
|
||||
|
|
@ -425,7 +425,7 @@ Succesful ASM optimization Pass5RedundantLabelElimination
|
|||
|
||||
FINAL SYMBOL TABLE
|
||||
__constant struct MOS6526_CIA * const CIA1 = (struct MOS6526_CIA *) 56320
|
||||
__constant const char CIA_INTERRUPT_CLEAR = $7f
|
||||
__constant const char CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
__constant char * const GHOST_BYTE = (char *) 16383
|
||||
__constant void (** const HARDWARE_IRQ)() = (void (**)()) 65534
|
||||
__constant const char IRQ_RASTER = 1
|
||||
|
|
@ -471,7 +471,7 @@ Score: 422
|
|||
:BasicUpstart(main)
|
||||
// Global Constants & labels
|
||||
/// Value that disables all CIA interrupts when stored to the CIA Interrupt registers
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
.const CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
/// $D011 Control Register #1 Bit#3: RSEL Switch betweem 25 or 24 visible rows
|
||||
/// RSEL| Display window height | First line | Last line
|
||||
/// ----+--------------------------+-------------+----------
|
||||
|
|
@ -605,10 +605,10 @@ main: {
|
|||
// asm
|
||||
// asm { sei }
|
||||
sei
|
||||
// CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR
|
||||
// [16] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR -- _deref_pbuc1=vbuc2
|
||||
// CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL
|
||||
// [16] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL -- _deref_pbuc1=vbuc2
|
||||
// Disable CIA 1 Timer IRQ
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
lda #CIA_INTERRUPT_CLEAR_ALL
|
||||
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
// VICII->CONTROL1 &= 0x7f
|
||||
// [17] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
__constant struct MOS6526_CIA * const CIA1 = (struct MOS6526_CIA *) 56320
|
||||
__constant const char CIA_INTERRUPT_CLEAR = $7f
|
||||
__constant const char CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
__constant char * const GHOST_BYTE = (char *) 16383
|
||||
__constant void (** const HARDWARE_IRQ)() = (void (**)()) 65534
|
||||
__constant const char IRQ_RASTER = 1
|
||||
|
|
|
|||
|
|
@ -14,7 +14,7 @@
|
|||
.segment Basic
|
||||
:BasicUpstart(main)
|
||||
/// Value that disables all CIA interrupts when stored to the CIA Interrupt registers
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
.const CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
/// VICII IRQ Status/Enable Raster
|
||||
// @see #IRQ_ENABLE #IRQ_STATUS
|
||||
/// 0 | RST| Reaching a certain raster line. The line is specified by writing
|
||||
|
|
@ -62,9 +62,9 @@ main: {
|
|||
sei
|
||||
// (*musicInit)()
|
||||
jsr musicInit
|
||||
// CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR
|
||||
// CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL
|
||||
// Disable CIA 1 Timer IRQ
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
lda #CIA_INTERRUPT_CLEAR_ALL
|
||||
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
// VICII->CONTROL1 &=$7f
|
||||
// Set raster line to $fd
|
||||
|
|
|
|||
|
|
@ -18,7 +18,7 @@ main: scope:[main] from
|
|||
[6] callexecute *musicInit
|
||||
to:main::@1
|
||||
main::@1: scope:[main] from main
|
||||
[7] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
|
||||
[7] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL
|
||||
[8] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $7f
|
||||
[9] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $fd
|
||||
[10] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE) = IRQ_RASTER
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@ main: scope:[main] from __start::@1
|
|||
callexecute *musicInit
|
||||
to:main::@1
|
||||
main::@1: scope:[main] from main
|
||||
*((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
|
||||
*((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL
|
||||
*((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $7f
|
||||
*((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $fd
|
||||
*((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE) = IRQ_RASTER
|
||||
|
|
@ -52,7 +52,7 @@ __start::@return: scope:[__start] from __start::@2
|
|||
|
||||
SYMBOL TABLE SSA
|
||||
__constant struct MOS6526_CIA * const CIA1 = (struct MOS6526_CIA *)$dc00
|
||||
__constant const char CIA_INTERRUPT_CLEAR = $7f
|
||||
__constant const char CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
__constant const char IRQ_RASTER = 1
|
||||
__constant void (** const KERNEL_IRQ)() = (void (**)())$314
|
||||
__constant char MUSIC[] = kickasm {{ .const music = LoadSid("toiletrensdyr.sid")
|
||||
|
|
@ -125,7 +125,7 @@ main: scope:[main] from
|
|||
[6] callexecute *musicInit
|
||||
to:main::@1
|
||||
main::@1: scope:[main] from main
|
||||
[7] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
|
||||
[7] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL
|
||||
[8] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $7f
|
||||
[9] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $fd
|
||||
[10] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE) = IRQ_RASTER
|
||||
|
|
@ -147,7 +147,7 @@ REGISTER UPLIFT POTENTIAL REGISTERS
|
|||
Statement [1] callexecute *musicPlay [ ] ( [ ] { } ) always clobbers reg byte a reg byte x reg byte y
|
||||
Statement [2] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_STATUS) = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [6] callexecute *musicInit [ ] ( [ ] { } ) always clobbers reg byte a reg byte x reg byte y
|
||||
Statement [7] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [7] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [8] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $7f [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [9] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $fd [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [10] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE) = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
|
|
@ -188,7 +188,7 @@ ASSEMBLER BEFORE OPTIMIZATION
|
|||
:BasicUpstart(main)
|
||||
// Global Constants & labels
|
||||
/// Value that disables all CIA interrupts when stored to the CIA Interrupt registers
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
.const CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
/// VICII IRQ Status/Enable Raster
|
||||
// @see #IRQ_ENABLE #IRQ_STATUS
|
||||
/// 0 | RST| Reaching a certain raster line. The line is specified by writing
|
||||
|
|
@ -249,9 +249,9 @@ main: {
|
|||
jmp __b1
|
||||
// main::@1
|
||||
__b1:
|
||||
// [7] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR -- _deref_pbuc1=vbuc2
|
||||
// [7] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL -- _deref_pbuc1=vbuc2
|
||||
// Disable CIA 1 Timer IRQ
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
lda #CIA_INTERRUPT_CLEAR_ALL
|
||||
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
// [8] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
|
||||
// Set raster line to $fd
|
||||
|
|
@ -302,7 +302,7 @@ Succesful ASM optimization Pass5UnusedLabelElimination
|
|||
|
||||
FINAL SYMBOL TABLE
|
||||
__constant struct MOS6526_CIA * const CIA1 = (struct MOS6526_CIA *) 56320
|
||||
__constant const char CIA_INTERRUPT_CLEAR = $7f
|
||||
__constant const char CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
__constant const char IRQ_RASTER = 1
|
||||
__constant void (** const KERNEL_IRQ)() = (void (**)()) 788
|
||||
__constant char MUSIC[] = kickasm {{ .const music = LoadSid("toiletrensdyr.sid")
|
||||
|
|
@ -344,7 +344,7 @@ Score: 110
|
|||
:BasicUpstart(main)
|
||||
// Global Constants & labels
|
||||
/// Value that disables all CIA interrupts when stored to the CIA Interrupt registers
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
.const CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
/// VICII IRQ Status/Enable Raster
|
||||
// @see #IRQ_ENABLE #IRQ_STATUS
|
||||
/// 0 | RST| Reaching a certain raster line. The line is specified by writing
|
||||
|
|
@ -406,10 +406,10 @@ main: {
|
|||
// [6] callexecute *musicInit -- call__deref_pprc1
|
||||
jsr musicInit
|
||||
// main::@1
|
||||
// CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR
|
||||
// [7] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR -- _deref_pbuc1=vbuc2
|
||||
// CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL
|
||||
// [7] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL -- _deref_pbuc1=vbuc2
|
||||
// Disable CIA 1 Timer IRQ
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
lda #CIA_INTERRUPT_CLEAR_ALL
|
||||
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
// VICII->CONTROL1 &=$7f
|
||||
// [8] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
__constant struct MOS6526_CIA * const CIA1 = (struct MOS6526_CIA *) 56320
|
||||
__constant const char CIA_INTERRUPT_CLEAR = $7f
|
||||
__constant const char CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
__constant const char IRQ_RASTER = 1
|
||||
__constant void (** const KERNEL_IRQ)() = (void (**)()) 788
|
||||
__constant char MUSIC[] = kickasm {{ .const music = LoadSid("toiletrensdyr.sid")
|
||||
|
|
|
|||
|
|
@ -10,7 +10,7 @@
|
|||
.segment Basic
|
||||
:BasicUpstart(__start)
|
||||
/// Value that disables all CIA interrupts when stored to the CIA Interrupt registers
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
.const CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
.const SAMPLE_SIZE = $6100
|
||||
.const OFFSET_STRUCT_MOS6526_CIA_INTERRUPT = $d
|
||||
.const OFFSET_STRUCT_MOS6526_CIA_TIMER_A = 4
|
||||
|
|
@ -124,8 +124,8 @@ main: {
|
|||
sta $d40b
|
||||
sta $d412
|
||||
sei
|
||||
// CIA2->INTERRUPT = CIA_INTERRUPT_CLEAR
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
// CIA2->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL
|
||||
lda #CIA_INTERRUPT_CLEAR_ALL
|
||||
sta CIA2+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
// *KERNEL_NMI = &nmi
|
||||
lda #<nmi
|
||||
|
|
|
|||
|
|
@ -52,7 +52,7 @@ void main()
|
|||
main: scope:[main] from __start::@1
|
||||
asm { lda#$ff sta$d406 sta$d40d sta$d414 lda#$49 sta$d404 sta$d40b sta$d412 }
|
||||
asm { sei }
|
||||
[25] *((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
|
||||
[25] *((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL
|
||||
[26] *KERNEL_NMI = &nmi
|
||||
[27] *((unsigned int *)CIA2+OFFSET_STRUCT_MOS6526_CIA_TIMER_A) = $88
|
||||
[28] *((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = $81
|
||||
|
|
|
|||
|
|
@ -9,7 +9,7 @@ void main()
|
|||
main: scope:[main] from __start::@1
|
||||
asm { lda#$ff sta$d406 sta$d40d sta$d414 lda#$49 sta$d404 sta$d40b sta$d412 }
|
||||
asm { sei }
|
||||
*((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
|
||||
*((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL
|
||||
*KERNEL_NMI = &nmi
|
||||
*((unsigned int *)CIA2+OFFSET_STRUCT_MOS6526_CIA_TIMER_A) = $88
|
||||
*((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = $81
|
||||
|
|
@ -74,7 +74,7 @@ __start::@return: scope:[__start] from __start::@2
|
|||
SYMBOL TABLE SSA
|
||||
__constant struct MOS6526_CIA * const CIA2 = (struct MOS6526_CIA *)$dd00
|
||||
__constant char * const CIA2_INTERRUPT = (char *)$dd0d
|
||||
__constant const char CIA_INTERRUPT_CLEAR = $7f
|
||||
__constant const char CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
__constant void (** const KERNEL_NMI)() = (void (**)())$318
|
||||
__constant char OFFSET_STRUCT_MOS6526_CIA_INTERRUPT = $d
|
||||
__constant char OFFSET_STRUCT_MOS6526_CIA_TIMER_A = 4
|
||||
|
|
@ -199,7 +199,7 @@ void main()
|
|||
main: scope:[main] from __start::@1
|
||||
asm { lda#$ff sta$d406 sta$d40d sta$d414 lda#$49 sta$d404 sta$d40b sta$d412 }
|
||||
asm { sei }
|
||||
[25] *((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
|
||||
[25] *((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL
|
||||
[26] *KERNEL_NMI = &nmi
|
||||
[27] *((unsigned int *)CIA2+OFFSET_STRUCT_MOS6526_CIA_TIMER_A) = $88
|
||||
[28] *((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = $81
|
||||
|
|
@ -247,7 +247,7 @@ Statement [18] nmi::$1 = *sample & $f [ nmi::$1 ] ( [ nmi::$1 ] { } ) always c
|
|||
Statement [20] *KERNEL_NMI = &nmi2 [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [22] return [ ] ( [ ] { } ) always clobbers reg byte a reg byte x reg byte y
|
||||
Statement asm { lda#$ff sta$d406 sta$d40d sta$d414 lda#$49 sta$d404 sta$d40b sta$d412 } always clobbers reg byte a
|
||||
Statement [25] *((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( main:3 [ ] { } ) always clobbers reg byte a
|
||||
Statement [25] *((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL [ ] ( main:3 [ ] { } ) always clobbers reg byte a
|
||||
Statement [26] *KERNEL_NMI = &nmi [ ] ( main:3 [ ] { } ) always clobbers reg byte a
|
||||
Statement [27] *((unsigned int *)CIA2+OFFSET_STRUCT_MOS6526_CIA_TIMER_A) = $88 [ ] ( main:3 [ ] { } ) always clobbers reg byte a
|
||||
Statement [28] *((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = $81 [ ] ( main:3 [ ] { } ) always clobbers reg byte a
|
||||
|
|
@ -295,7 +295,7 @@ ASSEMBLER BEFORE OPTIMIZATION
|
|||
:BasicUpstart(__start)
|
||||
// Global Constants & labels
|
||||
/// Value that disables all CIA interrupts when stored to the CIA Interrupt registers
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
.const CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
.const SAMPLE_SIZE = $6100
|
||||
.const OFFSET_STRUCT_MOS6526_CIA_INTERRUPT = $d
|
||||
.const OFFSET_STRUCT_MOS6526_CIA_TIMER_A = 4
|
||||
|
|
@ -442,8 +442,8 @@ main: {
|
|||
sta $d412
|
||||
// asm { sei }
|
||||
sei
|
||||
// [25] *((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR -- _deref_pbuc1=vbuc2
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
// [25] *((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL -- _deref_pbuc1=vbuc2
|
||||
lda #CIA_INTERRUPT_CLEAR_ALL
|
||||
sta CIA2+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
// [26] *KERNEL_NMI = &nmi -- _deref_qprc1=pprc2
|
||||
lda #<nmi
|
||||
|
|
@ -499,7 +499,7 @@ Succesful ASM optimization Pass5UnusedLabelElimination
|
|||
FINAL SYMBOL TABLE
|
||||
__constant struct MOS6526_CIA * const CIA2 = (struct MOS6526_CIA *) 56576
|
||||
__constant char * const CIA2_INTERRUPT = (char *) 56589
|
||||
__constant const char CIA_INTERRUPT_CLEAR = $7f
|
||||
__constant const char CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
__constant void (** const KERNEL_NMI)() = (void (**)()) 792
|
||||
__constant char OFFSET_STRUCT_MOS6526_CIA_INTERRUPT = $d
|
||||
__constant char OFFSET_STRUCT_MOS6526_CIA_TIMER_A = 4
|
||||
|
|
@ -543,7 +543,7 @@ Score: 579
|
|||
:BasicUpstart(__start)
|
||||
// Global Constants & labels
|
||||
/// Value that disables all CIA interrupts when stored to the CIA Interrupt registers
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
.const CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
.const SAMPLE_SIZE = $6100
|
||||
.const OFFSET_STRUCT_MOS6526_CIA_INTERRUPT = $d
|
||||
.const OFFSET_STRUCT_MOS6526_CIA_TIMER_A = 4
|
||||
|
|
@ -696,9 +696,9 @@ main: {
|
|||
sta $d412
|
||||
// asm { sei }
|
||||
sei
|
||||
// CIA2->INTERRUPT = CIA_INTERRUPT_CLEAR
|
||||
// [25] *((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR -- _deref_pbuc1=vbuc2
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
// CIA2->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL
|
||||
// [25] *((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL -- _deref_pbuc1=vbuc2
|
||||
lda #CIA_INTERRUPT_CLEAR_ALL
|
||||
sta CIA2+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
// *KERNEL_NMI = &nmi
|
||||
// [26] *KERNEL_NMI = &nmi -- _deref_qprc1=pprc2
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
__constant struct MOS6526_CIA * const CIA2 = (struct MOS6526_CIA *) 56576
|
||||
__constant char * const CIA2_INTERRUPT = (char *) 56589
|
||||
__constant const char CIA_INTERRUPT_CLEAR = $7f
|
||||
__constant const char CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
__constant void (** const KERNEL_NMI)() = (void (**)()) 792
|
||||
__constant char OFFSET_STRUCT_MOS6526_CIA_INTERRUPT = $d
|
||||
__constant char OFFSET_STRUCT_MOS6526_CIA_TIMER_A = 4
|
||||
|
|
|
|||
|
|
@ -17,7 +17,7 @@
|
|||
.text toIntString(main) // NNNN
|
||||
.byte $00, $00, $00 //
|
||||
/// Value that disables all CIA interrupts when stored to the CIA Interrupt registers
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
.const CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
/// VICII IRQ Status/Enable Raster
|
||||
// @see #IRQ_ENABLE #IRQ_STATUS
|
||||
/// 0 | RST| Reaching a certain raster line. The line is specified by writing
|
||||
|
|
@ -179,10 +179,10 @@ main: {
|
|||
sta.z memoryRemap.lowerPageOffset
|
||||
sta.z memoryRemap.lowerPageOffset+1
|
||||
jsr memoryRemap
|
||||
// CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR
|
||||
// CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL
|
||||
// Set up raster interrupts C64 style
|
||||
// Disable CIA 1 Timer IRQ
|
||||
ldz #CIA_INTERRUPT_CLEAR
|
||||
ldz #CIA_INTERRUPT_CLEAR_ALL
|
||||
stz CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
// VICII->RASTER = 0xff
|
||||
// Set raster line to 0xff
|
||||
|
|
|
|||
|
|
@ -54,7 +54,7 @@ main::@1: scope:[main] from main::@7
|
|||
[26] call memoryRemap
|
||||
to:main::@8
|
||||
main::@8: scope:[main] from main::@1
|
||||
[27] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
|
||||
[27] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL
|
||||
[28] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $ff
|
||||
[29] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $7f
|
||||
[30] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE) = IRQ_RASTER
|
||||
|
|
|
|||
|
|
@ -170,7 +170,7 @@ main::@1: scope:[main] from main::@7
|
|||
call memoryRemap
|
||||
to:main::@8
|
||||
main::@8: scope:[main] from main::@1
|
||||
*((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
|
||||
*((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL
|
||||
*((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $ff
|
||||
*((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $7f
|
||||
*((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE) = IRQ_RASTER
|
||||
|
|
@ -248,7 +248,7 @@ __start::@return: scope:[__start] from __start::@2
|
|||
|
||||
SYMBOL TABLE SSA
|
||||
__constant struct MOS6526_CIA * const CIA1 = (struct MOS6526_CIA *)$dc00
|
||||
__constant const char CIA_INTERRUPT_CLEAR = $7f
|
||||
__constant const char CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
__constant char * const DEFAULT_SCREEN = (char *)$800
|
||||
__constant struct F018_DMAGIC * const DMA = (struct F018_DMAGIC *)$d700
|
||||
__constant const char DMA_COMMAND_COPY = 0
|
||||
|
|
@ -717,7 +717,7 @@ main::@1: scope:[main] from main::@7
|
|||
[26] call memoryRemap
|
||||
to:main::@8
|
||||
main::@8: scope:[main] from main::@1
|
||||
[27] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
|
||||
[27] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL
|
||||
[28] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $ff
|
||||
[29] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $7f
|
||||
[30] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE) = IRQ_RASTER
|
||||
|
|
@ -901,7 +901,7 @@ Statement [18] *PROCPORT = PROCPORT_RAM_IO [ memcpy_dma_command4 ] ( [ memcpy_d
|
|||
Statement [19] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_LO) = 1 [ memcpy_dma_command4 ] ( [ memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement asm { lda#0 } always clobbers reg byte a
|
||||
Statement [24] callexecute *musicInit [ ] ( [ ] { } ) always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Statement [27] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [27] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [28] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $ff [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [29] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $7f [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [30] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE) = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
|
|
@ -943,7 +943,7 @@ Statement [18] *PROCPORT = PROCPORT_RAM_IO [ memcpy_dma_command4 ] ( [ memcpy_d
|
|||
Statement [19] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_LO) = 1 [ memcpy_dma_command4 ] ( [ memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement asm { lda#0 } always clobbers reg byte a
|
||||
Statement [24] callexecute *musicInit [ ] ( [ ] { } ) always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Statement [27] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [27] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [28] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $ff [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [29] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $7f [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [30] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE) = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
|
|
@ -1065,7 +1065,7 @@ ASSEMBLER BEFORE OPTIMIZATION
|
|||
.byte $00, $00, $00 //
|
||||
// Global Constants & labels
|
||||
/// Value that disables all CIA interrupts when stored to the CIA Interrupt registers
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
.const CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
/// VICII IRQ Status/Enable Raster
|
||||
// @see #IRQ_ENABLE #IRQ_STATUS
|
||||
/// 0 | RST| Reaching a certain raster line. The line is specified by writing
|
||||
|
|
@ -1299,10 +1299,10 @@ main: {
|
|||
jmp __b8
|
||||
// main::@8
|
||||
__b8:
|
||||
// [27] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR -- _deref_pbuc1=vbuc2
|
||||
// [27] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL -- _deref_pbuc1=vbuc2
|
||||
// Set up raster interrupts C64 style
|
||||
// Disable CIA 1 Timer IRQ
|
||||
ldz #CIA_INTERRUPT_CLEAR
|
||||
ldz #CIA_INTERRUPT_CLEAR_ALL
|
||||
stz CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
// [28] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $ff -- _deref_pbuc1=vbuc2
|
||||
// Set raster line to 0xff
|
||||
|
|
@ -1633,7 +1633,7 @@ Succesful ASM optimization Pass5UnusedLabelElimination
|
|||
|
||||
FINAL SYMBOL TABLE
|
||||
__constant struct MOS6526_CIA * const CIA1 = (struct MOS6526_CIA *) 56320
|
||||
__constant const char CIA_INTERRUPT_CLEAR = $7f
|
||||
__constant const char CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
__constant char * const DEFAULT_SCREEN = (char *) 2048
|
||||
__constant struct F018_DMAGIC * const DMA = (struct F018_DMAGIC *) 55040
|
||||
__constant const char DMA_COMMAND_COPY = 0
|
||||
|
|
@ -1769,7 +1769,7 @@ Score: 3045
|
|||
.byte $00, $00, $00 //
|
||||
// Global Constants & labels
|
||||
/// Value that disables all CIA interrupts when stored to the CIA Interrupt registers
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
.const CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
/// VICII IRQ Status/Enable Raster
|
||||
// @see #IRQ_ENABLE #IRQ_STATUS
|
||||
/// 0 | RST| Reaching a certain raster line. The line is specified by writing
|
||||
|
|
@ -1987,11 +1987,11 @@ main: {
|
|||
sta.z memoryRemap.lowerPageOffset+1
|
||||
jsr memoryRemap
|
||||
// main::@8
|
||||
// CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR
|
||||
// [27] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR -- _deref_pbuc1=vbuc2
|
||||
// CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL
|
||||
// [27] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL -- _deref_pbuc1=vbuc2
|
||||
// Set up raster interrupts C64 style
|
||||
// Disable CIA 1 Timer IRQ
|
||||
ldz #CIA_INTERRUPT_CLEAR
|
||||
ldz #CIA_INTERRUPT_CLEAR_ALL
|
||||
stz CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
// VICII->RASTER = 0xff
|
||||
// [28] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $ff -- _deref_pbuc1=vbuc2
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
__constant struct MOS6526_CIA * const CIA1 = (struct MOS6526_CIA *) 56320
|
||||
__constant const char CIA_INTERRUPT_CLEAR = $7f
|
||||
__constant const char CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
__constant char * const DEFAULT_SCREEN = (char *) 2048
|
||||
__constant struct F018_DMAGIC * const DMA = (struct F018_DMAGIC *) 55040
|
||||
__constant const char DMA_COMMAND_COPY = 0
|
||||
|
|
|
|||
|
|
@ -141,7 +141,7 @@ memoryRemapBlock: {
|
|||
lda #>$100
|
||||
sbc #0
|
||||
sta.z pageOffset+1
|
||||
// char block = blockPage / $20
|
||||
// char block = blockPage / 0x20
|
||||
// Which block is being remapped? (0-7)
|
||||
txa
|
||||
lsr
|
||||
|
|
|
|||
|
|
@ -1774,7 +1774,7 @@ memoryRemapBlock: {
|
|||
lda #>$100
|
||||
sbc #0
|
||||
sta.z pageOffset+1
|
||||
// char block = blockPage / $20
|
||||
// char block = blockPage / 0x20
|
||||
// [26] memoryRemapBlock::block#0 = memoryRemapBlock::blockPage#2 >> 5 -- vbuaa=vbuxx_ror_5
|
||||
// Which block is being remapped? (0-7)
|
||||
txa
|
||||
|
|
|
|||
|
|
@ -18,7 +18,7 @@
|
|||
.segment Basic
|
||||
:BasicUpstart(__start)
|
||||
/// Value that disables all CIA interrupts when stored to the CIA Interrupt registers
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
.const CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
/// VICII IRQ Status/Enable Raster
|
||||
// @see #IRQ_ENABLE #IRQ_STATUS
|
||||
/// 0 | RST| Reaching a certain raster line. The line is specified by writing
|
||||
|
|
@ -508,9 +508,9 @@ main: {
|
|||
// asm
|
||||
// Set up raster interrupts C64 style
|
||||
sei
|
||||
// CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR
|
||||
// CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL
|
||||
// Disable CIA 1 Timer IRQ
|
||||
ldz #CIA_INTERRUPT_CLEAR
|
||||
ldz #CIA_INTERRUPT_CLEAR_ALL
|
||||
stz CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
// VICII->RASTER = IRQ_Y
|
||||
// Set raster line to 0x16
|
||||
|
|
|
|||
|
|
@ -245,7 +245,7 @@ main::@6: scope:[main] from main::@4 main::@6
|
|||
to:main::@7
|
||||
main::@7: scope:[main] from main::@6
|
||||
asm { sei }
|
||||
[130] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
|
||||
[130] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL
|
||||
[131] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = IRQ_Y
|
||||
[132] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $7f
|
||||
[133] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE) = IRQ_RASTER
|
||||
|
|
|
|||
|
|
@ -133,7 +133,7 @@ main::@8: scope:[main] from main::@7 main::@8
|
|||
to:main::@9
|
||||
main::@9: scope:[main] from main::@8
|
||||
asm { sei }
|
||||
*((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
|
||||
*((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL
|
||||
*((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = IRQ_Y
|
||||
*((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $7f
|
||||
*((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE) = IRQ_RASTER
|
||||
|
|
@ -460,7 +460,7 @@ __start::@return: scope:[__start] from __start::@2
|
|||
|
||||
SYMBOL TABLE SSA
|
||||
__constant struct MOS6526_CIA * const CIA1 = (struct MOS6526_CIA *)$dc00
|
||||
__constant const char CIA_INTERRUPT_CLEAR = $7f
|
||||
__constant const char CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
__constant char * const COLORRAM = (char *)$d800
|
||||
__constant char * const DEFAULT_SCREEN = (char *)$400
|
||||
__constant char GREETING[] = " DOUBLEFLASH ADTBM SY2002 TAYGER SERIOUSLY LIBI IN PARADIZE LGB BLUEWAYSW SAUSAGE BIT SHIFTER INDIOCOLIFA GRUMPYNINJA 0-LIMITS CHEVERON DR. COMMODORE "
|
||||
|
|
@ -1559,7 +1559,7 @@ main::@6: scope:[main] from main::@4 main::@6
|
|||
to:main::@7
|
||||
main::@7: scope:[main] from main::@6
|
||||
asm { sei }
|
||||
[130] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
|
||||
[130] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL
|
||||
[131] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = IRQ_Y
|
||||
[132] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $7f
|
||||
[133] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE) = IRQ_RASTER
|
||||
|
|
@ -1867,7 +1867,7 @@ Statement [124] PALETTE_RED[main::i#2] = PAL_RED[main::i#2] [ main::i#2 ] ( main
|
|||
Removing always clobbered register reg byte a as potential for zp[1]:7 [ main::i#2 main::i#1 ]
|
||||
Statement [125] PALETTE_GREEN[main::i#2] = PAL_GREEN[main::i#2] [ main::i#2 ] ( main:7 [ main::i#2 ] { } ) always clobbers reg byte a
|
||||
Statement [126] PALETTE_BLUE[main::i#2] = PAL_BLUE[main::i#2] [ main::i#2 ] ( main:7 [ main::i#2 ] { } ) always clobbers reg byte a
|
||||
Statement [130] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( main:7 [ ] { } ) always clobbers reg byte z
|
||||
Statement [130] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL [ ] ( main:7 [ ] { } ) always clobbers reg byte z
|
||||
Statement [131] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = IRQ_Y [ ] ( main:7 [ ] { } ) always clobbers reg byte z
|
||||
Statement [132] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $7f [ ] ( main:7 [ ] { } ) always clobbers reg byte a
|
||||
Statement [133] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE) = IRQ_RASTER [ ] ( main:7 [ ] { } ) always clobbers reg byte z
|
||||
|
|
@ -1925,7 +1925,7 @@ Statement [116] callexecute *songInit [ ] ( main:7 [ ] { } ) always clobbers r
|
|||
Statement [124] PALETTE_RED[main::i#2] = PAL_RED[main::i#2] [ main::i#2 ] ( main:7 [ main::i#2 ] { } ) always clobbers reg byte a
|
||||
Statement [125] PALETTE_GREEN[main::i#2] = PAL_GREEN[main::i#2] [ main::i#2 ] ( main:7 [ main::i#2 ] { } ) always clobbers reg byte a
|
||||
Statement [126] PALETTE_BLUE[main::i#2] = PAL_BLUE[main::i#2] [ main::i#2 ] ( main:7 [ main::i#2 ] { } ) always clobbers reg byte a
|
||||
Statement [130] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( main:7 [ ] { } ) always clobbers reg byte z
|
||||
Statement [130] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL [ ] ( main:7 [ ] { } ) always clobbers reg byte z
|
||||
Statement [131] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = IRQ_Y [ ] ( main:7 [ ] { } ) always clobbers reg byte z
|
||||
Statement [132] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $7f [ ] ( main:7 [ ] { } ) always clobbers reg byte a
|
||||
Statement [133] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE) = IRQ_RASTER [ ] ( main:7 [ ] { } ) always clobbers reg byte z
|
||||
|
|
@ -2090,7 +2090,7 @@ ASSEMBLER BEFORE OPTIMIZATION
|
|||
:BasicUpstart(__start)
|
||||
// Global Constants & labels
|
||||
/// Value that disables all CIA interrupts when stored to the CIA Interrupt registers
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
.const CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
/// VICII IRQ Status/Enable Raster
|
||||
// @see #IRQ_ENABLE #IRQ_STATUS
|
||||
/// 0 | RST| Reaching a certain raster line. The line is specified by writing
|
||||
|
|
@ -2803,9 +2803,9 @@ main: {
|
|||
// asm { sei }
|
||||
// Set up raster interrupts C64 style
|
||||
sei
|
||||
// [130] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR -- _deref_pbuc1=vbuc2
|
||||
// [130] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL -- _deref_pbuc1=vbuc2
|
||||
// Disable CIA 1 Timer IRQ
|
||||
ldz #CIA_INTERRUPT_CLEAR
|
||||
ldz #CIA_INTERRUPT_CLEAR_ALL
|
||||
stz CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
// [131] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = IRQ_Y -- _deref_pbuc1=vbuc2
|
||||
// Set raster line to 0x16
|
||||
|
|
@ -3073,7 +3073,7 @@ Fixing long branch [162] bne __b20 to beq
|
|||
|
||||
FINAL SYMBOL TABLE
|
||||
__constant struct MOS6526_CIA * const CIA1 = (struct MOS6526_CIA *) 56320
|
||||
__constant const char CIA_INTERRUPT_CLEAR = $7f
|
||||
__constant const char CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
__constant char * const COLORRAM = (char *) 55296
|
||||
__constant char * const DEFAULT_SCREEN = (char *) 1024
|
||||
__constant char GREETING[] = " DOUBLEFLASH ADTBM SY2002 TAYGER SERIOUSLY LIBI IN PARADIZE LGB BLUEWAYSW SAUSAGE BIT SHIFTER INDIOCOLIFA GRUMPYNINJA 0-LIMITS CHEVERON DR. COMMODORE "
|
||||
|
|
@ -3293,7 +3293,7 @@ Score: 10519
|
|||
:BasicUpstart(__start)
|
||||
// Global Constants & labels
|
||||
/// Value that disables all CIA interrupts when stored to the CIA Interrupt registers
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
.const CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
/// VICII IRQ Status/Enable Raster
|
||||
// @see #IRQ_ENABLE #IRQ_STATUS
|
||||
/// 0 | RST| Reaching a certain raster line. The line is specified by writing
|
||||
|
|
@ -4017,10 +4017,10 @@ main: {
|
|||
// asm { sei }
|
||||
// Set up raster interrupts C64 style
|
||||
sei
|
||||
// CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR
|
||||
// [130] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR -- _deref_pbuc1=vbuc2
|
||||
// CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL
|
||||
// [130] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL -- _deref_pbuc1=vbuc2
|
||||
// Disable CIA 1 Timer IRQ
|
||||
ldz #CIA_INTERRUPT_CLEAR
|
||||
ldz #CIA_INTERRUPT_CLEAR_ALL
|
||||
stz CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
// VICII->RASTER = IRQ_Y
|
||||
// [131] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = IRQ_Y -- _deref_pbuc1=vbuc2
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
__constant struct MOS6526_CIA * const CIA1 = (struct MOS6526_CIA *) 56320
|
||||
__constant const char CIA_INTERRUPT_CLEAR = $7f
|
||||
__constant const char CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
__constant char * const COLORRAM = (char *) 55296
|
||||
__constant char * const DEFAULT_SCREEN = (char *) 1024
|
||||
__constant char GREETING[] = " DOUBLEFLASH ADTBM SY2002 TAYGER SERIOUSLY LIBI IN PARADIZE LGB BLUEWAYSW SAUSAGE BIT SHIFTER INDIOCOLIFA GRUMPYNINJA 0-LIMITS CHEVERON DR. COMMODORE "
|
||||
|
|
|
|||
|
|
@ -13,7 +13,7 @@
|
|||
.segment Code
|
||||
main: {
|
||||
.const vicSelectGfxBank1_toDd001_return = 3
|
||||
// CIA2->PORT_A_DDR = %00000011
|
||||
// CIA2->PORT_A_DDR = 0b00000011
|
||||
lda #3
|
||||
sta CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR
|
||||
// CIA2->PORT_A = toDd00(gfx)
|
||||
|
|
|
|||
|
|
@ -271,7 +271,7 @@ Score: 18
|
|||
main: {
|
||||
.const vicSelectGfxBank1_toDd001_return = 3
|
||||
// main::vicSelectGfxBank1
|
||||
// CIA2->PORT_A_DDR = %00000011
|
||||
// CIA2->PORT_A_DDR = 0b00000011
|
||||
// [1] *((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 -- _deref_pbuc1=vbuc2
|
||||
lda #3
|
||||
sta CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR
|
||||
|
|
|
|||
|
|
@ -84,7 +84,7 @@ print_str: {
|
|||
// Print a newline
|
||||
print_ln: {
|
||||
__b1:
|
||||
// print_line_cursor + $28
|
||||
// print_line_cursor + 0x28
|
||||
lda #$28
|
||||
clc
|
||||
adc.z print_line_cursor
|
||||
|
|
|
|||
|
|
@ -1218,7 +1218,7 @@ print_ln: {
|
|||
// [22] phi print_line_cursor#10 = print_line_cursor#21 [phi:print_ln/print_ln::@1->print_ln::@1#0] -- register_copy
|
||||
// print_ln::@1
|
||||
__b1:
|
||||
// print_line_cursor + $28
|
||||
// print_line_cursor + 0x28
|
||||
// [23] print_line_cursor#0 = print_line_cursor#10 + $28 -- pbuz1=pbuz1_plus_vbuc1
|
||||
lda #$28
|
||||
clc
|
||||
|
|
|
|||
|
|
@ -14,7 +14,7 @@
|
|||
.segment Basic
|
||||
:BasicUpstart(main)
|
||||
/// Value that disables all CIA interrupts when stored to the CIA Interrupt registers
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
.const CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
/// VICII IRQ Status/Enable Raster
|
||||
// @see #IRQ_ENABLE #IRQ_STATUS
|
||||
/// 0 | RST| Reaching a certain raster line. The line is specified by writing
|
||||
|
|
@ -83,9 +83,9 @@ main: {
|
|||
// *PROCPORT = PROCPORT_RAM_IO
|
||||
lda #PROCPORT_RAM_IO
|
||||
sta.z PROCPORT
|
||||
// CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR
|
||||
// CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL
|
||||
// Disable CIA 1 Timer IRQ
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
lda #CIA_INTERRUPT_CLEAR_ALL
|
||||
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
// *VICII_CONTROL1 |=$80
|
||||
// Set raster line to $100
|
||||
|
|
|
|||
|
|
@ -13,7 +13,7 @@ main: scope:[main] from
|
|||
asm { sei }
|
||||
[4] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
|
||||
[5] *PROCPORT = PROCPORT_RAM_IO
|
||||
[6] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
|
||||
[6] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL
|
||||
[7] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
|
||||
[8] *RASTER = 0
|
||||
[9] *IRQ_ENABLE = IRQ_RASTER
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ main: scope:[main] from __start
|
|||
asm { sei }
|
||||
*PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
|
||||
*PROCPORT = PROCPORT_RAM_IO
|
||||
*((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
|
||||
*((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL
|
||||
*VICII_CONTROL1 = *VICII_CONTROL1 | $80
|
||||
*RASTER = 0
|
||||
*IRQ_ENABLE = IRQ_RASTER
|
||||
|
|
@ -60,7 +60,7 @@ __constant char * const BG_COLOR = (char *)$d021
|
|||
__constant const char BLACK = 0
|
||||
__constant char * const BORDER_COLOR = (char *)$d020
|
||||
__constant struct MOS6526_CIA * const CIA1 = (struct MOS6526_CIA *)$dc00
|
||||
__constant const char CIA_INTERRUPT_CLEAR = $7f
|
||||
__constant const char CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
__constant void (** const HARDWARE_IRQ)() = (void (**)())$fffe
|
||||
__constant char * const IRQ_ENABLE = (char *)$d01a
|
||||
__constant const char IRQ_RASTER = 1
|
||||
|
|
@ -137,7 +137,7 @@ main: scope:[main] from
|
|||
asm { sei }
|
||||
[4] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
|
||||
[5] *PROCPORT = PROCPORT_RAM_IO
|
||||
[6] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
|
||||
[6] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL
|
||||
[7] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
|
||||
[8] *RASTER = 0
|
||||
[9] *IRQ_ENABLE = IRQ_RASTER
|
||||
|
|
@ -170,7 +170,7 @@ REGISTER UPLIFT POTENTIAL REGISTERS
|
|||
Statement [2] return [ ] ( [ ] { } ) always clobbers reg byte a reg byte x reg byte y
|
||||
Statement [4] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [5] *PROCPORT = PROCPORT_RAM_IO [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [6] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [6] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [7] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [8] *RASTER = 0 [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [9] *IRQ_ENABLE = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
|
|
@ -217,7 +217,7 @@ ASSEMBLER BEFORE OPTIMIZATION
|
|||
:BasicUpstart(main)
|
||||
// Global Constants & labels
|
||||
/// Value that disables all CIA interrupts when stored to the CIA Interrupt registers
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
.const CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
/// VICII IRQ Status/Enable Raster
|
||||
// @see #IRQ_ENABLE #IRQ_STATUS
|
||||
/// 0 | RST| Reaching a certain raster line. The line is specified by writing
|
||||
|
|
@ -293,9 +293,9 @@ main: {
|
|||
// [5] *PROCPORT = PROCPORT_RAM_IO -- _deref_pbuc1=vbuc2
|
||||
lda #PROCPORT_RAM_IO
|
||||
sta.z PROCPORT
|
||||
// [6] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR -- _deref_pbuc1=vbuc2
|
||||
// [6] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL -- _deref_pbuc1=vbuc2
|
||||
// Disable CIA 1 Timer IRQ
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
lda #CIA_INTERRUPT_CLEAR_ALL
|
||||
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
// [7] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
|
||||
// Set raster line to $100
|
||||
|
|
@ -359,7 +359,7 @@ __constant char * const BG_COLOR = (char *) 53281
|
|||
__constant const char BLACK = 0
|
||||
__constant char * const BORDER_COLOR = (char *) 53280
|
||||
__constant struct MOS6526_CIA * const CIA1 = (struct MOS6526_CIA *) 56320
|
||||
__constant const char CIA_INTERRUPT_CLEAR = $7f
|
||||
__constant const char CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
__constant void (** const HARDWARE_IRQ)() = (void (**)()) 65534
|
||||
__constant char * const IRQ_ENABLE = (char *) 53274
|
||||
__constant const char IRQ_RASTER = 1
|
||||
|
|
@ -400,7 +400,7 @@ Score: 294
|
|||
:BasicUpstart(main)
|
||||
// Global Constants & labels
|
||||
/// Value that disables all CIA interrupts when stored to the CIA Interrupt registers
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
.const CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
/// VICII IRQ Status/Enable Raster
|
||||
// @see #IRQ_ENABLE #IRQ_STATUS
|
||||
/// 0 | RST| Reaching a certain raster line. The line is specified by writing
|
||||
|
|
@ -479,10 +479,10 @@ main: {
|
|||
// [5] *PROCPORT = PROCPORT_RAM_IO -- _deref_pbuc1=vbuc2
|
||||
lda #PROCPORT_RAM_IO
|
||||
sta.z PROCPORT
|
||||
// CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR
|
||||
// [6] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR -- _deref_pbuc1=vbuc2
|
||||
// CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR_ALL
|
||||
// [6] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR_ALL -- _deref_pbuc1=vbuc2
|
||||
// Disable CIA 1 Timer IRQ
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
lda #CIA_INTERRUPT_CLEAR_ALL
|
||||
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
// *VICII_CONTROL1 |=$80
|
||||
// [7] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@ __constant char * const BG_COLOR = (char *) 53281
|
|||
__constant const char BLACK = 0
|
||||
__constant char * const BORDER_COLOR = (char *) 53280
|
||||
__constant struct MOS6526_CIA * const CIA1 = (struct MOS6526_CIA *) 56320
|
||||
__constant const char CIA_INTERRUPT_CLEAR = $7f
|
||||
__constant const char CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
__constant void (** const HARDWARE_IRQ)() = (void (**)()) 65534
|
||||
__constant char * const IRQ_ENABLE = (char *) 53274
|
||||
__constant const char IRQ_RASTER = 1
|
||||
|
|
|
|||
|
|
@ -10,7 +10,7 @@
|
|||
.const IRQ_RASTER = 1
|
||||
.const WHITE = 1
|
||||
.const BLACK = 0
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
.const CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
// Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written
|
||||
.const PROCPORT_DDR_MEMORY_MASK = 7
|
||||
// RAM in $A000, $E000 I/O in $D000
|
||||
|
|
@ -57,9 +57,9 @@ main: {
|
|||
// *PROCPORT = PROCPORT_RAM_IO
|
||||
lda #PROCPORT_RAM_IO
|
||||
sta.z PROCPORT
|
||||
// *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR
|
||||
// *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR_ALL
|
||||
// Disable CIA 1 Timer IRQ
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
lda #CIA_INTERRUPT_CLEAR_ALL
|
||||
sta CIA1_INTERRUPT
|
||||
// *VICII_CONTROL1 |=$80
|
||||
// Set raster line to $100
|
||||
|
|
|
|||
|
|
@ -14,7 +14,7 @@ main: scope:[main] from
|
|||
asm { sei }
|
||||
[5] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
|
||||
[6] *PROCPORT = PROCPORT_RAM_IO
|
||||
[7] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR
|
||||
[7] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR_ALL
|
||||
[8] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
|
||||
[9] *RASTER = 0
|
||||
[10] *IRQ_ENABLE = IRQ_RASTER
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ main: scope:[main] from __start
|
|||
asm { sei }
|
||||
*PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
|
||||
*PROCPORT = PROCPORT_RAM_IO
|
||||
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR
|
||||
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR_ALL
|
||||
*VICII_CONTROL1 = *VICII_CONTROL1 | $80
|
||||
*RASTER = 0
|
||||
*IRQ_ENABLE = IRQ_RASTER
|
||||
|
|
@ -48,7 +48,7 @@ SYMBOL TABLE SSA
|
|||
__constant char * const BG_COLOR = (char *)$d020
|
||||
__constant const char BLACK = 0
|
||||
__constant char * const CIA1_INTERRUPT = (char *)$dc0d
|
||||
__constant const char CIA_INTERRUPT_CLEAR = $7f
|
||||
__constant const char CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
__constant char * const FGCOL = (char *)$d021
|
||||
__constant void (** const HARDWARE_IRQ)() = (void (**)())$fffe
|
||||
__constant char * const IRQ_ENABLE = (char *)$d01a
|
||||
|
|
@ -120,7 +120,7 @@ main: scope:[main] from
|
|||
asm { sei }
|
||||
[5] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
|
||||
[6] *PROCPORT = PROCPORT_RAM_IO
|
||||
[7] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR
|
||||
[7] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR_ALL
|
||||
[8] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
|
||||
[9] *RASTER = 0
|
||||
[10] *IRQ_ENABLE = IRQ_RASTER
|
||||
|
|
@ -145,7 +145,7 @@ Statement [2] *IRQ_STATUS = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byt
|
|||
Statement [3] return [ ] ( [ ] { } ) always clobbers reg byte a reg byte x reg byte y
|
||||
Statement [5] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [6] *PROCPORT = PROCPORT_RAM_IO [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [7] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [7] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR_ALL [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [8] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [9] *RASTER = 0 [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [10] *IRQ_ENABLE = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
|
|
@ -177,7 +177,7 @@ ASSEMBLER BEFORE OPTIMIZATION
|
|||
.const IRQ_RASTER = 1
|
||||
.const WHITE = 1
|
||||
.const BLACK = 0
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
.const CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
// Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written
|
||||
.const PROCPORT_DDR_MEMORY_MASK = 7
|
||||
// RAM in $A000, $E000 I/O in $D000
|
||||
|
|
@ -231,9 +231,9 @@ main: {
|
|||
// [6] *PROCPORT = PROCPORT_RAM_IO -- _deref_pbuc1=vbuc2
|
||||
lda #PROCPORT_RAM_IO
|
||||
sta.z PROCPORT
|
||||
// [7] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR -- _deref_pbuc1=vbuc2
|
||||
// [7] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR_ALL -- _deref_pbuc1=vbuc2
|
||||
// Disable CIA 1 Timer IRQ
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
lda #CIA_INTERRUPT_CLEAR_ALL
|
||||
sta CIA1_INTERRUPT
|
||||
// [8] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
|
||||
// Set raster line to $100
|
||||
|
|
@ -275,7 +275,7 @@ FINAL SYMBOL TABLE
|
|||
__constant char * const BG_COLOR = (char *) 53280
|
||||
__constant const char BLACK = 0
|
||||
__constant char * const CIA1_INTERRUPT = (char *) 56333
|
||||
__constant const char CIA_INTERRUPT_CLEAR = $7f
|
||||
__constant const char CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
__constant char * const FGCOL = (char *) 53281
|
||||
__constant void (** const HARDWARE_IRQ)() = (void (**)()) 65534
|
||||
__constant char * const IRQ_ENABLE = (char *) 53274
|
||||
|
|
@ -311,7 +311,7 @@ Score: 282
|
|||
.const IRQ_RASTER = 1
|
||||
.const WHITE = 1
|
||||
.const BLACK = 0
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
.const CIA_INTERRUPT_CLEAR_ALL = $7f
|
||||
// Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written
|
||||
.const PROCPORT_DDR_MEMORY_MASK = 7
|
||||
// RAM in $A000, $E000 I/O in $D000
|
||||
|
|
@ -370,10 +370,10 @@ main: {
|
|||
// [6] *PROCPORT = PROCPORT_RAM_IO -- _deref_pbuc1=vbuc2
|
||||
lda #PROCPORT_RAM_IO
|
||||
sta.z PROCPORT
|
||||
// *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR
|
||||
// [7] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR -- _deref_pbuc1=vbuc2
|
||||
// *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR_ALL
|
||||
// [7] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR_ALL -- _deref_pbuc1=vbuc2
|
||||
// Disable CIA 1 Timer IRQ
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
lda #CIA_INTERRUPT_CLEAR_ALL
|
||||
sta CIA1_INTERRUPT
|
||||
// *VICII_CONTROL1 |=$80
|
||||
// [8] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user