Added SKIT, SKNIT, RLL, RLR, SKC, SKZ, SKNC and SKNZ.

l7801.lua

@@ -45,15 +45,18 @@ local Keywords_7801 = {
     'inx','jb','jmp','jr','jre','ldaw','ldax','ldaxd',
     'ldaxi','lti','lxi','mov','mvi','mviw','mvix','nei',
     'nop','offi','oni','ori','pen','per','pex','pop','push','ret',
-    'reti','rets','rld','rrd','sio','softi','staw','stax',
+    'reti','rets','rld','rll','rlr','rrd','sbi','sio','skc',
-    'staxd','staxi','stc','stm','sbi','sui','suinb','table',
+    'skit','sknit','skz','sknc','sknz','sll','slr','softi',
-    'xri',
+    'staw','stax','staxd','staxi','stc','stm','sui','suinb',
+    'table','xri',
 }
-
 local Registers_7801 = {
     a=8,b=8,c=8,d=8,e=8,h=8,l=8,v=8,
     bc=16,de=16,hl=16,sp=16,va=16
 }
+local Interrupts_7801 = lookupify{
+    'f0','ft','f1','f2','fs'
+}
 
 local function syntax7801(on)
     syntax7801_on = on
@@ -73,9 +76,9 @@ local opcode_encapsulate = {} -- additionnal opcode, to have basic encapsulation
 local opcode_alias = {} -- alternate user names for opcodes
 local opcode_implied = lookupify{
     'block','calb','clc','ei','daa','dcr','di','ex','exx','halt','inr','jb','nop','pen',
-    'per','pex','ret','reti','rets','rld','rrd','sio','softi','stc','stm','table'
+    'per','pex','ret','reti','rets','rld','rrd','sio','skc','skz','sknc','sknz','softi',
+    'stc','stm','table'
 }
-
 local opcode_immediate = lookupify{
     'calf','calt','call','jmp',
 }
@@ -90,7 +93,7 @@ local opcode_relative = lookupify{
     'jr','jre'
 }
 local opcode_reg = lookupify{
-    'dcr','dcx','inr','inx','pop','push',
+    'dcr','dcx','inr','inx','pop','push','rll','rlr','sll','slr',
 }
 local opcode_reg_reg = lookupify{
     'mov'
@@ -108,10 +111,13 @@ local opcode_reg_ind_ex = lookupify{
 local opcode_regw = lookupify{
     'lxi'
 }
+local opcode_timer = lookupify{
+    'skit','sknit',
+}
 local opcode_reg_list = {
-    a = lookupify{'aci','adi','adinc','ani','dcr','inr','eqi','gti','lti','mvi','nei','offi','oni','ori','sbi','sui','suinb','xri'},
+    a = lookupify{'aci','adi','adinc','ani','dcr','inr','eqi','gti','lti','mvi','nei','offi','oni','ori','rll','rlr','sbi','sll','slr','sui','suinb','xri'},
     b = lookupify{'dcr','inr','mvi'},
-    c = lookupify{'dcr','inr','mvi'},
+    c = lookupify{'dcr','inr','mvi','rll','rlr','sll','slr'},
     d = lookupify{'mvi'},
     e = lookupify{'mvi'},
     h = lookupify{'mvi'},
@@ -167,6 +173,7 @@ local addressing_map = {
     regw = opcode_regw,
     reg_ind = opcode_reg_ind,
     reg_ind_ex = opcode_reg_ind_ex,
+    timer=opcode_timer,
 }
 
 local Scope = {
@@ -1483,7 +1490,6 @@ local function ParseLua(src, src_name)
                     end
                     stat = emit_call{name=op, args={expr, mod_expr}, inverse_encapsulate=inverse_encapsulate, paren_open_white=paren_open_whites} break
                 end
-               
                 if (opcode_wa[op] or opcode_wab[op] or opcode_reg_ind[op] or opcode_reg_ind_ex[op]) and tok:ConsumeSymbol('(', tokenList) then
                     local paren_open_whites,paren_close_whites = {},{}
                     for _,v in ipairs(tokenList[#tokenList].LeadingWhite) do table.insert(paren_open_whites, v) end
@@ -1557,7 +1563,8 @@ local function ParseLua(src, src_name)
                         return false, GenerateError("Opcode " .. op .. " doesn't support this addressing mode")
                     end
                     stat = emit_call{name=op .. r0_name .. r1_name} break
-                elseif opcode_reg[op] or opcode_regb[op] or opcode_regw[op] then
+                end
+                if opcode_reg[op] or opcode_regb[op] or opcode_regw[op] then
                     local register_name = tok:Get(tokenList).Data
                     local call_args = {name=op..register_name}
                     if not Registers_7801[register_name] then
@@ -1590,6 +1597,13 @@ local function ParseLua(src, src_name)
                     end
                     stat = emit_call(call_args) break
                 end
+                if opcode_timer[op] then
+                    local timer_name = tok:Get(tokenList).Data
+                    if not Interrupts_7801[timer_name] then
+                        return false, GenerateError(timer_name .. " is not a valid interrupt name")
+                    end
+                    stat = emit_call{name=op .. timer_name} break
+                end
                 if opcode_implied[op] then stat = emit_call{name=op .. 'imp'} break end
                 error("internal error: unable to find addressing of valid opcode " .. op) -- should not happen
             end

samples/scv_test.l65

@@ -140,4 +140,27 @@ section{"rom", org=0x8000}
     pop bc
     push va
     pop va
+    rll a
+    rlr a
+    rll c
+    rlr c
+    sll a
+    slr a
+    sll c
+    slr c
+    skc
+    skz
+    sknc
+    sknz
+    skit f0
+    skit ft
+    skit f1
+    skit f2
+    skit fs
+    sknit f0
+    sknit ft
+    sknit f1
+    sknit f2
+    sknit fs
+
 writebin(filename .. '.bin')

uPD7801.lua

@@ -317,6 +317,10 @@ local op48imp = {
     pex=M.op(0x2d,11),
     rld=M.op(0x38,17),
     rrd=M.op(0x39,17),
+    skc=M.op(0x0a,8),
+    skz=M.op(0x0c,8),
+    sknc=M.op(0x1a,8),
+    sknz=M.op(0x1c,8),    
     stc=M.op(0x2b,8),
 } M.op48imp = op48imp
 for k,v in pairs(op48imp) do
@@ -325,6 +329,22 @@ for k,v in pairs(op48imp) do
     end
 end
 
+local op48r8={    
+    rlla=M.op(0x30,8),
+    rlra=M.op(0x31,8),
+    rllc=M.op(0x32,8),
+    rlrc=M.op(0x33,8),
+    slla=M.op(0x34,8),
+    slra=M.op(0x35,8),
+    sllc=M.op(0x36,8),
+    slrc=M.op(0x37,8),
+} M.op48r8 = op48r8
+for k,v in pairs(op48r8) do
+    M[k] = function()
+        table.insert(M.section_current.instructions, { size=2, cycles=v.cycles, bin={ 0x48, v.opc } })
+    end
+end
+
 local op48r16={
     pushbc=M.op(0x1e,17),
     pushde=M.op(0x2e,17),
@@ -341,70 +361,29 @@ for k,v in pairs(op48r16) do
     end
 end
 
+local op48int={
+    skitf0=M.op(0x00,8),
+    skitft=M.op(0x01,8),
+    skitf1=M.op(0x02,8),
+    skitf2=M.op(0x03,8),
+    skitfs=M.op(0x04,8),
+    sknitf0=M.op(0x10,8),
+    sknitft=M.op(0x11,8),
+    sknitf1=M.op(0x12,8),
+    sknitf2=M.op(0x13,8),
+    sknitfs=M.op(0x14,8),
+} M.op48int = op48int
+for k,v in pairs(op48int) do
+    M[k] = function()
+        table.insert(M.section_current.instructions, { size=2, cycles=v.cycles, bin={ 0x48, v.opc } })
+    end
+end
+
 return M
 
 --[[ [todo]
     	
 16 bits instructions:
-    0x48xx 
-		case 0x00: my_stprintf_s(buffer, buffer_len, _T("skit intf0")); break;
-    	case 0x01: my_stprintf_s(buffer, buffer_len, _T("skit intft")); break;
-		case 0x02: my_stprintf_s(buffer, buffer_len, _T("skit intf1")); break;
-		case 0x03: my_stprintf_s(buffer, buffer_len, _T("skit intf2")); break;
-		case 0x04: my_stprintf_s(buffer, buffer_len, _T("skit intfs")); break;
-		case 0x0a: my_stprintf_s(buffer, buffer_len, _T("sk cy")); break;
-		case 0x0c: my_stprintf_s(buffer, buffer_len, _T("sk z")); break;
-		case 0x10: my_stprintf_s(buffer, buffer_len, _T("sknit f0")); break;
-		case 0x11: my_stprintf_s(buffer, buffer_len, _T("sknit ft")); break;
-		case 0x12: my_stprintf_s(buffer, buffer_len, _T("sknit f1")); break;
-		case 0x13: my_stprintf_s(buffer, buffer_len, _T("sknit f2")); break;
-		case 0x14: my_stprintf_s(buffer, buffer_len, _T("sknit fs")); break;
-		case 0x1a: my_stprintf_s(buffer, buffer_len, _T("skn cy")); break;
-		case 0x1c: my_stprintf_s(buffer, buffer_len, _T("skn z")); break;
-		case 0x30: my_stprintf_s(buffer, buffer_len, _T("rll a")); break;
-		case 0x31: my_stprintf_s(buffer, buffer_len, _T("rlr a")); break;
-		case 0x32: my_stprintf_s(buffer, buffer_len, _T("rll c")); break;
-		case 0x33: my_stprintf_s(buffer, buffer_len, _T("rlr c")); break;
-		case 0x34: my_stprintf_s(buffer, buffer_len, _T("sll a")); break;
-		case 0x35: my_stprintf_s(buffer, buffer_len, _T("slr a")); break;
-		case 0x36: my_stprintf_s(buffer, buffer_len, _T("sll c")); break;
-		case 0x37: my_stprintf_s(buffer, buffer_len, _T("sll c")); break;
-
-	{&upd7810_device::SKIT_F0,       2, 8, 8,L0|L1}, {&upd7810_device::SKIT_FT0,      2, 8, 8,L0|L1},
-	{&upd7810_device::SKIT_F1,       2, 8, 8,L0|L1}, {&upd7810_device::SKIT_F2,       2, 8, 8,L0|L1},
-	{&upd7810_device::SKIT_FST,      2, 8, 8,L0|L1}, {&upd7810_device::illegal2,      2, 8, 8,L0|L1},
-	{&upd7810_device::illegal2,      2, 8, 8,L0|L1}, {&upd7810_device::illegal2,      2, 8, 8,L0|L1},
-	{&upd7810_device::illegal2,      2, 8, 8,L0|L1}, {&upd7810_device::illegal2,      2, 8, 8,L0|L1},
-	{&upd7810_device::SK_CY,         2, 8, 8,L0|L1}, {&upd7810_device::illegal2,      2, 8, 8,L0|L1},
-	{&upd7810_device::SK_Z,          2, 8, 8,L0|L1}, {&upd7810_device::illegal2,      2, 8, 8,L0|L1},
-
-	{&upd7810_device::SKNIT_F0,      2, 8, 8,L0|L1}, {&upd7810_device::SKNIT_FT0,     2, 8, 8,L0|L1},
-	{&upd7810_device::SKNIT_F1,      2, 8, 8,L0|L1}, {&upd7810_device::SKNIT_F2,      2, 8, 8,L0|L1},
-	{&upd7810_device::SKNIT_FST,     2, 8, 8,L0|L1}, {&upd7810_device::illegal2,      2, 8, 8,L0|L1},
-	{&upd7810_device::illegal2,      2, 8, 8,L0|L1}, {&upd7810_device::illegal2,      2, 8, 8,L0|L1},
-	{&upd7810_device::illegal2,      2, 8, 8,L0|L1}, {&upd7810_device::illegal,       2, 8, 8,L0|L1},
-	{&upd7810_device::SKN_CY,        2, 8, 8,L0|L1}, {&upd7810_device::illegal2,      2, 8, 8,L0|L1},
-	{&upd7810_device::SKN_Z,         2, 8, 8,L0|L1}, {&upd7810_device::illegal2,      2, 8, 8,L0|L1},
-
-	/* 0x20 - 0x3F */
-	{&upd7810_device::EI,            2, 8, 8,L0|L1}, {&upd7810_device::illegal2,      2, 8, 8,L0|L1},
-	{&upd7810_device::illegal2,      2, 8, 8,L0|L1}, {&upd7810_device::illegal2,      2, 8, 8,L0|L1},
-	{&upd7810_device::DI,            2, 8, 8,L0|L1}, {&upd7810_device::illegal2,      2, 8, 8,L0|L1},
-	{&upd7810_device::illegal2,      2, 8, 8,L0|L1}, {&upd7810_device::illegal2,      2, 8, 8,L0|L1},
-	{&upd7810_device::illegal2,      2, 8, 8,L0|L1}, {&upd7810_device::illegal2,      2, 8, 8,L0|L1},
-	{&upd7810_device::CLC,           2, 8, 8,L0|L1}, {&upd7810_device::STC,           2, 8, 8,L0|L1},
-	{&upd7810_device::PEN,           2,11,11,L0|L1}, {&upd7810_device::PEX,           2,11,11,L0|L1},
-
-	{&upd7810_device::RLL_A,         2, 8, 8,L0|L1}, {&upd7810_device::RLR_A,         2, 8, 8,L0|L1},
-	{&upd7810_device::RLL_C,         2, 8, 8,L0|L1}, {&upd7810_device::RLR_C,         2, 8, 8,L0|L1},
-	{&upd7810_device::SLL_A,         2, 8, 8,L0|L1}, {&upd7810_device::SLR_A,         2, 8, 8,L0|L1},
-	{&upd7810_device::SLL_C,         2, 8, 8,L0|L1}, {&upd7810_device::SLR_C,         2, 8, 8,L0|L1},
-	{&upd7810_device::RLD,           2,17,17,L0|L1}, {&upd7810_device::RRD,           2,17,17,L0|L1},
-	{&upd7810_device::illegal2,      2, 8, 8,L0|L1}, {&upd7810_device::illegal2,      2, 8, 8,L0|L1},
-	{&upd7810_device::PER,           2,11,11,L0|L1}, {&upd7810_device::illegal2,      2, 8, 8,L0|L1},
-	
-    
-    
     0x4cxx
     0x4dxx
     0x60xx