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l65
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Added 16 bits implied instructions (ei, di, etc...).

This commit is contained in:
mooz 2018-11-09 19:04:44 +01:00
parent 564746133a
commit 6efbd07034
3 changed files with 87 additions and 44 deletions
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26
l7801.lua
View File

@ -38,9 +38,9 @@ local Keywords_data = {
'dc',
}
local Keywords_7801 = {
'block', 'calb', 'calf', 'calt', 'daa', 'dcr', 'exa', 'exx',
'halt', 'jb', 'jr', 'lxi', 'mvi', 'nop', 'ret', 'reti',
'rets', 'sio', 'softi', 'stm', 'table',
'block', 'calb', 'calf', 'calt', 'ei', 'daa', 'di', 'dcr',
'exa', 'exx', 'halt', 'jb', 'jr', 'lxi', 'mvi', 'nop',
'ret', 'reti', 'rets', 'sio', 'softi', 'stm', 'table',
}
local Registers_7801 = {
a=8,b=8,c=8,d=8,e=8,h=8,l=8,v=8,
@ -64,7 +64,7 @@ opcode_arg_encapsulate(true)
local opcode_encapsulate = {} -- additionnal opcode, to have basic encapsulation (function(a) return a end)
local opcode_alias = {} -- alternate user names for opcodes
local opcode_implied = lookupify{
'block', 'calb', 'daa', 'exa', 'exx', 'halt', 'jb', 'nop', 'ret', 'reti', 'rets', 'sio', 'softi', 'stm', 'table'
'block', 'calb', 'ei', 'daa', 'di', 'exa', 'exx', 'halt', 'jb', 'nop', 'ret', 'reti', 'rets', 'sio', 'softi', 'stm', 'table'
}
local opcode_immediate = lookupify{
'calf', 'calt'
@ -75,13 +75,20 @@ local opcode_relative = lookupify{
local opcode_reg = lookupify{
'dcr', 'inr'
}
local opcode_regb = lookupify{
'mvi'
}
local opcode_regw = lookupify{
'lxi'
}
local opcode_reg_list = {
a = lookupify{'dcr','inr'},
b = lookupify{'dcr','inr'},
c = lookupify{'dcr','inr'},
a = lookupify{'dcr','inr', 'mvi'},
b = lookupify{'dcr','inr', 'mvi'},
c = lookupify{'dcr','inr', 'mvi'},
d = lookupify{'mvi'},
e = lookupify{'mvi'},
h = lookupify{'mvi'},
l = lookupify{'mvi'},
bc = lookupify{'lxi'},
de = lookupify{'lxi'},
hl = lookupify{'lxi'},
@ -93,6 +100,7 @@ local addressing_map = {
imm = opcode_immediate,
rel = opcode_relative,
reg = opcode_reg,
regb = opcode_regb,
regw = opcode_regw,
}
@ -1401,7 +1409,7 @@ local function ParseLua(src, src_name)
end
stat = emit_call{name=op, args={expr, mod_expr}, inverse_encapsulate=inverse_encapsulate, paren_open_white=paren_open_whites} break
end
if opcode_reg[op] or opcode_regw[op] then
if opcode_reg[op] or opcode_regb[op] or opcode_regw[op] then
tok:Save()
local register_name = tok:Get(tokenList).Data
local call_args = {name=op..register_name}
@ -1411,7 +1419,7 @@ local function ParseLua(src, src_name)
if not opcode_reg_list[register_name] and opcode_reg_list[register_name][op] then tok:Restore()
return false, GenerateError("Opcode " .. op .. " doesn't support this addressing mode")
end
if opcode_regw[op] then
if opcode_regw[op] or opcode_regb[op] then
if not tok:ConsumeSymbol(',', tokenList) then tok:Restore()
return false, GenerateError("Opcode " .. op .. " doesn't support this addressing mode")
end

40
samples/scv_hello.l65 Normal file
View File

@ -0,0 +1,40 @@
require 'scv'
location(0x8000, 0x8FFF)
section{"rom", org=0x8000}
dc.b 'H'
@main
di
lxi sp,0xFFD2
ei
calt 0x8C
lxi hl,vdc_data
lxi de,0x3400
mvi c,0x03
block
lxi hl,message
lxi de,0x3043
lxi bc,0x01ff
@loop_0
block
dcr b
jr loop_0
-- beep
lxi hl,0x3600
calf 0xfb0
@loop_1
nop
jr loop_1
section{"vdc_data", org=0x8030}
dc.b 0xC0,0x00,0x00,0xF2
section{"message", org=0x8040}
dc.b "hello world"
dc.b 0x00
writebin(filename .. '.bin')

65
uPD7801.lua
View File

@ -141,7 +141,7 @@ for k,v in pairs(oprr) do
end
end
local oprxx ={
local opregb ={
mvib=M.op(0x6a,7),
mvic=M.op(0x6b,7),
mvid=M.op(0x6c,7),
@ -149,9 +149,9 @@ local oprxx ={
mvih=M.op(0x6e,7),
mvil=M.op(0x6f,7),
mviv=M.op(0x68,7)
} M.oprxx = oprxx
for k,v in pairs(oprxx) do
M[k .. 'xx'] = function(late, early)
} M.opregb = opregb
for k,v in pairs(opregb) do
M[k] = function(late, early)
local l65dbg = { info=debug.getinfo(2, 'Sl'), trace=debug.traceback(nil, 1) }
local size = function() late,early = M.size_op(late,early) return 2 end
local bin = function() local l65dbg=l65dbg return { v.opc, M.op_eval_byte(late,early) } end
@ -209,37 +209,6 @@ for k,v in pairs(opvind) do
end
end
--[[
local opviwaxx ={
aniw=M.op(0x05,16),
oriw=M.op(0x15,16),
gtiw=M.op(0x25,13),
ltiw=M.op(0x35,13),
oniw=M.op(0x45,13),
offiw=M.op(0x55,13),
neiw=M.op(0x65,13),
mviw=M.op(0x71,13),
eqiw=M.op(0x75,13)
} M.opvwaxx = opvwaxx
for k,v in pairs(opvwaxx) do
M[k .. 'vindxx'] = function(late0, early0, late1, early1)
local l65dbg = { info=debug.getinfo(2, 'Sl'), trace=debug.traceback(nil, 1) }
local size = function()
late0,early0 = M.size_op(late,early)
late1,early1 = M.size_op(late,early)
return 3
end
local bin = function()
local l65dbg=l65dbg
local offset = M.op_eval_byte(late0,early0)
local x = M.op_eval_byte(late1,early1)
return { v.opc, offset, x }
end
table.insert(M.section_current.instructions, { size=size, cycles=v.cycles, bin=bin })
end
end
]]--
local opw = {
call=M.op(0x44,16),
jmp=M.op(0x54,10),
@ -319,12 +288,38 @@ M.jr = function(label)
table.insert(M.section_current.instructions, op)
end
local op48imm = {
ei=M.op(0x20,8),
di=M.op(0x24,8),
clc=M.op(0x2a,8),
stc=M.op(0x2b,8),
pen=M.op(0x2c,11),
per=M.op(0x3c,11),
pex=M.op(0x2d,11),
rld=M.op(0x38,17),
rrd=M.op(0x39,17),
} M.op48imm = op48imm
for k,v in pairs(op48imm) do
M[k] = function()
table.insert(M.section_current.instructions, { size=2, cycles=v.cycles, bin={ 0x48, v.opc } })
end
end
return M
--[[ [todo]
8 bits instructions:
JRE+ 0x4e xx 17
JRE- 0x4f xx 17
ani
ori
gti
lti
oni
offi
nei
mvi
eqi
16 bits instructions:
0x48xx