mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-24 06:30:19 +00:00
275 lines
6.3 KiB
LLVM
275 lines
6.3 KiB
LLVM
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; RUN: llc -mtriple=arm64-linux-gnu -verify-machineinstrs < %s | FileCheck %s
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@lhs = global fp128 zeroinitializer, align 16
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@rhs = global fp128 zeroinitializer, align 16
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define fp128 @test_add() {
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; CHECK-LABEL: test_add:
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%lhs = load fp128* @lhs, align 16
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%rhs = load fp128* @rhs, align 16
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; CHECK: ldr q0, [{{x[0-9]+}}, :lo12:lhs]
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; CHECK: ldr q1, [{{x[0-9]+}}, :lo12:rhs]
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%val = fadd fp128 %lhs, %rhs
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; CHECK: bl __addtf3
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ret fp128 %val
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}
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define fp128 @test_sub() {
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; CHECK-LABEL: test_sub:
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%lhs = load fp128* @lhs, align 16
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%rhs = load fp128* @rhs, align 16
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; CHECK: ldr q0, [{{x[0-9]+}}, :lo12:lhs]
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; CHECK: ldr q1, [{{x[0-9]+}}, :lo12:rhs]
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%val = fsub fp128 %lhs, %rhs
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; CHECK: bl __subtf3
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ret fp128 %val
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}
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define fp128 @test_mul() {
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; CHECK-LABEL: test_mul:
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%lhs = load fp128* @lhs, align 16
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%rhs = load fp128* @rhs, align 16
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; CHECK: ldr q0, [{{x[0-9]+}}, :lo12:lhs]
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; CHECK: ldr q1, [{{x[0-9]+}}, :lo12:rhs]
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%val = fmul fp128 %lhs, %rhs
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; CHECK: bl __multf3
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ret fp128 %val
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}
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define fp128 @test_div() {
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; CHECK-LABEL: test_div:
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%lhs = load fp128* @lhs, align 16
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%rhs = load fp128* @rhs, align 16
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; CHECK: ldr q0, [{{x[0-9]+}}, :lo12:lhs]
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; CHECK: ldr q1, [{{x[0-9]+}}, :lo12:rhs]
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%val = fdiv fp128 %lhs, %rhs
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; CHECK: bl __divtf3
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ret fp128 %val
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}
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@var32 = global i32 0
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@var64 = global i64 0
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define void @test_fptosi() {
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; CHECK-LABEL: test_fptosi:
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%val = load fp128* @lhs, align 16
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%val32 = fptosi fp128 %val to i32
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store i32 %val32, i32* @var32
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; CHECK: bl __fixtfsi
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%val64 = fptosi fp128 %val to i64
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store i64 %val64, i64* @var64
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; CHECK: bl __fixtfdi
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ret void
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}
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define void @test_fptoui() {
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; CHECK-LABEL: test_fptoui:
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%val = load fp128* @lhs, align 16
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%val32 = fptoui fp128 %val to i32
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store i32 %val32, i32* @var32
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; CHECK: bl __fixunstfsi
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%val64 = fptoui fp128 %val to i64
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store i64 %val64, i64* @var64
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; CHECK: bl __fixunstfdi
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ret void
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}
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define void @test_sitofp() {
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; CHECK-LABEL: test_sitofp:
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%src32 = load i32* @var32
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%val32 = sitofp i32 %src32 to fp128
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store volatile fp128 %val32, fp128* @lhs
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; CHECK: bl __floatsitf
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%src64 = load i64* @var64
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%val64 = sitofp i64 %src64 to fp128
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store volatile fp128 %val64, fp128* @lhs
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; CHECK: bl __floatditf
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ret void
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}
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define void @test_uitofp() {
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; CHECK-LABEL: test_uitofp:
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%src32 = load i32* @var32
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%val32 = uitofp i32 %src32 to fp128
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store volatile fp128 %val32, fp128* @lhs
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; CHECK: bl __floatunsitf
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%src64 = load i64* @var64
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%val64 = uitofp i64 %src64 to fp128
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store volatile fp128 %val64, fp128* @lhs
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; CHECK: bl __floatunditf
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ret void
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}
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define i1 @test_setcc1() {
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; CHECK-LABEL: test_setcc1:
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%lhs = load fp128* @lhs, align 16
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%rhs = load fp128* @rhs, align 16
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; CHECK: ldr q0, [{{x[0-9]+}}, :lo12:lhs]
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; CHECK: ldr q1, [{{x[0-9]+}}, :lo12:rhs]
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; Technically, everything after the call to __letf2 is redundant, but we'll let
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; LLVM have its fun for now.
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%val = fcmp ole fp128 %lhs, %rhs
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; CHECK: bl __letf2
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; CHECK: cmp w0, #0
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; CHECK: csinc w0, wzr, wzr, gt
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ret i1 %val
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; CHECK: ret
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}
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define i1 @test_setcc2() {
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; CHECK-LABEL: test_setcc2:
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%lhs = load fp128* @lhs, align 16
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%rhs = load fp128* @rhs, align 16
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; CHECK: ldr q0, [{{x[0-9]+}}, :lo12:lhs]
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; CHECK: ldr q1, [{{x[0-9]+}}, :lo12:rhs]
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%val = fcmp ugt fp128 %lhs, %rhs
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; CHECK: bl __gttf2
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; CHECK: cmp w0, #0
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; CHECK: csinc [[GT:w[0-9]+]], wzr, wzr, le
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; CHECK: bl __unordtf2
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; CHECK: cmp w0, #0
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; CHECK: csinc [[UNORDERED:w[0-9]+]], wzr, wzr, eq
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; CHECK: orr w0, [[UNORDERED]], [[GT]]
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ret i1 %val
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; CHECK: ret
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}
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define i32 @test_br_cc() {
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; CHECK-LABEL: test_br_cc:
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%lhs = load fp128* @lhs, align 16
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%rhs = load fp128* @rhs, align 16
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; CHECK: ldr q0, [{{x[0-9]+}}, :lo12:lhs]
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; CHECK: ldr q1, [{{x[0-9]+}}, :lo12:rhs]
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; olt == !uge, which LLVM unfortunately "optimizes" this to.
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%cond = fcmp olt fp128 %lhs, %rhs
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; CHECK: bl __getf2
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; CHECK: cmp w0, #0
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; CHECK: csinc [[OGE:w[0-9]+]], wzr, wzr, lt
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; CHECK: bl __unordtf2
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; CHECK: cmp w0, #0
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; CHECK: csinc [[UNORDERED:w[0-9]+]], wzr, wzr, eq
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; CHECK: orr [[UGE:w[0-9]+]], [[UNORDERED]], [[OGE]]
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; CHECK: cbnz [[UGE]], [[RET29:.LBB[0-9]+_[0-9]+]]
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br i1 %cond, label %iftrue, label %iffalse
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iftrue:
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ret i32 42
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; CHECK-NEXT: BB#
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; CHECK-NEXT: movz w0, #42
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; CHECK-NEXT: b [[REALRET:.LBB[0-9]+_[0-9]+]]
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iffalse:
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ret i32 29
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; CHECK: [[RET29]]:
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; CHECK-NEXT: movz w0, #29
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; CHECK-NEXT: [[REALRET]]:
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; CHECK: ret
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}
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define void @test_select(i1 %cond, fp128 %lhs, fp128 %rhs) {
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; CHECK-LABEL: test_select:
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%val = select i1 %cond, fp128 %lhs, fp128 %rhs
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store fp128 %val, fp128* @lhs, align 16
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; CHECK: and [[BIT:w[0-9]+]], w0, #0x1
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; CHECK: cmp [[BIT]], #0
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; CHECK-NEXT: b.eq [[IFFALSE:.LBB[0-9]+_[0-9]+]]
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; CHECK-NEXT: BB#
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; CHECK-NEXT: orr v[[VAL:[0-9]+]].16b, v0.16b, v0.16b
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; CHECK-NEXT: [[IFFALSE]]:
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; CHECK: str q[[VAL]], [{{x[0-9]+}}, :lo12:lhs]
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ret void
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; CHECK: ret
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}
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@varfloat = global float 0.0, align 4
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@vardouble = global double 0.0, align 8
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define void @test_round() {
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; CHECK-LABEL: test_round:
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%val = load fp128* @lhs, align 16
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%float = fptrunc fp128 %val to float
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store float %float, float* @varfloat, align 4
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; CHECK: bl __trunctfsf2
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; CHECK: str s0, [{{x[0-9]+}}, :lo12:varfloat]
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%double = fptrunc fp128 %val to double
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store double %double, double* @vardouble, align 8
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; CHECK: bl __trunctfdf2
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; CHECK: str d0, [{{x[0-9]+}}, :lo12:vardouble]
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ret void
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}
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define void @test_extend() {
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; CHECK-LABEL: test_extend:
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%val = load fp128* @lhs, align 16
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%float = load float* @varfloat
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%fromfloat = fpext float %float to fp128
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store volatile fp128 %fromfloat, fp128* @lhs, align 16
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; CHECK: bl __extendsftf2
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; CHECK: str q0, [{{x[0-9]+}}, :lo12:lhs]
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%double = load double* @vardouble
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%fromdouble = fpext double %double to fp128
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store volatile fp128 %fromdouble, fp128* @lhs, align 16
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; CHECK: bl __extenddftf2
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; CHECK: str q0, [{{x[0-9]+}}, :lo12:lhs]
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ret void
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; CHECK: ret
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}
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define fp128 @test_neg(fp128 %in) {
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; CHECK: [[MINUS0:.LCPI[0-9]+_0]]:
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; Make sure the weird hex constant below *is* -0.0
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; CHECK-NEXT: fp128 -0
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; CHECK-LABEL: test_neg:
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; Could in principle be optimized to fneg which we can't select, this makes
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; sure that doesn't happen.
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%ret = fsub fp128 0xL00000000000000008000000000000000, %in
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; CHECK: orr v1.16b, v0.16b, v0.16b
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; CHECK: ldr q0, [{{x[0-9]+}}, :lo12:[[MINUS0]]]
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; CHECK: bl __subtf3
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ret fp128 %ret
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; CHECK: ret
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}
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