2006-09-04 04:14:57 +00:00
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//===-- PPC.h - Top-level interface for PowerPC Target ----------*- C++ -*-===//
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2005-04-21 23:30:14 +00:00
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//
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2004-06-21 16:55:25 +00:00
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// The LLVM Compiler Infrastructure
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//
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2007-12-29 20:36:04 +00:00
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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2005-04-21 23:30:14 +00:00
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//
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2004-06-21 16:55:25 +00:00
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//===----------------------------------------------------------------------===//
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//
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// This file contains the entry points for global functions defined in the LLVM
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// PowerPC back-end.
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//
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//===----------------------------------------------------------------------===//
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2006-09-04 04:14:57 +00:00
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#ifndef LLVM_TARGET_POWERPC_H
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#define LLVM_TARGET_POWERPC_H
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2004-06-21 16:55:25 +00:00
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2011-07-14 20:59:42 +00:00
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#include "MCTargetDesc/PPCMCTargetDesc.h"
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2010-11-15 08:49:58 +00:00
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#include <string>
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2006-11-04 05:27:39 +00:00
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// GCC #defines PPC on Linux but we use it as our namespace name
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#undef PPC
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2006-08-23 21:08:52 +00:00
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2006-11-04 05:27:39 +00:00
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namespace llvm {
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class PPCTargetMachine;
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class FunctionPass;
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2013-01-25 23:05:59 +00:00
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class ImmutablePass;
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2010-11-14 21:09:28 +00:00
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class JITCodeEmitter;
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2010-11-14 21:12:33 +00:00
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class MachineInstr;
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class AsmPrinter;
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Implement a basic MCCodeEmitter for PPC. This doesn't handle
fixups yet, and doesn't handle actually encoding operand values,
but this is enough for llc -show-mc-encoding to show the base
instruction encoding information, e.g.:
mflr r0 ; encoding: [0x7c,0x08,0x02,0xa6]
stw r0, 8(r1) ; encoding: [0x90,0x00,0x00,0x00]
stwu r1, -64(r1) ; encoding: [0x94,0x00,0x00,0x00]
Ltmp0:
lhz r4, 4(r3) ; encoding: [0xa0,0x00,0x00,0x00]
cmplwi cr0, r4, 8 ; encoding: [0x28,0x00,0x00,0x00]
beq cr0, LBB0_2 ; encoding: [0x40,0x00,0x00,0x00]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119116 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 04:16:32 +00:00
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class MCInst;
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2012-03-17 18:46:09 +00:00
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Implement PPC counter loops as a late IR-level pass
The old PPCCTRLoops pass, like the Hexagon pass version from which it was
derived, could only handle some simple loops in canonical form. We cannot
directly adapt the new Hexagon hardware loops pass, however, because the
Hexagon pass contains a fundamental assumption that non-constant-trip-count
loops will contain a guard, and this is not always true (the result being that
incorrect negative counts can be generated). With this commit, we replace the
pass with a late IR-level pass which makes use of SE to calculate the
backedge-taken counts and safely generate the loop-count expressions (including
any necessary max() parts). This IR level pass inserts custom intrinsics that
are lowered into the desired decrement-and-branch instructions.
The most fragile part of this new implementation is that interfering uses of
the counter register must be detected on the IR level (and, on PPC, this also
includes any indirect branches in addition to function calls). Also, to make
all of this work, we need a variant of the mtctr instruction that is marked
as having side effects. Without this, machine-code level CSE, DCE, etc.
illegally transform the resulting code. Hopefully, this can be improved
in the future.
This new pass is smaller than the original (and much smaller than the new
Hexagon hardware loops pass), and can handle many additional cases correctly.
In addition, the preheader-creation code has been copied from LoopSimplify, and
after we decide on where it belongs, this code will be refactored so that it
can be explicitly shared (making this implementation even smaller).
The new test-case files ctrloop-{le,lt,ne}.ll have been adapted from tests for
the new Hexagon pass. There are a few classes of loops that this pass does not
transform (noted by FIXMEs in the files), but these deficiencies can be
addressed within the SE infrastructure (thus helping many other passes as well).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181927 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-15 21:37:41 +00:00
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FunctionPass *createPPCCTRLoops(PPCTargetMachine &TM);
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Add a PPCCTRLoops verification pass
When asserts are enabled, this adds a verification pass for PPC counter-loop
formation. Unfortunately, without sacrificing code quality, there is no better
way of forming counter-based loops except at the (late) IR level. This means
that we need to recognize, at the IR level, anything which might turn into a
function call (or indirect branch). Because this is currently a finite set of
things, and because SelectionDAG lowering is basic-block local, this can be
done. Nevertheless, it is fragile, and failure results in a miscompile. This
verification pass checks that all (reachable) counter-based branches are
dominated by a loop mtctr instruction, and that no instructions in between
clobber the counter register. If these conditions are not satisfied, then an
ICE will be triggered.
In short, this is to help us sleep better at night.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182295 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-20 16:08:17 +00:00
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#ifndef NDEBUG
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FunctionPass *createPPCCTRLoopsVerify();
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#endif
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2013-04-08 16:24:03 +00:00
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FunctionPass *createPPCEarlyReturnPass();
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2010-11-15 03:13:19 +00:00
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FunctionPass *createPPCBranchSelectionPass();
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FunctionPass *createPPCISelDag(PPCTargetMachine &TM);
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FunctionPass *createPPCJITCodeEmitterPass(PPCTargetMachine &TM,
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JITCodeEmitter &MCE);
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void LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
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[PowerPC] Always use "assembler dialect" 1
A setting in MCAsmInfo defines the "assembler dialect" to use. This is used
by common code to choose between alternatives in a multi-alternative GNU
inline asm statement like the following:
__asm__ ("{sfe|subfe} %0,%1,%2" : "=r" (out) : "r" (in1), "r" (in2));
The meaning of these dialects is platform specific, and GCC defines those
for PowerPC to use dialect 0 for old-style (POWER) mnemonics and 1 for
new-style (PowerPC) mnemonics, like in the example above.
To be compatible with inline asm used with GCC, LLVM ought to do the same.
Specifically, this means we should always use assembler dialect 1 since
old-style mnemonics really aren't supported on any current platform.
However, the current LLVM back-end uses:
AssemblerDialect = 1; // New-Style mnemonics.
in PPCMCAsmInfoDarwin, and
AssemblerDialect = 0; // Old-Style mnemonics.
in PPCLinuxMCAsmInfo.
The Linux setting really isn't correct, we should be using new-style
mnemonics everywhere. This is changed by this commit.
Unfortunately, the setting of this variable is overloaded in the back-end
to decide whether or not we are on a Darwin target. This is done in
PPCInstPrinter (the "SyntaxVariant" is initialized from the MCAsmInfo
AssemblerDialect setting), and also in PPCMCExpr. Setting AssemblerDialect
to 1 for both Darwin and Linux no longer allows us to make this distinction.
Instead, this patch uses the MCSubtargetInfo passed to createPPCMCInstPrinter
to distinguish Darwin targets, and ignores the SyntaxVariant parameter.
As to PPCMCExpr, this patch adds an explicit isDarwin argument that needs
to be passed in by the caller when creating a target MCExpr. (To do so
this patch implicitly also reverts commit 184441.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185858 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 20:20:51 +00:00
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AsmPrinter &AP, bool isDarwin);
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2013-01-25 23:05:59 +00:00
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/// \brief Creates an PPC-specific Target Transformation Info pass.
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ImmutablePass *createPPCTargetTransformInfoPass(const PPCTargetMachine *TM);
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2013-04-08 16:24:03 +00:00
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2010-11-14 23:42:06 +00:00
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namespace PPCII {
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/// Target Operand Flag enum.
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enum TOF {
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//===------------------------------------------------------------------===//
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// PPC Specific MachineOperand flags.
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MO_NO_FLAG,
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/// MO_DARWIN_STUB - On a symbol operand "FOO", this indicates that the
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/// reference is actually to the "FOO$stub" symbol. This is used for calls
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/// and jumps to external functions on Tiger and earlier.
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2010-11-15 03:13:19 +00:00
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MO_DARWIN_STUB = 1,
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2010-11-14 23:42:06 +00:00
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2010-11-15 03:13:19 +00:00
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/// MO_PIC_FLAG - If this bit is set, the symbol reference is relative to
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/// the function's picbase, e.g. lo16(symbol-picbase).
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2013-02-21 00:05:29 +00:00
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MO_PIC_FLAG = 2,
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2010-11-15 02:46:57 +00:00
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2010-11-15 03:13:19 +00:00
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/// MO_NLP_FLAG - If this bit is set, the symbol reference is actually to
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/// the non_lazy_ptr for the global, e.g. lo16(symbol$non_lazy_ptr-picbase).
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2013-02-21 00:05:29 +00:00
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MO_NLP_FLAG = 4,
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2010-11-15 02:46:57 +00:00
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2010-11-15 03:13:19 +00:00
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/// MO_NLP_HIDDEN_FLAG - If this bit is set, the symbol reference is to a
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/// symbol with hidden visibility. This causes a different kind of
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/// non-lazy-pointer to be generated.
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2013-02-21 00:05:29 +00:00
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MO_NLP_HIDDEN_FLAG = 8,
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2012-06-04 17:36:38 +00:00
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/// The next are not flags but distinct values.
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2013-02-21 00:05:29 +00:00
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MO_ACCESS_MASK = 0xf0,
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2012-06-04 17:36:38 +00:00
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2013-06-21 14:42:20 +00:00
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/// MO_LO, MO_HA - lo16(symbol) and ha16(symbol)
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MO_LO = 1 << 4,
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MO_HA = 2 << 4,
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2012-06-04 17:36:38 +00:00
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2013-06-21 14:42:20 +00:00
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MO_TPREL_LO = 4 << 4,
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MO_TPREL_HA = 3 << 4,
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2013-02-21 00:05:29 +00:00
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/// These values identify relocations on immediates folded
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/// into memory operations.
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2013-06-21 14:42:20 +00:00
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MO_DTPREL_LO = 5 << 4,
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MO_TLSLD_LO = 6 << 4,
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2013-07-05 12:22:36 +00:00
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MO_TOC_LO = 7 << 4,
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// Symbol for VK_PPC_TLS fixup attached to an ADD instruction
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MO_TLS = 8 << 4
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2010-11-14 23:42:06 +00:00
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};
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} // end namespace PPCII
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2004-06-21 16:55:25 +00:00
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} // end namespace llvm;
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#endif
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