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[PowerPC] Support @tls in the asm parser
This adds support for the last missing construct to parse TLS-related assembler code: add 3, 4, symbol@tls The ADD8TLS currently hard-codes the @tls into the assembler string. This cannot be handled by the asm parser, since @tls is parsed as a symbol variant. This patch changes ADD8TLS to have the @tls suffix printed as symbol variant on output too, which allows us to remove the isCodeGenOnly marker from ADD8TLS. This in turn means that we can add a AsmOperand to accept @tls marked symbols on input. As a side effect, this means that the fixup_ppc_tlsreg fixup type is no longer necessary and can be merged into fixup_ppc_nofixup. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185692 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -237,7 +237,8 @@ struct PPCOperand : public MCParsedAsmOperand {
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enum KindTy {
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Token,
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Immediate,
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Expression
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Expression,
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TLSRegister
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} Kind;
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SMLoc StartLoc, EndLoc;
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@ -257,10 +258,15 @@ struct PPCOperand : public MCParsedAsmOperand {
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int64_t CRVal; // Cached result of EvaluateCRExpr(Val)
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};
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struct TLSRegOp {
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const MCSymbolRefExpr *Sym;
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};
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union {
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struct TokOp Tok;
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struct ImmOp Imm;
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struct ExprOp Expr;
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struct TLSRegOp TLSReg;
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};
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PPCOperand(KindTy K) : MCParsedAsmOperand(), Kind(K) {}
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@ -280,6 +286,9 @@ public:
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case Expression:
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Expr = o.Expr;
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break;
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case TLSRegister:
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TLSReg = o.TLSReg;
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break;
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}
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}
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@ -307,6 +316,11 @@ public:
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return Expr.CRVal;
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}
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const MCExpr *getTLSReg() const {
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assert(Kind == TLSRegister && "Invalid access!");
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return TLSReg.Sym;
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}
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unsigned getReg() const {
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assert(isRegNumber() && "Invalid access!");
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return (unsigned) Imm.Val;
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@ -341,6 +355,7 @@ public:
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(getImm() & 3) == 0); }
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bool isS17Imm() const { return Kind == Expression ||
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(Kind == Immediate && isInt<17>(getImm())); }
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bool isTLSReg() const { return Kind == TLSRegister; }
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bool isDirectBr() const { return Kind == Expression ||
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(Kind == Immediate && isInt<26>(getImm()) &&
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(getImm() & 3) == 0); }
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@ -445,6 +460,11 @@ public:
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Inst.addOperand(MCOperand::CreateExpr(getExpr()));
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}
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void addTLSRegOperands(MCInst &Inst, unsigned N) const {
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assert(N == 1 && "Invalid number of operands!");
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Inst.addOperand(MCOperand::CreateExpr(getTLSReg()));
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}
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StringRef getToken() const {
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assert(Kind == Token && "Invalid access!");
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return StringRef(Tok.Data, Tok.Length);
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@ -481,6 +501,28 @@ public:
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Op->IsPPC64 = IsPPC64;
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return Op;
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}
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static PPCOperand *CreateTLSReg(const MCSymbolRefExpr *Sym,
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SMLoc S, SMLoc E, bool IsPPC64) {
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PPCOperand *Op = new PPCOperand(TLSRegister);
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Op->TLSReg.Sym = Sym;
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Op->StartLoc = S;
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Op->EndLoc = E;
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Op->IsPPC64 = IsPPC64;
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return Op;
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}
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static PPCOperand *CreateFromMCExpr(const MCExpr *Val,
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SMLoc S, SMLoc E, bool IsPPC64) {
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if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(Val))
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return CreateImm(CE->getValue(), S, E, IsPPC64);
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if (const MCSymbolRefExpr *SRE = dyn_cast<MCSymbolRefExpr>(Val))
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if (SRE->getKind() == MCSymbolRefExpr::VK_PPC_TLS)
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return CreateTLSReg(SRE, S, E, IsPPC64);
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return CreateExpr(Val, S, E, IsPPC64);
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}
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};
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} // end anonymous namespace.
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@ -496,6 +538,9 @@ void PPCOperand::print(raw_ostream &OS) const {
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case Expression:
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getExpr()->print(OS);
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break;
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case TLSRegister:
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getTLSReg()->print(OS);
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break;
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}
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}
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@ -1011,12 +1056,8 @@ ParseOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
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return Error(S, "unknown operand");
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}
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if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(EVal))
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Op = PPCOperand::CreateImm(CE->getValue(), S, E, isPPC64());
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else
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Op = PPCOperand::CreateExpr(EVal, S, E, isPPC64());
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// Push the parsed operand into the list of operands
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Op = PPCOperand::CreateFromMCExpr(EVal, S, E, isPPC64());
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Operands.push_back(Op);
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// Check whether this is a TLS call expression
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@ -1036,7 +1077,7 @@ ParseOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
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E = Parser.getTok().getLoc();
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Parser.Lex(); // Eat the ')'.
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Op = PPCOperand::CreateExpr(TLSSym, S, E, isPPC64());
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Op = PPCOperand::CreateFromMCExpr(TLSSym, S, E, isPPC64());
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Operands.push_back(Op);
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}
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@ -30,7 +30,6 @@ static uint64_t adjustFixupValue(unsigned Kind, uint64_t Value) {
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case FK_Data_2:
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case FK_Data_4:
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case FK_Data_8:
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case PPC::fixup_ppc_tlsreg:
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case PPC::fixup_ppc_nofixup:
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return Value;
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case PPC::fixup_ppc_brcond14:
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@ -64,7 +63,6 @@ static unsigned getFixupKindNumBytes(unsigned Kind) {
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return 4;
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case FK_Data_8:
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return 8;
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case PPC::fixup_ppc_tlsreg:
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case PPC::fixup_ppc_nofixup:
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return 0;
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}
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@ -101,7 +99,6 @@ public:
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{ "fixup_ppc_brcond14abs", 16, 14, 0 },
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{ "fixup_ppc_half16", 0, 16, 0 },
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{ "fixup_ppc_half16ds", 0, 14, 0 },
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{ "fixup_ppc_tlsreg", 0, 0, 0 },
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{ "fixup_ppc_nofixup", 0, 0, 0 }
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};
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@ -289,9 +289,6 @@ unsigned PPCELFObjectWriter::getRelocTypeInner(const MCValue &Target,
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break;
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}
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break;
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case PPC::fixup_ppc_tlsreg:
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Type = ELF::R_PPC64_TLS;
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break;
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case PPC::fixup_ppc_nofixup:
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switch (Modifier) {
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default: llvm_unreachable("Unsupported Modifier");
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@ -301,6 +298,9 @@ unsigned PPCELFObjectWriter::getRelocTypeInner(const MCValue &Target,
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case MCSymbolRefExpr::VK_TLSLD:
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Type = ELF::R_PPC64_TLSLD;
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break;
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case MCSymbolRefExpr::VK_PPC_TLS:
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Type = ELF::R_PPC64_TLS;
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break;
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}
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break;
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case FK_Data_8:
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@ -41,11 +41,9 @@ enum Fixups {
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/// implied 2 zero bits for instrs like 'std'.
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fixup_ppc_half16ds,
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/// fixup_ppc_tlsreg - Insert thread-pointer register number.
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fixup_ppc_tlsreg,
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/// fixup_ppc_nofixup - Not a true fixup, but ties a symbol to a call
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/// to __tls_get_addr for the TLS general and local dynamic models.
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/// to __tls_get_addr for the TLS general and local dynamic models,
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/// or inserts the thread-pointer register number.
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fixup_ppc_nofixup,
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// Marker
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@ -209,7 +209,7 @@ unsigned PPCMCCodeEmitter::getTLSRegEncoding(const MCInst &MI, unsigned OpNo,
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// hint to the linker that this statement is part of a relocation sequence.
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// Return the thread-pointer register's encoding.
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Fixups.push_back(MCFixup::Create(0, MO.getExpr(),
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(MCFixupKind)PPC::fixup_ppc_tlsreg));
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(MCFixupKind)PPC::fixup_ppc_nofixup));
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return CTX.getRegisterInfo()->getEncodingValue(PPC::X13);
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}
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@ -85,7 +85,10 @@ namespace llvm {
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/// into memory operations.
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MO_DTPREL_LO = 5 << 4,
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MO_TLSLD_LO = 6 << 4,
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MO_TOC_LO = 7 << 4
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MO_TOC_LO = 7 << 4,
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// Symbol for VK_PPC_TLS fixup attached to an ADD instruction
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MO_TLS = 8 << 4
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};
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} // end namespace PPCII
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@ -1359,12 +1359,14 @@ SDValue PPCTargetLowering::LowerGlobalTLSAddress(SDValue Op,
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if (Model == TLSModel::InitialExec) {
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SDValue TGA = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, 0);
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SDValue TGATLS = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0,
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PPCII::MO_TLS);
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SDValue GOTReg = DAG.getRegister(PPC::X2, MVT::i64);
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SDValue TPOffsetHi = DAG.getNode(PPCISD::ADDIS_GOT_TPREL_HA, dl,
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PtrVT, GOTReg, TGA);
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SDValue TPOffset = DAG.getNode(PPCISD::LD_GOT_TPREL_L, dl,
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PtrVT, TGA, TPOffsetHi);
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return DAG.getNode(PPCISD::ADD_TLS, dl, PtrVT, TPOffset, TGA);
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return DAG.getNode(PPCISD::ADD_TLS, dl, PtrVT, TPOffset, TGATLS);
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}
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if (Model == TLSModel::GeneralDynamic) {
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@ -36,8 +36,13 @@ def s17imm64 : Operand<i64> {
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def tocentry : Operand<iPTR> {
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let MIOperandInfo = (ops i64imm:$imm);
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}
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def PPCTLSRegOperand : AsmOperandClass {
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let Name = "TLSReg"; let PredicateMethod = "isTLSReg";
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let RenderMethod = "addTLSRegOperands";
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}
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def tlsreg : Operand<i64> {
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let EncoderMethod = "getTLSRegEncoding";
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let ParserMatchClass = PPCTLSRegOperand;
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}
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def tlsgd : Operand<i64> {}
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def tlscall : Operand<i64> {
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@ -404,9 +409,8 @@ defm ADD8 : XOForm_1r<31, 266, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
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[(set i64:$rT, (add i64:$rA, i64:$rB))]>;
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// ADD8 has a special form: reg = ADD8(reg, sym@tls) for use by the
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// initial-exec thread-local storage model.
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let isCodeGenOnly = 1 in
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def ADD8TLS : XOForm_1<31, 266, 0, (outs g8rc:$rT), (ins g8rc:$rA, tlsreg:$rB),
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"add $rT, $rA, $rB@tls", IntSimple,
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"add $rT, $rA, $rB", IntSimple,
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[(set i64:$rT, (add i64:$rA, tglobaltlsaddr:$rB))]>;
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defm ADDC8 : XOForm_1rc<31, 10, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
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@ -127,6 +127,9 @@ static MCOperand GetSymbolRef(const MachineOperand &MO, const MCSymbol *Symbol,
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case PPCII::MO_TOC_LO:
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RefKind = MCSymbolRefExpr::VK_PPC_TOC_LO;
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break;
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case PPCII::MO_TLS:
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RefKind = MCSymbolRefExpr::VK_PPC_TLS;
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break;
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}
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const MCExpr *Expr = MCSymbolRefExpr::Create(Symbol, RefKind, Ctx);
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@ -12,6 +12,16 @@
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# CHECK-NEXT: add %r32, %r32, %r32
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add %r32, %r32, %r32
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# TLS register operands
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# CHECK: error: invalid operand for instruction
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# CHECK-NEXT: add 3, symbol@tls, 4
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add 3, symbol@tls, 4
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# CHECK: error: invalid operand for instruction
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# CHECK-NEXT: subf 3, 4, symbol@tls
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subf 3, 4, symbol@tls
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# Signed 16-bit immediate operands
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# CHECK: error: invalid operand for instruction
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@ -206,8 +206,6 @@ base:
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_LO_DS target 0x0
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ld 1, target@got@l(3)
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# FIXME: @tls
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# CHECK: addis 3, 2, target@tprel@ha # encoding: [0x3c,0x62,A,A]
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# CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@ha, kind: fixup_ppc_half16
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@ -405,6 +403,11 @@ base:
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# CHECK-REL-NEXT: 0x{{[0-9A-F]*[048C]}} R_PPC64_REL24 __tls_get_addr 0x0
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bl __tls_get_addr(target@tlsld)
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# CHECK: add 3, 4, target@tls # encoding: [0x7c,0x64,0x6a,0x14]
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# CHECK-NEXT: # fixup A - offset: 0, value: target@tls, kind: fixup_ppc_nofixup
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# CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_TLS target 0x0
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add 3, 4, target@tls
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# Data relocs
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# llvm-mc does not show any "encoding" string for data, so we just check the relocs
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