llvm-6502/test/CodeGen/Thumb2/mul_const.ll

; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
; rdar://7069502

define i32 @t1(i32 %v) nounwind readnone {
entry:
; CHECK: t1:
; CHECK: add.w r0, r0, r0, lsl #3
	%0 = mul i32 %v, 9
	ret i32 %0
}

define i32 @t2(i32 %v) nounwind readnone {
entry:
; CHECK: t2:
; CHECK: rsb r0, r0, r0, lsl #3
	%0 = mul i32 %v, 7
	ret i32 %0
}
Eliminate more uses of llvm-as and llvm-dis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81293 91177308-0d34-0410-b5e6-96231b3b80d8 2009-09-09 00:09:15 +00:00			`; RUN: llc < %s -march=thumb -mattr=+thumb2 \| FileCheck %s`
Fix ARM isle code that optimize multiply by constants which are power-of-2 +/- 1. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76520 91177308-0d34-0410-b5e6-96231b3b80d8 2009-07-21 00:31:12 +00:00			`; rdar://7069502`

			`define i32 @t1(i32 %v) nounwind readnone {`
			`entry:`
			`; CHECK: t1:`
Add ".w" suffix for wide thumb-2 instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77199 91177308-0d34-0410-b5e6-96231b3b80d8 2009-07-27 16:31:55 +00:00			`; CHECK: add.w r0, r0, r0, lsl #3`
Fix ARM isle code that optimize multiply by constants which are power-of-2 +/- 1. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76520 91177308-0d34-0410-b5e6-96231b3b80d8 2009-07-21 00:31:12 +00:00			`%0 = mul i32 %v, 9`
			`ret i32 %0`
			`}`

			`define i32 @t2(i32 %v) nounwind readnone {`
			`entry:`
			`; CHECK: t2:`
			`; CHECK: rsb r0, r0, r0, lsl #3`
			`%0 = mul i32 %v, 7`
			`ret i32 %0`
			`}`