llvm-6502/test/CodeGen
James Molloy cdd8e46bec Use literal pool loads instead of MOVW/MOVT for materializing global addresses when optimizing for size.
On spec/gcc, this caused a codesize improvement of ~1.9% for ARM mode and ~4.9% for Thumb(2) mode. This is
codesize including literal pools.

The pools themselves doubled in size for ARM mode and quintupled for Thumb mode, leaving suggestion that there
is still perhaps redundancy in LLVM's use of constant pools that could be decreased by sharing entries.

Fixes PR11087.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142530 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-19 14:11:07 +00:00
..
Alpha Convert more tests over to the new atomic instructions. 2011-09-26 21:30:17 +00:00
ARM Use literal pool loads instead of MOVW/MOVT for materializing global addresses when optimizing for size. 2011-10-19 14:11:07 +00:00
Blackfin more tests not making the jump into the brave new world. 2011-07-09 16:57:10 +00:00
CBackend Only run tests in test/CodeGen/CBackend/X86 when both X86 and CBackend are supported 2011-09-26 06:44:27 +00:00
CellSPU Enable element promotion type legalization by deafault. 2011-10-16 20:31:33 +00:00
CPP manually upgrade a bunch of tests to modern syntax, and remove some that 2011-06-17 03:14:27 +00:00
Generic Remove the the test which checks the saving of a vector of booleans into memory. 2011-10-16 19:06:06 +00:00
MBlaze
Mips Test cases for 64-bit load and store instructions. 2011-10-11 01:52:31 +00:00
MSP430 Fix register-dependent test in MSP430. 2011-05-04 01:01:39 +00:00
PowerPC use FileCheck and not grep in new tests 2011-10-17 16:01:41 +00:00
PTX PTX: Fix disabling of MAD instruction selection 2011-10-18 13:39:20 +00:00
SPARC make the asmparser reject function and type redefinitions. 'Merging' hasn't been 2011-06-17 07:06:44 +00:00
SystemZ manually upgrade a bunch of tests to modern syntax, and remove some that 2011-06-17 03:14:27 +00:00
Thumb Revert r141529. This is causing failures in the test-suite, like bigstack and ReedSolomon. Boo... 2011-10-11 21:40:47 +00:00
Thumb2 ARM Darwin default relocation model is PIC. 2011-09-30 17:41:35 +00:00
X86 Add support for the vector-widening of vselect and vector-setcc 2011-10-19 09:45:11 +00:00
XCore Associate a MemOperand with LDWCP nodes introduced during ISel. 2011-09-12 14:43:23 +00:00