2011-07-02 20:42:20 +00:00
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; RUN: llc < %s -relocation-model=pic -mtriple=i386-linux-gnu -asm-verbose=false \
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; RUN: | FileCheck %s --check-prefix=CHECK-LINUX
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; RUN: llc < %s -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false \
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; RUN: | FileCheck %s
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2009-09-08 23:54:48 +00:00
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; RUN: llc < %s -mtriple=x86_64-apple-darwin | not grep 'lJTI'
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2009-06-18 20:37:15 +00:00
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; rdar://6971437
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2010-04-12 23:07:17 +00:00
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; rdar://7738756
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2006-10-05 03:12:36 +00:00
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Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode.
Before:
_main:
subq $8, %rsp
leaq _X(%rip), %rax
movsd 8(%rax), %xmm1
movss _X(%rip), %xmm0
call _t
xorl %ecx, %ecx
movl %ecx, %eax
addq $8, %rsp
ret
Now:
_main:
subq $8, %rsp
movsd _X+8(%rip), %xmm1
movss _X(%rip), %xmm0
call _t
xorl %ecx, %ecx
movl %ecx, %eax
addq $8, %rsp
ret
Notice there is another idiotic codegen issue that needs to be fixed asap:
xorl %ecx, %ecx
movl %ecx, %eax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46850 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-07 08:53:49 +00:00
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declare void @_Z3bari(i32)
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2006-10-05 03:12:36 +00:00
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2011-07-02 20:42:20 +00:00
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; CHECK-LINUX: .text._Z3fooILi1EEvi,"axG",@progbits,_Z3fooILi1EEvi,comdat
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2009-06-25 21:48:17 +00:00
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define linkonce void @_Z3fooILi1EEvi(i32 %Y) nounwind {
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2006-10-05 03:12:36 +00:00
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entry:
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2010-04-17 16:29:15 +00:00
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; CHECK: L0$pb
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2010-04-12 23:07:17 +00:00
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; CHECK-NOT: leal
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2010-04-17 16:29:15 +00:00
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; CHECK: Ltmp0 = LJTI0_0-L0$pb
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2010-04-12 23:07:17 +00:00
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; CHECK-NEXT: addl Ltmp0(%eax,%ecx,4)
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; CHECK-NEXT: jmpl *%eax
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Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode.
Before:
_main:
subq $8, %rsp
leaq _X(%rip), %rax
movsd 8(%rax), %xmm1
movss _X(%rip), %xmm0
call _t
xorl %ecx, %ecx
movl %ecx, %eax
addq $8, %rsp
ret
Now:
_main:
subq $8, %rsp
movsd _X+8(%rip), %xmm1
movss _X(%rip), %xmm0
call _t
xorl %ecx, %ecx
movl %ecx, %eax
addq $8, %rsp
ret
Notice there is another idiotic codegen issue that needs to be fixed asap:
xorl %ecx, %ecx
movl %ecx, %eax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46850 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-07 08:53:49 +00:00
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%Y_addr = alloca i32 ; <i32*> [#uses=2]
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%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
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store i32 %Y, i32* %Y_addr
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%tmp = load i32* %Y_addr ; <i32> [#uses=1]
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switch i32 %tmp, label %bb10 [
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i32 0, label %bb3
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i32 1, label %bb
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i32 2, label %bb
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i32 3, label %bb
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i32 4, label %bb
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i32 5, label %bb
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i32 6, label %bb
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i32 7, label %bb
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i32 8, label %bb
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i32 9, label %bb
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i32 10, label %bb
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i32 12, label %bb1
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i32 13, label %bb5
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i32 14, label %bb6
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i32 16, label %bb2
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i32 17, label %bb4
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i32 23, label %bb8
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i32 27, label %bb7
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i32 34, label %bb9
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2006-10-05 03:12:36 +00:00
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]
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bb: ; preds = %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry
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br label %bb1
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bb1: ; preds = %bb, %entry
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br label %bb2
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bb2: ; preds = %bb1, %entry
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Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode.
Before:
_main:
subq $8, %rsp
leaq _X(%rip), %rax
movsd 8(%rax), %xmm1
movss _X(%rip), %xmm0
call _t
xorl %ecx, %ecx
movl %ecx, %eax
addq $8, %rsp
ret
Now:
_main:
subq $8, %rsp
movsd _X+8(%rip), %xmm1
movss _X(%rip), %xmm0
call _t
xorl %ecx, %ecx
movl %ecx, %eax
addq $8, %rsp
ret
Notice there is another idiotic codegen issue that needs to be fixed asap:
xorl %ecx, %ecx
movl %ecx, %eax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46850 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-07 08:53:49 +00:00
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call void @_Z3bari( i32 1 )
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2006-10-05 03:12:36 +00:00
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br label %bb11
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bb3: ; preds = %entry
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br label %bb4
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bb4: ; preds = %bb3, %entry
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br label %bb5
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bb5: ; preds = %bb4, %entry
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br label %bb6
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bb6: ; preds = %bb5, %entry
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Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode.
Before:
_main:
subq $8, %rsp
leaq _X(%rip), %rax
movsd 8(%rax), %xmm1
movss _X(%rip), %xmm0
call _t
xorl %ecx, %ecx
movl %ecx, %eax
addq $8, %rsp
ret
Now:
_main:
subq $8, %rsp
movsd _X+8(%rip), %xmm1
movss _X(%rip), %xmm0
call _t
xorl %ecx, %ecx
movl %ecx, %eax
addq $8, %rsp
ret
Notice there is another idiotic codegen issue that needs to be fixed asap:
xorl %ecx, %ecx
movl %ecx, %eax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46850 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-07 08:53:49 +00:00
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call void @_Z3bari( i32 2 )
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2006-10-05 03:12:36 +00:00
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br label %bb11
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bb7: ; preds = %entry
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br label %bb8
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bb8: ; preds = %bb7, %entry
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br label %bb9
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bb9: ; preds = %bb8, %entry
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Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode.
Before:
_main:
subq $8, %rsp
leaq _X(%rip), %rax
movsd 8(%rax), %xmm1
movss _X(%rip), %xmm0
call _t
xorl %ecx, %ecx
movl %ecx, %eax
addq $8, %rsp
ret
Now:
_main:
subq $8, %rsp
movsd _X+8(%rip), %xmm1
movss _X(%rip), %xmm0
call _t
xorl %ecx, %ecx
movl %ecx, %eax
addq $8, %rsp
ret
Notice there is another idiotic codegen issue that needs to be fixed asap:
xorl %ecx, %ecx
movl %ecx, %eax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46850 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-07 08:53:49 +00:00
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call void @_Z3bari( i32 3 )
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2006-10-05 03:12:36 +00:00
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br label %bb11
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bb10: ; preds = %entry
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br label %bb11
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bb11: ; preds = %bb10, %bb9, %bb6, %bb2
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br label %return
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return: ; preds = %bb11
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ret void
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}
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