llvm-6502/test/CodeGen/X86/vec_insert-6.ll

; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=penryn | grep pslldq
; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=penryn -mtriple=i686-apple-darwin9 -o /dev/null -stats -info-output-file - | grep asm-printer | grep 6

define <4 x float> @t3(<4 x float>* %P) nounwind  {
	%tmp1 = load <4 x float>* %P
	%tmp2 = shufflevector <4 x float> zeroinitializer, <4 x float> %tmp1, <4 x i32> < i32 4, i32 4, i32 4, i32 0 >
	ret <4 x float> %tmp2
}
Add mcpu to tests to prevent them from using AVX instructions on Sandy Bridge after r155618. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155696 91177308-0d34-0410-b5e6-96231b3b80d8 2012-04-27 07:11:58 +00:00			`; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=penryn \| grep pslldq`
			`; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=penryn -mtriple=i686-apple-darwin9 -o /dev/null -stats -info-output-file - \| grep asm-printer \| grep 6`
Implement vector shift up / down and insert zero with ps{rl}lq / ps{rl}ldq. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51667 91177308-0d34-0410-b5e6-96231b3b80d8 2008-05-29 08:22:04 +00:00
			`define <4 x float> @t3(<4 x float>* %P) nounwind {`
			`%tmp1 = load <4 x float>* %P`
			`%tmp2 = shufflevector <4 x float> zeroinitializer, <4 x float> %tmp1, <4 x i32> < i32 4, i32 4, i32 4, i32 0 >`
			`ret <4 x float> %tmp2`
			`}`