2003-11-20 03:32:25 +00:00
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//===-- RegAllocLinearScan.cpp - Linear Scan register allocator -----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements a linear scan register allocator.
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//
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//===----------------------------------------------------------------------===//
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2004-02-24 08:58:30 +00:00
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2003-11-20 03:32:25 +00:00
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#define DEBUG_TYPE "regalloc"
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#include "llvm/Function.h"
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#include "llvm/CodeGen/LiveVariables.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/SSARegMap.h"
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#include "llvm/Target/MRegisterInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "Support/Debug.h"
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2004-02-23 00:50:15 +00:00
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#include "LiveIntervals.h"
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2004-02-23 00:53:31 +00:00
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#include "PhysRegTracker.h"
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2004-02-23 23:08:11 +00:00
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#include "VirtRegMap.h"
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2004-02-15 10:24:21 +00:00
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#include <algorithm>
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2004-02-24 08:58:30 +00:00
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#include <iostream>
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2003-11-20 03:32:25 +00:00
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using namespace llvm;
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namespace {
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class RA : public MachineFunctionPass {
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private:
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MachineFunction* mf_;
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const TargetMachine* tm_;
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const MRegisterInfo* mri_;
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2004-01-22 23:08:45 +00:00
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LiveIntervals* li_;
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2004-02-15 10:24:21 +00:00
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typedef std::list<LiveIntervals::Interval*> IntervalPtrs;
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IntervalPtrs unhandled_, fixed_, active_, inactive_, handled_;
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2003-11-20 03:32:25 +00:00
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2004-02-23 06:10:13 +00:00
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std::auto_ptr<PhysRegTracker> prt_;
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2004-02-23 23:08:11 +00:00
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std::auto_ptr<VirtRegMap> vrm_;
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2004-03-01 23:18:15 +00:00
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std::auto_ptr<Spiller> spiller_;
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2003-11-20 03:32:25 +00:00
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2004-02-06 18:08:18 +00:00
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typedef std::vector<float> SpillWeights;
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SpillWeights spillWeights_;
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2003-11-20 03:32:25 +00:00
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public:
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virtual const char* getPassName() const {
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return "Linear Scan Register Allocator";
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}
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addRequired<LiveVariables>();
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AU.addRequired<LiveIntervals>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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/// runOnMachineFunction - register allocate the whole function
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bool runOnMachineFunction(MachineFunction&);
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2004-02-01 20:13:26 +00:00
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void releaseMemory();
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private:
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2004-02-24 08:58:30 +00:00
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/// linearScan - the linear scan algorithm
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void linearScan();
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2004-01-07 09:20:58 +00:00
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/// initIntervalSets - initializa the four interval sets:
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/// unhandled, fixed, active and inactive
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2004-02-15 10:24:21 +00:00
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void initIntervalSets(LiveIntervals::Intervals& li);
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2004-01-07 09:20:58 +00:00
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2003-11-20 03:32:25 +00:00
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/// processActiveIntervals - expire old intervals and move
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/// non-overlapping ones to the incative list
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2004-01-07 09:20:58 +00:00
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void processActiveIntervals(IntervalPtrs::value_type cur);
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2003-11-20 03:32:25 +00:00
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/// processInactiveIntervals - expire old intervals and move
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/// overlapping ones to the active list
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2004-01-07 09:20:58 +00:00
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void processInactiveIntervals(IntervalPtrs::value_type cur);
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2003-11-20 03:32:25 +00:00
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2004-02-06 18:08:18 +00:00
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/// updateSpillWeights - updates the spill weights of the
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/// specifed physical register and its weight
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void updateSpillWeights(unsigned reg, SpillWeights::value_type weight);
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/// assignRegOrStackSlotAtInterval - assign a register if one
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/// is available, or spill.
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void assignRegOrStackSlotAtInterval(IntervalPtrs::value_type cur);
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2003-11-20 03:32:25 +00:00
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///
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/// register handling helpers
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///
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2003-12-21 05:43:40 +00:00
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/// getFreePhysReg - return a free physical register for this
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/// virtual register interval if we have one, otherwise return
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/// 0
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2004-01-07 09:20:58 +00:00
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unsigned getFreePhysReg(IntervalPtrs::value_type cur);
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2003-12-21 05:43:40 +00:00
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2003-11-20 03:32:25 +00:00
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/// assignVirt2StackSlot - assigns this virtual register to a
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2004-02-15 10:24:21 +00:00
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/// stack slot. returns the stack slot
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int assignVirt2StackSlot(unsigned virtReg);
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2003-11-20 03:32:25 +00:00
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void printIntervals(const char* const str,
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RA::IntervalPtrs::const_iterator i,
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RA::IntervalPtrs::const_iterator e) const {
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if (str) std::cerr << str << " intervals:\n";
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for (; i != e; ++i) {
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2004-02-20 06:15:40 +00:00
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std::cerr << "\t" << **i << " -> ";
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2004-01-16 20:29:42 +00:00
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unsigned reg = (*i)->reg;
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2004-02-01 01:27:01 +00:00
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if (MRegisterInfo::isVirtualRegister(reg)) {
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2004-02-23 23:47:10 +00:00
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reg = vrm_->getPhys(reg);
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2003-11-20 03:32:25 +00:00
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}
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2004-01-16 20:33:13 +00:00
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std::cerr << mri_->getName(reg) << '\n';
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2003-11-20 03:32:25 +00:00
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}
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}
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2004-02-18 23:15:23 +00:00
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2004-02-23 23:08:11 +00:00
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// void verifyAssignment() const {
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// for (Virt2PhysMap::const_iterator i = v2pMap_.begin(),
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// e = v2pMap_.end(); i != e; ++i)
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// for (Virt2PhysMap::const_iterator i2 = next(i); i2 != e; ++i2)
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// if (MRegisterInfo::isVirtualRegister(i->second) &&
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// (i->second == i2->second ||
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// mri_->areAliases(i->second, i2->second))) {
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// const LiveIntervals::Interval
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// &in = li_->getInterval(i->second),
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// &in2 = li_->getInterval(i2->second);
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// if (in.overlaps(in2)) {
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// std::cerr << in << " overlaps " << in2 << '\n';
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// assert(0);
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// }
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// }
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// }
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2003-11-20 03:32:25 +00:00
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};
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}
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2004-02-01 20:13:26 +00:00
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void RA::releaseMemory()
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{
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unhandled_.clear();
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active_.clear();
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inactive_.clear();
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fixed_.clear();
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2004-02-15 10:24:21 +00:00
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handled_.clear();
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2004-02-01 20:13:26 +00:00
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}
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2003-11-20 03:32:25 +00:00
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bool RA::runOnMachineFunction(MachineFunction &fn) {
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mf_ = &fn;
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tm_ = &fn.getTarget();
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mri_ = tm_->getRegisterInfo();
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2004-01-22 23:08:45 +00:00
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li_ = &getAnalysis<LiveIntervals>();
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2004-02-23 06:10:13 +00:00
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if (!prt_.get()) prt_.reset(new PhysRegTracker(*mri_));
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2004-02-23 23:08:11 +00:00
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vrm_.reset(new VirtRegMap(*mf_));
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2004-03-01 23:18:15 +00:00
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if (!spiller_.get()) spiller_.reset(createSpiller());
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2003-12-21 05:43:40 +00:00
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2004-02-02 07:30:36 +00:00
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initIntervalSets(li_->getIntervals());
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2003-11-20 03:32:25 +00:00
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2004-02-24 08:58:30 +00:00
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linearScan();
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2004-03-01 23:18:15 +00:00
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spiller_->runOnMachineFunction(*mf_, *vrm_);
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2004-02-24 08:58:30 +00:00
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return true;
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}
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void RA::linearScan()
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{
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2004-01-07 09:20:58 +00:00
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// linear scan algorithm
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2004-02-20 06:15:40 +00:00
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DEBUG(std::cerr << "********** LINEAR SCAN **********\n");
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DEBUG(std::cerr << "********** Function: "
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<< mf_->getFunction()->getName() << '\n');
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2003-11-20 03:32:25 +00:00
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2004-02-20 06:15:40 +00:00
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DEBUG(printIntervals("unhandled", unhandled_.begin(), unhandled_.end()));
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DEBUG(printIntervals("fixed", fixed_.begin(), fixed_.end()));
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DEBUG(printIntervals("active", active_.begin(), active_.end()));
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DEBUG(printIntervals("inactive", inactive_.begin(), inactive_.end()));
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2003-12-23 18:00:33 +00:00
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2004-01-07 09:20:58 +00:00
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while (!unhandled_.empty() || !fixed_.empty()) {
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// pick the interval with the earliest start point
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IntervalPtrs::value_type cur;
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if (fixed_.empty()) {
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cur = unhandled_.front();
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2004-02-15 10:24:21 +00:00
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unhandled_.pop_front();
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2003-12-23 18:00:33 +00:00
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}
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2004-01-07 09:20:58 +00:00
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else if (unhandled_.empty()) {
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cur = fixed_.front();
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2004-02-15 10:24:21 +00:00
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fixed_.pop_front();
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2003-12-23 18:00:33 +00:00
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}
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2004-01-07 09:20:58 +00:00
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else if (unhandled_.front()->start() < fixed_.front()->start()) {
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cur = unhandled_.front();
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2004-02-15 10:24:21 +00:00
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unhandled_.pop_front();
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2004-01-07 09:20:58 +00:00
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}
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else {
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cur = fixed_.front();
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2004-02-15 10:24:21 +00:00
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fixed_.pop_front();
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2004-01-07 09:20:58 +00:00
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}
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2004-02-20 06:15:40 +00:00
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DEBUG(std::cerr << "\n*** CURRENT ***: " << *cur << '\n');
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2003-12-23 18:00:33 +00:00
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2004-01-07 09:20:58 +00:00
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processActiveIntervals(cur);
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processInactiveIntervals(cur);
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2004-01-13 20:42:08 +00:00
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2004-01-07 09:20:58 +00:00
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// if this register is fixed we are done
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2004-02-01 01:27:01 +00:00
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if (MRegisterInfo::isPhysicalRegister(cur->reg)) {
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2004-02-23 06:10:13 +00:00
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prt_->addRegUse(cur->reg);
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2004-01-07 09:20:58 +00:00
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active_.push_back(cur);
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2004-02-15 10:24:21 +00:00
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handled_.push_back(cur);
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2003-11-20 03:32:25 +00:00
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}
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// otherwise we are allocating a virtual register. try to find
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// a free physical register or spill an interval in order to
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// assign it one (we could spill the current though).
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else {
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2004-02-06 18:08:18 +00:00
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assignRegOrStackSlotAtInterval(cur);
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2003-11-20 03:32:25 +00:00
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}
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2004-01-07 09:20:58 +00:00
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2004-02-20 06:15:40 +00:00
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DEBUG(printIntervals("active", active_.begin(), active_.end()));
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DEBUG(printIntervals("inactive", inactive_.begin(), inactive_.end()));
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// DEBUG(verifyAssignment());
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}
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2004-01-07 09:20:58 +00:00
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2003-12-13 05:50:19 +00:00
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// expire any remaining active intervals
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for (IntervalPtrs::iterator i = active_.begin(); i != active_.end(); ++i) {
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unsigned reg = (*i)->reg;
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2004-02-20 06:15:40 +00:00
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DEBUG(std::cerr << "\tinterval " << **i << " expired\n");
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2004-02-23 23:08:11 +00:00
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if (MRegisterInfo::isVirtualRegister(reg))
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2004-02-23 23:47:10 +00:00
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reg = vrm_->getPhys(reg);
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2004-02-23 06:10:13 +00:00
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prt_->delRegUse(reg);
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2003-12-13 05:50:19 +00:00
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}
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2003-12-14 13:24:17 +00:00
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2004-02-23 23:08:11 +00:00
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DEBUG(std::cerr << *vrm_);
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2003-11-20 03:32:25 +00:00
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}
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2004-02-15 10:24:21 +00:00
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void RA::initIntervalSets(LiveIntervals::Intervals& li)
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2004-01-07 09:20:58 +00:00
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{
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assert(unhandled_.empty() && fixed_.empty() &&
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active_.empty() && inactive_.empty() &&
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"interval sets should be empty on initialization");
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2004-02-15 10:24:21 +00:00
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for (LiveIntervals::Intervals::iterator i = li.begin(), e = li.end();
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2004-01-07 09:20:58 +00:00
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i != e; ++i) {
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2004-02-01 01:27:01 +00:00
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if (MRegisterInfo::isPhysicalRegister(i->reg))
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2004-01-07 09:20:58 +00:00
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fixed_.push_back(&*i);
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else
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unhandled_.push_back(&*i);
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}
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}
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void RA::processActiveIntervals(IntervalPtrs::value_type cur)
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2003-11-20 03:32:25 +00:00
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{
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DEBUG(std::cerr << "\tprocessing active intervals:\n");
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for (IntervalPtrs::iterator i = active_.begin(); i != active_.end();) {
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unsigned reg = (*i)->reg;
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2004-01-16 20:17:05 +00:00
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// remove expired intervals
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if ((*i)->expiredAt(cur->start())) {
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2003-11-20 03:32:25 +00:00
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DEBUG(std::cerr << "\t\tinterval " << **i << " expired\n");
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2004-02-23 23:08:11 +00:00
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if (MRegisterInfo::isVirtualRegister(reg))
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2004-02-23 23:47:10 +00:00
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reg = vrm_->getPhys(reg);
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2004-02-23 06:10:13 +00:00
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prt_->delRegUse(reg);
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2003-12-21 05:43:40 +00:00
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// remove from active
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i = active_.erase(i);
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}
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// move inactive intervals to inactive list
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else if (!(*i)->liveAt(cur->start())) {
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2004-02-20 06:15:40 +00:00
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DEBUG(std::cerr << "\t\tinterval " << **i << " inactive\n");
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2004-02-23 23:08:11 +00:00
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if (MRegisterInfo::isVirtualRegister(reg))
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2004-02-23 23:47:10 +00:00
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reg = vrm_->getPhys(reg);
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2004-02-23 06:10:13 +00:00
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prt_->delRegUse(reg);
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2003-12-21 05:43:40 +00:00
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// add to inactive
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inactive_.push_back(*i);
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// remove from active
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2003-11-20 03:32:25 +00:00
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i = active_.erase(i);
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}
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else {
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++i;
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}
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}
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}
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2004-01-07 09:20:58 +00:00
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void RA::processInactiveIntervals(IntervalPtrs::value_type cur)
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2003-11-20 03:32:25 +00:00
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{
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2003-12-21 05:43:40 +00:00
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DEBUG(std::cerr << "\tprocessing inactive intervals:\n");
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for (IntervalPtrs::iterator i = inactive_.begin(); i != inactive_.end();) {
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unsigned reg = (*i)->reg;
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2004-01-16 20:17:05 +00:00
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// remove expired intervals
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if ((*i)->expiredAt(cur->start())) {
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2004-02-20 06:15:40 +00:00
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DEBUG(std::cerr << "\t\tinterval " << **i << " expired\n");
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2003-12-21 05:43:40 +00:00
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// remove from inactive
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i = inactive_.erase(i);
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|
}
|
|
|
|
// move re-activated intervals in active list
|
|
|
|
else if ((*i)->liveAt(cur->start())) {
|
2004-02-20 06:15:40 +00:00
|
|
|
DEBUG(std::cerr << "\t\tinterval " << **i << " active\n");
|
2004-02-23 23:08:11 +00:00
|
|
|
if (MRegisterInfo::isVirtualRegister(reg))
|
2004-02-23 23:47:10 +00:00
|
|
|
reg = vrm_->getPhys(reg);
|
2004-02-23 06:10:13 +00:00
|
|
|
prt_->addRegUse(reg);
|
2003-12-21 05:43:40 +00:00
|
|
|
// add to active
|
|
|
|
active_.push_back(*i);
|
|
|
|
// remove from inactive
|
|
|
|
i = inactive_.erase(i);
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
++i;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2004-02-06 18:08:18 +00:00
|
|
|
void RA::updateSpillWeights(unsigned reg, SpillWeights::value_type weight)
|
|
|
|
{
|
|
|
|
spillWeights_[reg] += weight;
|
|
|
|
for (const unsigned* as = mri_->getAliasSet(reg); *as; ++as)
|
|
|
|
spillWeights_[*as] += weight;
|
2003-11-20 03:32:25 +00:00
|
|
|
}
|
|
|
|
|
2004-02-06 18:08:18 +00:00
|
|
|
void RA::assignRegOrStackSlotAtInterval(IntervalPtrs::value_type cur)
|
2003-11-20 03:32:25 +00:00
|
|
|
{
|
2004-02-20 06:15:40 +00:00
|
|
|
DEBUG(std::cerr << "\tallocating current interval: ");
|
2003-12-21 05:43:40 +00:00
|
|
|
|
2004-02-23 06:10:13 +00:00
|
|
|
PhysRegTracker backupPrt = *prt_;
|
2003-12-21 05:43:40 +00:00
|
|
|
|
2004-02-06 18:08:18 +00:00
|
|
|
spillWeights_.assign(mri_->getNumRegs(), 0.0);
|
|
|
|
|
|
|
|
// for each interval in active update spill weights
|
2004-01-07 09:20:58 +00:00
|
|
|
for (IntervalPtrs::const_iterator i = active_.begin(), e = active_.end();
|
|
|
|
i != e; ++i) {
|
2003-12-21 05:43:40 +00:00
|
|
|
unsigned reg = (*i)->reg;
|
2004-02-06 18:08:18 +00:00
|
|
|
if (MRegisterInfo::isVirtualRegister(reg))
|
2004-02-23 23:47:10 +00:00
|
|
|
reg = vrm_->getPhys(reg);
|
2004-02-06 18:08:18 +00:00
|
|
|
updateSpillWeights(reg, (*i)->weight);
|
2003-11-20 03:32:25 +00:00
|
|
|
}
|
|
|
|
|
2004-02-06 18:08:18 +00:00
|
|
|
// for every interval in inactive we overlap with, mark the
|
|
|
|
// register as not free and update spill weights
|
2004-01-07 09:20:58 +00:00
|
|
|
for (IntervalPtrs::const_iterator i = inactive_.begin(),
|
|
|
|
e = inactive_.end(); i != e; ++i) {
|
2004-02-06 18:08:18 +00:00
|
|
|
if (cur->overlaps(**i)) {
|
|
|
|
unsigned reg = (*i)->reg;
|
|
|
|
if (MRegisterInfo::isVirtualRegister(reg))
|
2004-02-23 23:47:10 +00:00
|
|
|
reg = vrm_->getPhys(reg);
|
2004-02-23 06:10:13 +00:00
|
|
|
prt_->addRegUse(reg);
|
2004-02-06 18:08:18 +00:00
|
|
|
updateSpillWeights(reg, (*i)->weight);
|
|
|
|
}
|
|
|
|
}
|
2003-12-21 05:43:40 +00:00
|
|
|
|
2004-02-06 18:08:18 +00:00
|
|
|
// for every interval in fixed we overlap with,
|
|
|
|
// mark the register as not free and update spill weights
|
|
|
|
for (IntervalPtrs::const_iterator i = fixed_.begin(),
|
|
|
|
e = fixed_.end(); i != e; ++i) {
|
|
|
|
if (cur->overlaps(**i)) {
|
|
|
|
unsigned reg = (*i)->reg;
|
2004-02-23 06:10:13 +00:00
|
|
|
prt_->addRegUse(reg);
|
2004-02-06 18:08:18 +00:00
|
|
|
updateSpillWeights(reg, (*i)->weight);
|
2003-11-20 03:32:25 +00:00
|
|
|
}
|
|
|
|
}
|
2003-12-21 05:43:40 +00:00
|
|
|
|
2004-02-06 18:08:18 +00:00
|
|
|
unsigned physReg = getFreePhysReg(cur);
|
2004-02-15 10:24:21 +00:00
|
|
|
// restore the physical register tracker
|
2004-02-23 06:10:13 +00:00
|
|
|
*prt_ = backupPrt;
|
2004-02-15 10:24:21 +00:00
|
|
|
// if we find a free register, we are done: assign this virtual to
|
|
|
|
// the free physical register and add this interval to the active
|
|
|
|
// list.
|
2004-02-06 18:08:18 +00:00
|
|
|
if (physReg) {
|
2004-02-20 06:15:40 +00:00
|
|
|
DEBUG(std::cerr << mri_->getName(physReg) << '\n');
|
2004-02-23 23:08:11 +00:00
|
|
|
vrm_->assignVirt2Phys(cur->reg, physReg);
|
|
|
|
prt_->addRegUse(physReg);
|
2004-02-06 18:08:18 +00:00
|
|
|
active_.push_back(cur);
|
2004-02-15 10:24:21 +00:00
|
|
|
handled_.push_back(cur);
|
2004-02-06 18:08:18 +00:00
|
|
|
return;
|
2003-12-23 18:00:33 +00:00
|
|
|
}
|
2004-02-20 06:15:40 +00:00
|
|
|
DEBUG(std::cerr << "no free registers\n");
|
2003-12-23 18:00:33 +00:00
|
|
|
|
2004-02-20 06:15:40 +00:00
|
|
|
DEBUG(std::cerr << "\tassigning stack slot at interval "<< *cur << ":\n");
|
2004-02-06 18:08:18 +00:00
|
|
|
|
2004-02-14 00:44:07 +00:00
|
|
|
float minWeight = std::numeric_limits<float>::infinity();
|
2003-12-21 05:43:40 +00:00
|
|
|
unsigned minReg = 0;
|
|
|
|
const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(cur->reg);
|
|
|
|
for (TargetRegisterClass::iterator i = rc->allocation_order_begin(*mf_);
|
|
|
|
i != rc->allocation_order_end(*mf_); ++i) {
|
|
|
|
unsigned reg = *i;
|
2004-02-15 10:24:21 +00:00
|
|
|
if (minWeight > spillWeights_[reg]) {
|
2004-02-06 18:08:18 +00:00
|
|
|
minWeight = spillWeights_[reg];
|
2003-12-21 05:43:40 +00:00
|
|
|
minReg = reg;
|
2003-11-20 03:32:25 +00:00
|
|
|
}
|
|
|
|
}
|
2004-02-20 06:15:40 +00:00
|
|
|
DEBUG(std::cerr << "\t\tregister with min weight: "
|
2004-01-22 19:24:43 +00:00
|
|
|
<< mri_->getName(minReg) << " (" << minWeight << ")\n");
|
2003-11-20 03:32:25 +00:00
|
|
|
|
2004-02-15 10:24:21 +00:00
|
|
|
// if the current has the minimum weight, we need to modify it,
|
|
|
|
// push it back in unhandled and let the linear scan algorithm run
|
|
|
|
// again
|
2004-02-20 06:15:40 +00:00
|
|
|
if (cur->weight <= minWeight) {
|
|
|
|
DEBUG(std::cerr << "\t\t\tspilling(c): " << *cur << '\n';);
|
2004-02-23 23:08:11 +00:00
|
|
|
int slot = vrm_->assignVirt2StackSlot(cur->reg);
|
2004-03-01 20:05:10 +00:00
|
|
|
li_->updateSpilledInterval(*cur, *vrm_, slot);
|
2004-02-20 06:15:40 +00:00
|
|
|
|
|
|
|
// if we didn't eliminate the interval find where to add it
|
|
|
|
// back to unhandled. We need to scan since unhandled are
|
|
|
|
// sorted on earliest start point and we may have changed our
|
|
|
|
// start point.
|
|
|
|
if (!cur->empty()) {
|
|
|
|
IntervalPtrs::iterator it = unhandled_.begin();
|
|
|
|
while (it != unhandled_.end() && (*it)->start() < cur->start())
|
|
|
|
++it;
|
|
|
|
unhandled_.insert(it, cur);
|
|
|
|
}
|
2004-02-06 18:08:18 +00:00
|
|
|
return;
|
2003-12-21 05:43:40 +00:00
|
|
|
}
|
2004-02-06 18:08:18 +00:00
|
|
|
|
2004-02-20 06:15:40 +00:00
|
|
|
// push the current interval back to unhandled since we are going
|
|
|
|
// to re-run at least this iteration. Since we didn't modify it it
|
|
|
|
// should go back right in the front of the list
|
|
|
|
unhandled_.push_front(cur);
|
|
|
|
|
2004-02-15 10:24:21 +00:00
|
|
|
// otherwise we spill all intervals aliasing the register with
|
|
|
|
// minimum weight, rollback to the interval with the earliest
|
|
|
|
// start point and let the linear scan algorithm run again
|
2004-02-23 00:50:15 +00:00
|
|
|
assert(MRegisterInfo::isPhysicalRegister(minReg) &&
|
|
|
|
"did not choose a register to spill?");
|
2004-02-06 18:08:18 +00:00
|
|
|
std::vector<bool> toSpill(mri_->getNumRegs(), false);
|
|
|
|
toSpill[minReg] = true;
|
|
|
|
for (const unsigned* as = mri_->getAliasSet(minReg); *as; ++as)
|
|
|
|
toSpill[*as] = true;
|
2004-02-15 10:24:21 +00:00
|
|
|
unsigned earliestStart = cur->start();
|
2004-02-06 18:08:18 +00:00
|
|
|
|
2004-02-20 06:15:40 +00:00
|
|
|
for (IntervalPtrs::iterator i = active_.begin(); i != active_.end(); ++i) {
|
2004-02-06 18:08:18 +00:00
|
|
|
unsigned reg = (*i)->reg;
|
|
|
|
if (MRegisterInfo::isVirtualRegister(reg) &&
|
2004-02-23 23:47:10 +00:00
|
|
|
toSpill[vrm_->getPhys(reg)] &&
|
2004-02-06 18:08:18 +00:00
|
|
|
cur->overlaps(**i)) {
|
2004-02-20 06:15:40 +00:00
|
|
|
DEBUG(std::cerr << "\t\t\tspilling(a): " << **i << '\n');
|
|
|
|
earliestStart = std::min(earliestStart, (*i)->start());
|
2004-02-23 23:08:11 +00:00
|
|
|
int slot = vrm_->assignVirt2StackSlot((*i)->reg);
|
2004-03-01 20:05:10 +00:00
|
|
|
li_->updateSpilledInterval(**i, *vrm_, slot);
|
2004-02-06 18:08:18 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
for (IntervalPtrs::iterator i = inactive_.begin();
|
2004-02-15 10:24:21 +00:00
|
|
|
i != inactive_.end(); ++i) {
|
2004-02-06 18:08:18 +00:00
|
|
|
unsigned reg = (*i)->reg;
|
|
|
|
if (MRegisterInfo::isVirtualRegister(reg) &&
|
2004-02-23 23:47:10 +00:00
|
|
|
toSpill[vrm_->getPhys(reg)] &&
|
2004-02-06 18:08:18 +00:00
|
|
|
cur->overlaps(**i)) {
|
2004-02-20 06:15:40 +00:00
|
|
|
DEBUG(std::cerr << "\t\t\tspilling(i): " << **i << '\n');
|
|
|
|
earliestStart = std::min(earliestStart, (*i)->start());
|
2004-02-23 23:08:11 +00:00
|
|
|
int slot = vrm_->assignVirt2StackSlot((*i)->reg);
|
2004-03-01 20:05:10 +00:00
|
|
|
li_->updateSpilledInterval(**i, *vrm_, slot);
|
2004-02-15 10:24:21 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2004-02-20 06:15:40 +00:00
|
|
|
DEBUG(std::cerr << "\t\trolling back to: " << earliestStart << '\n');
|
2004-02-15 10:24:21 +00:00
|
|
|
// scan handled in reverse order and undo each one, restoring the
|
|
|
|
// state of unhandled and fixed
|
|
|
|
while (!handled_.empty()) {
|
|
|
|
IntervalPtrs::value_type i = handled_.back();
|
|
|
|
// if this interval starts before t we are done
|
2004-02-20 06:15:40 +00:00
|
|
|
if (!i->empty() && i->start() < earliestStart)
|
2004-02-15 10:24:21 +00:00
|
|
|
break;
|
2004-02-20 06:15:40 +00:00
|
|
|
DEBUG(std::cerr << "\t\t\tundo changes for: " << *i << '\n');
|
2004-02-15 10:24:21 +00:00
|
|
|
handled_.pop_back();
|
|
|
|
IntervalPtrs::iterator it;
|
|
|
|
if ((it = find(active_.begin(), active_.end(), i)) != active_.end()) {
|
|
|
|
active_.erase(it);
|
|
|
|
if (MRegisterInfo::isPhysicalRegister(i->reg)) {
|
|
|
|
fixed_.push_front(i);
|
2004-02-23 06:10:13 +00:00
|
|
|
prt_->delRegUse(i->reg);
|
2004-02-15 10:24:21 +00:00
|
|
|
}
|
|
|
|
else {
|
2004-02-23 23:47:10 +00:00
|
|
|
prt_->delRegUse(vrm_->getPhys(i->reg));
|
2004-02-27 06:11:15 +00:00
|
|
|
vrm_->clearVirt(i->reg);
|
2004-02-20 06:15:40 +00:00
|
|
|
if (i->spilled()) {
|
|
|
|
if (!i->empty()) {
|
|
|
|
IntervalPtrs::iterator it = unhandled_.begin();
|
|
|
|
while (it != unhandled_.end() &&
|
|
|
|
(*it)->start() < i->start())
|
|
|
|
++it;
|
|
|
|
unhandled_.insert(it, i);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
unhandled_.push_front(i);
|
|
|
|
|
2004-02-15 10:24:21 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
else if ((it = find(inactive_.begin(), inactive_.end(), i)) != inactive_.end()) {
|
|
|
|
inactive_.erase(it);
|
|
|
|
if (MRegisterInfo::isPhysicalRegister(i->reg))
|
|
|
|
fixed_.push_front(i);
|
|
|
|
else {
|
2004-02-27 06:11:15 +00:00
|
|
|
vrm_->clearVirt(i->reg);
|
2004-02-20 06:15:40 +00:00
|
|
|
if (i->spilled()) {
|
|
|
|
if (!i->empty()) {
|
|
|
|
IntervalPtrs::iterator it = unhandled_.begin();
|
|
|
|
while (it != unhandled_.end() &&
|
|
|
|
(*it)->start() < i->start())
|
|
|
|
++it;
|
|
|
|
unhandled_.insert(it, i);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
unhandled_.push_front(i);
|
2004-02-15 10:24:21 +00:00
|
|
|
}
|
2003-11-20 03:32:25 +00:00
|
|
|
}
|
2004-02-06 18:08:18 +00:00
|
|
|
else {
|
2004-02-15 10:24:21 +00:00
|
|
|
if (MRegisterInfo::isPhysicalRegister(i->reg))
|
|
|
|
fixed_.push_front(i);
|
|
|
|
else {
|
2004-02-27 06:11:15 +00:00
|
|
|
vrm_->clearVirt(i->reg);
|
2004-02-15 10:24:21 +00:00
|
|
|
unhandled_.push_front(i);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// scan the rest and undo each interval that expired after t and
|
|
|
|
// insert it in active (the next iteration of the algorithm will
|
|
|
|
// put it in inactive if required)
|
|
|
|
IntervalPtrs::iterator i = handled_.begin(), e = handled_.end();
|
|
|
|
for (; i != e; ++i) {
|
|
|
|
if (!(*i)->expiredAt(earliestStart) && (*i)->expiredAt(cur->start())) {
|
2004-02-20 06:15:40 +00:00
|
|
|
DEBUG(std::cerr << "\t\t\tundo changes for: " << **i << '\n');
|
2004-02-15 10:24:21 +00:00
|
|
|
active_.push_back(*i);
|
|
|
|
if (MRegisterInfo::isPhysicalRegister((*i)->reg))
|
2004-02-23 06:10:13 +00:00
|
|
|
prt_->addRegUse((*i)->reg);
|
2004-02-23 23:08:11 +00:00
|
|
|
else
|
2004-02-23 23:47:10 +00:00
|
|
|
prt_->addRegUse(vrm_->getPhys((*i)->reg));
|
2004-02-06 18:08:18 +00:00
|
|
|
}
|
|
|
|
}
|
2004-02-15 10:24:21 +00:00
|
|
|
}
|
2003-12-21 05:43:40 +00:00
|
|
|
|
2004-01-07 09:20:58 +00:00
|
|
|
unsigned RA::getFreePhysReg(IntervalPtrs::value_type cur)
|
2003-11-20 03:32:25 +00:00
|
|
|
{
|
2003-12-21 05:43:40 +00:00
|
|
|
const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(cur->reg);
|
2003-12-28 17:58:18 +00:00
|
|
|
|
2003-12-21 05:43:40 +00:00
|
|
|
for (TargetRegisterClass::iterator i = rc->allocation_order_begin(*mf_);
|
|
|
|
i != rc->allocation_order_end(*mf_); ++i) {
|
|
|
|
unsigned reg = *i;
|
2004-02-23 06:10:13 +00:00
|
|
|
if (prt_->isRegAvail(reg))
|
2003-12-21 05:43:40 +00:00
|
|
|
return reg;
|
2003-11-20 03:32:25 +00:00
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
FunctionPass* llvm::createLinearScanRegisterAllocator() {
|
|
|
|
return new RA();
|
|
|
|
}
|