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llvm-6502/test/MC/Disassembler/Hexagon/alu32_pred.txt

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[Hexagon] Marking several instructions as isCodeGenOnly=0 and adding direct disassembly tests for many instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223482 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-05 17:27:39 +00:00
# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
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# CHECK: if (p3) r17 = add(r21, r31)
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# CHECK: if (p3) r17 = aslh(r21)
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# CHECK: if (p3) r17 = asrh(r21)
[Hexagon] Adding combine reg, reg with predicated forms. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223667 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-08 17:33:06 +00:00
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# CHECK: if (p3) r17:16 = combine(r21, r31)
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# CHECK: if (!p3) r17:16 = combine(r21, r31)
[Hexagon] Adding word combine dot-new form and replacing old combine opcode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223815 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 19:23:45 +00:00
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# CHECK: p3 = r5
# CHECK-NEXT: if (p3.new) r17:16 = combine(r21, r31)
0x03 0x40 0x45 0x85 0xf0 0xff 0x15 0xfd
# CHECK: p3 = r5
# CHECK-NEXT: if (!p3.new) r17:16 = combine(r21, r31)
[Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223821 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 20:23:30 +00:00
0x03 0x40 0x45 0x85 0x70 0xff 0x15 0xfd
[Hexagon] Fixing broken tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223823 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 20:36:53 +00:00
# CHECK: p3 = r5
# CHECK-NEXT: if (p3.new) r17:16 = combine(r21, r31)
[Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223821 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 20:23:30 +00:00
0x03 0x40 0x45 0x85 0xf0 0xff 0x15 0xfd
[Hexagon] Fixing broken tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223823 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 20:36:53 +00:00
# CHECK: p3 = r5
# CHECK-NEXT: if (!p3.new) r17:16 = combine(r21, r31)
[Hexagon] Marking several instructions as isCodeGenOnly=0 and adding direct disassembly tests for many instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223482 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-05 17:27:39 +00:00
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# CHECK: if (p3) r17 = and(r21, r31)
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# CHECK: if (p3) r17 = or(r21, r31)
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# CHECK: if (p3) r17 = xor(r21, r31)
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# CHECK: if (p3) r17 = sub(r31, r21)
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# CHECK: if (p3) r17 = sxtb(r21)
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# CHECK: if (p3) r17 = sxth(r21)
[Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223821 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 20:23:30 +00:00
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[Hexagon] Fixing broken tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223823 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 20:36:53 +00:00
# CHECK: if (p3) r17 = #21
[Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223821 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 20:23:30 +00:00
0xb1 0xc2 0xe0 0x7e
[Hexagon] Fixing broken tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223823 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 20:36:53 +00:00
# CHECK: if (!p3) r17 = #21
[Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223821 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 20:23:30 +00:00
0x03 0x40 0x45 0x85 0xb1 0xe2 0x60 0x7e
[Hexagon] Fixing broken tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223823 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 20:36:53 +00:00
# CHECK: p3 = r5
# CHECK-NEXT: if (p3.new) r17 = #21
[Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223821 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 20:23:30 +00:00
0x03 0x40 0x45 0x85 0xb1 0xe2 0xe0 0x7e
[Hexagon] Fixing broken tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223823 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 20:36:53 +00:00
# CHECK: p3 = r5
# CHECK-NEXT: if (!p3.new) r17 = #21
[Hexagon] Marking several instructions as isCodeGenOnly=0 and adding direct disassembly tests for many instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223482 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-05 17:27:39 +00:00
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# CHECK: if (p3) r17 = zxtb(r21)
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# CHECK: if (p3) r17 = zxth(r21)
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# CHECK: p3 = cmp.eq(r21, r31)
[Hexagon] Updating constant extender def, adding alu-not instructions, compare to general register, and inverted compares. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224989 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-30 15:44:17 +00:00
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# CHECK: p3 = !cmp.eq(r21, r31)
[Hexagon] Marking several instructions as isCodeGenOnly=0 and adding direct disassembly tests for many instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223482 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-05 17:27:39 +00:00
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# CHECK: p3 = cmp.gt(r21, r31)
[Hexagon] Updating constant extender def, adding alu-not instructions, compare to general register, and inverted compares. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224989 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-30 15:44:17 +00:00
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# CHECK: p3 = !cmp.gt(r21, r31)
[Hexagon] Marking several instructions as isCodeGenOnly=0 and adding direct disassembly tests for many instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223482 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-05 17:27:39 +00:00
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# CHECK: p3 = cmp.gtu(r21, r31)
[Hexagon] Updating constant extender def, adding alu-not instructions, compare to general register, and inverted compares. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224989 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-30 15:44:17 +00:00
0x13 0xdf 0x75 0xf2
# CHECK: p3 = !cmp.gtu(r21, r31)
[Hexagon] Adding compare byte/halfword reg-reg/reg-imm forms. Adding compare to general register reg-imm form. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224991 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-30 17:39:24 +00:00
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# CHECK: r17 = cmp.eq(r21, #31)
0xf1 0xe3 0x75 0x73
# CHECK: r17 = !cmp.eq(r21, #31)
[Hexagon] Marking several instructions as isCodeGenOnly=0 and adding direct disassembly tests for many instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223482 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-05 17:27:39 +00:00
0x11 0xdf 0x55 0xf3
[Hexagon] Updating constant extender def, adding alu-not instructions, compare to general register, and inverted compares. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224989 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-30 15:44:17 +00:00
# CHECK: r17 = cmp.eq(r21, r31)
0x11 0xdf 0x75 0xf3
# CHECK: r17 = !cmp.eq(r21, r31)
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