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llvm-6502/test/CodeGen/ARM/fast-isel-cmp-imm.ll

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ARM: Clean up fast-isel machine verifier errors. Lots of machine verifier errors result from using a plain GPR regclass for incoming argument copies. A more restrictive rGPR class is more appropriate since it more accurately represents what's happening, plus it lines up better with isel later on so the verifier is happier. Reduces the number of ARM fast-isel tests not running with the verifier enabled by over half. rdar://12594152 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188592 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 23:37:23 +00:00
; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -verify-machineinstrs | FileCheck %s --check-prefix=ARM
; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -verify-machineinstrs | FileCheck %s --check-prefix=ARM
; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -verify-machineinstrs | FileCheck %s --check-prefix=THUMB
Add support for encoding immediates in icmp and fcmp. Hopefully, this will remove a fair number of unnecessary materialized constants. rdar://10412592 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144163 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 03:22:02 +00:00
define void @t1a(float %a) uwtable ssp {
entry:
; ARM: t1a
; THUMB: t1a
%cmp = fcmp oeq float %a, 0.000000e+00
Use REs to remove dependencies on the register allocation order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144209 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 20:06:13 +00:00
; ARM: vcmpe.f32 s{{[0-9]+}}, #0
; THUMB: vcmpe.f32 s{{[0-9]+}}, #0
Add support for encoding immediates in icmp and fcmp. Hopefully, this will remove a fair number of unnecessary materialized constants. rdar://10412592 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144163 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 03:22:02 +00:00
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
tail call void @foo()
br label %if.end
if.end: ; preds = %if.then, %entry
ret void
}
declare void @foo()
; Shouldn't be able to encode -0.0 imm.
define void @t1b(float %a) uwtable ssp {
entry:
; ARM: t1b
; THUMB: t1b
%cmp = fcmp oeq float %a, -0.000000e+00
ARM VLDR/VSTR instructions don't need a size suffix. Canonicallize on the non-suffixed form, but continue to accept assembly that has any correctly sized type suffix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144583 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-14 23:03:21 +00:00
; ARM: vldr
Use REs to remove dependencies on the register allocation order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144209 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 20:06:13 +00:00
; ARM: vcmpe.f32 s{{[0-9]+}}, s{{[0-9]+}}
ARM VLDR/VSTR instructions don't need a size suffix. Canonicallize on the non-suffixed form, but continue to accept assembly that has any correctly sized type suffix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144583 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-14 23:03:21 +00:00
; THUMB: vldr
Use REs to remove dependencies on the register allocation order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144209 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 20:06:13 +00:00
; THUMB: vcmpe.f32 s{{[0-9]+}}, s{{[0-9]+}}
Add support for encoding immediates in icmp and fcmp. Hopefully, this will remove a fair number of unnecessary materialized constants. rdar://10412592 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144163 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 03:22:02 +00:00
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
tail call void @foo()
br label %if.end
if.end: ; preds = %if.then, %entry
ret void
}
define void @t2a(double %a) uwtable ssp {
entry:
; ARM: t2a
; THUMB: t2a
%cmp = fcmp oeq double %a, 0.000000e+00
Use REs to remove dependencies on the register allocation order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144209 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 20:06:13 +00:00
; ARM: vcmpe.f64 d{{[0-9]+}}, #0
; THUMB: vcmpe.f64 d{{[0-9]+}}, #0
Add support for encoding immediates in icmp and fcmp. Hopefully, this will remove a fair number of unnecessary materialized constants. rdar://10412592 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144163 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 03:22:02 +00:00
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
tail call void @foo()
br label %if.end
if.end: ; preds = %if.then, %entry
ret void
}
; Shouldn't be able to encode -0.0 imm.
define void @t2b(double %a) uwtable ssp {
entry:
; ARM: t2b
; THUMB: t2b
%cmp = fcmp oeq double %a, -0.000000e+00
ARM VLDR/VSTR instructions don't need a size suffix. Canonicallize on the non-suffixed form, but continue to accept assembly that has any correctly sized type suffix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144583 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-14 23:03:21 +00:00
; ARM: vldr
Use REs to remove dependencies on the register allocation order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144209 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 20:06:13 +00:00
; ARM: vcmpe.f64 d{{[0-9]+}}, d{{[0-9]+}}
ARM VLDR/VSTR instructions don't need a size suffix. Canonicallize on the non-suffixed form, but continue to accept assembly that has any correctly sized type suffix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144583 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-14 23:03:21 +00:00
; THUMB: vldr
Use REs to remove dependencies on the register allocation order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144209 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 20:06:13 +00:00
; THUMB: vcmpe.f64 d{{[0-9]+}}, d{{[0-9]+}}
Add support for encoding immediates in icmp and fcmp. Hopefully, this will remove a fair number of unnecessary materialized constants. rdar://10412592 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144163 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 03:22:02 +00:00
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
tail call void @foo()
br label %if.end
if.end: ; preds = %if.then, %entry
ret void
}
define void @t4(i8 signext %a) uwtable ssp {
entry:
; ARM: t4
; THUMB: t4
%cmp = icmp eq i8 %a, -1
Use REs to remove dependencies on the register allocation order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144209 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 20:06:13 +00:00
; ARM: cmn r{{[0-9]}}, #1
; THUMB: cmn.w r{{[0-9]}}, #1
Add support for encoding immediates in icmp and fcmp. Hopefully, this will remove a fair number of unnecessary materialized constants. rdar://10412592 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144163 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 03:22:02 +00:00
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
tail call void @foo()
br label %if.end
if.end: ; preds = %if.then, %entry
ret void
}
define void @t5(i8 zeroext %a) uwtable ssp {
entry:
; ARM: t5
; THUMB: t5
%cmp = icmp eq i8 %a, 1
Use REs to remove dependencies on the register allocation order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144209 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 20:06:13 +00:00
; ARM: cmp r{{[0-9]}}, #1
; THUMB: cmp r{{[0-9]}}, #1
Add support for encoding immediates in icmp and fcmp. Hopefully, this will remove a fair number of unnecessary materialized constants. rdar://10412592 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144163 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 03:22:02 +00:00
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
tail call void @foo()
br label %if.end
if.end: ; preds = %if.then, %entry
ret void
}
define void @t6(i16 signext %a) uwtable ssp {
entry:
; ARM: t6
; THUMB: t6
%cmp = icmp eq i16 %a, -1
Use REs to remove dependencies on the register allocation order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144209 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 20:06:13 +00:00
; ARM: cmn r{{[0-9]}}, #1
; THUMB: cmn.w r{{[0-9]}}, #1
Add support for encoding immediates in icmp and fcmp. Hopefully, this will remove a fair number of unnecessary materialized constants. rdar://10412592 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144163 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 03:22:02 +00:00
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
tail call void @foo()
br label %if.end
if.end: ; preds = %if.then, %entry
ret void
}
define void @t7(i16 zeroext %a) uwtable ssp {
entry:
; ARM: t7
; THUMB: t7
%cmp = icmp eq i16 %a, 1
Use REs to remove dependencies on the register allocation order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144209 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 20:06:13 +00:00
; ARM: cmp r{{[0-9]}}, #1
; THUMB: cmp r{{[0-9]}}, #1
Add support for encoding immediates in icmp and fcmp. Hopefully, this will remove a fair number of unnecessary materialized constants. rdar://10412592 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144163 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 03:22:02 +00:00
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
tail call void @foo()
br label %if.end
if.end: ; preds = %if.then, %entry
ret void
}
define void @t8(i32 %a) uwtable ssp {
entry:
; ARM: t8
; THUMB: t8
%cmp = icmp eq i32 %a, -1
Use REs to remove dependencies on the register allocation order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144209 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 20:06:13 +00:00
; ARM: cmn r{{[0-9]}}, #1
; THUMB: cmn.w r{{[0-9]}}, #1
Add support for encoding immediates in icmp and fcmp. Hopefully, this will remove a fair number of unnecessary materialized constants. rdar://10412592 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144163 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 03:22:02 +00:00
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
tail call void @foo()
br label %if.end
if.end: ; preds = %if.then, %entry
ret void
}
define void @t9(i32 %a) uwtable ssp {
entry:
; ARM: t9
; THUMB: t9
%cmp = icmp eq i32 %a, 1
Use REs to remove dependencies on the register allocation order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144209 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 20:06:13 +00:00
; ARM: cmp r{{[0-9]}}, #1
; THUMB: cmp r{{[0-9]}}, #1
Add support for encoding immediates in icmp and fcmp. Hopefully, this will remove a fair number of unnecessary materialized constants. rdar://10412592 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144163 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 03:22:02 +00:00
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
tail call void @foo()
br label %if.end
if.end: ; preds = %if.then, %entry
ret void
}
define void @t10(i32 %a) uwtable ssp {
entry:
; ARM: t10
; THUMB: t10
%cmp = icmp eq i32 %a, 384
Use REs to remove dependencies on the register allocation order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144209 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 20:06:13 +00:00
; ARM: cmp r{{[0-9]}}, #384
; THUMB: cmp.w r{{[0-9]}}, #384
Add support for encoding immediates in icmp and fcmp. Hopefully, this will remove a fair number of unnecessary materialized constants. rdar://10412592 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144163 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 03:22:02 +00:00
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
tail call void @foo()
br label %if.end
if.end: ; preds = %if.then, %entry
ret void
}
define void @t11(i32 %a) uwtable ssp {
entry:
; ARM: t11
; THUMB: t11
%cmp = icmp eq i32 %a, 4096
Use REs to remove dependencies on the register allocation order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144209 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 20:06:13 +00:00
; ARM: cmp r{{[0-9]}}, #4096
; THUMB: cmp.w r{{[0-9]}}, #4096
Add support for encoding immediates in icmp and fcmp. Hopefully, this will remove a fair number of unnecessary materialized constants. rdar://10412592 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144163 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 03:22:02 +00:00
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
tail call void @foo()
br label %if.end
if.end: ; preds = %if.then, %entry
ret void
}
For immediate encodings of icmp, zero or sign extend first. Then determine if the value is negative and flip the sign accordingly. rdar://10422026 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144258 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 01:30:39 +00:00
define void @t12(i8 %a) uwtable ssp {
entry:
; ARM: t12
; THUMB: t12
%cmp = icmp ugt i8 %a, -113
; ARM: cmp r{{[0-9]}}, #143
; THUMB: cmp r{{[0-9]}}, #143
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
tail call void @foo()
br label %if.end
if.end: ; preds = %if.then, %entry
ret void
}
[fast-isel] Address Eli's comments for r152847. Specifically, add a test case and still allow immediate encoding, just not with cmn. rdar://11038907 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152869 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-15 22:54:20 +00:00
; rdar://11038907
; When comparing LONG_MIN/INT_MIN use a cmp instruction.
define void @t13() nounwind ssp {
entry:
; ARM: t13
; THUMB: t13
%cmp = icmp slt i32 -123, -2147483648
; ARM: cmp r{{[0-9]}}, #-2147483648
; THUMB: cmp.w r{{[0-9]}}, #-2147483648
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
ret void
if.end: ; preds = %entry
ret void
}
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