2012-02-17 08:55:11 +00:00
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//===-- MipsSubtarget.cpp - Mips Subtarget Information --------------------===//
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2007-06-06 07:42:06 +00:00
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//
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// The LLVM Compiler Infrastructure
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//
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2007-12-29 20:36:04 +00:00
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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2007-06-06 07:42:06 +00:00
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//
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2011-04-15 21:51:11 +00:00
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//===----------------------------------------------------------------------===//
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2007-06-06 07:42:06 +00:00
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//
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2011-07-01 21:01:15 +00:00
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// This file implements the Mips specific subclass of TargetSubtargetInfo.
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2007-06-06 07:42:06 +00:00
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//
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2011-04-15 21:51:11 +00:00
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//===----------------------------------------------------------------------===//
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2007-06-06 07:42:06 +00:00
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2013-04-09 19:46:01 +00:00
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#define DEBUG_TYPE "mips-subtarget"
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#include "MipsMachineFunction.h"
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2007-06-06 07:42:06 +00:00
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#include "MipsSubtarget.h"
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2013-04-09 19:46:01 +00:00
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#include "MipsTargetMachine.h"
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2007-06-06 07:42:06 +00:00
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#include "Mips.h"
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2012-03-28 00:24:17 +00:00
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#include "MipsRegisterInfo.h"
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2013-04-09 19:46:01 +00:00
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#include "llvm/IR/Attributes.h"
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#include "llvm/IR/Function.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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2011-08-24 18:08:43 +00:00
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#include "llvm/Support/TargetRegistry.h"
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2013-04-09 19:46:01 +00:00
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#include "llvm/Support/raw_ostream.h"
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2011-07-01 20:45:01 +00:00
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#define GET_SUBTARGETINFO_TARGET_DESC
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2011-07-08 01:53:10 +00:00
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#define GET_SUBTARGETINFO_CTOR
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2011-07-01 22:36:09 +00:00
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#include "MipsGenSubtargetInfo.inc"
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2011-07-01 20:45:01 +00:00
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2013-04-09 19:46:01 +00:00
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2007-06-06 07:42:06 +00:00
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using namespace llvm;
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2013-04-09 19:46:01 +00:00
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// FIXME: Maybe this should be on by default when Mips16 is specified
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//
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static cl::opt<bool> Mixed16_32(
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"mips-mixed-16-32",
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cl::init(false),
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cl::desc("Allow for a mixture of Mips16 "
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"and Mips32 code in a single source file"),
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cl::Hidden);
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2013-04-10 16:58:04 +00:00
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static cl::opt<bool> Mips_Os16(
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"mips-os16",
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cl::init(false),
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cl::desc("Compile all functions that don' use "
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"floating point as Mips 16"),
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cl::Hidden);
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Checkin in of first of several patches to finish implementation of
mips16/mips32 floating point interoperability.
This patch fixes returns from mips16 functions so that if the function
was in fact called by a mips32 hard float routine, then values
that would have been returned in floating point registers are so returned.
Mips16 mode has no floating point instructions so there is no way to
load values into floating point registers.
This is needed when returning float, double, single complex, double complex
in the Mips ABI.
Helper functions in libc for mips16 are available to do this.
For efficiency purposes, these helper functions have a different calling
convention from normal Mips calls.
Registers v0,v1,a0,a1 are used to pass parameters instead of
a0,a1,a2,a3.
This is because v0,v1,a0,a1 are the natural registers used to return
floating point values in soft float. These values can then be moved
to the appropriate floating point registers with no extra cost.
The only register that is modified is ra in this call.
The helper functions make sure that the return values are in the floating
point registers that they would be in if soft float was not in effect
(which it is for mips16, though the soft float is implemented using a mips32
library that uses hard float).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181641 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 22:25:39 +00:00
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static cl::opt<bool>
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Mips16HardFloat("mips16-hard-float", cl::NotHidden,
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cl::desc("MIPS: mips16 hard float enable."),
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cl::init(false));
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2011-12-20 02:50:00 +00:00
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void MipsSubtarget::anchor() { }
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2011-06-30 01:53:36 +00:00
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MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU,
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2012-08-22 03:18:13 +00:00
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const std::string &FS, bool little,
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2013-04-09 19:46:01 +00:00
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Reloc::Model _RM, MipsTargetMachine *_TM) :
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2011-07-07 07:07:08 +00:00
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MipsGenSubtargetInfo(TT, CPU, FS),
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2012-02-28 07:46:26 +00:00
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MipsArchVersion(Mips32), MipsABI(UnknownABI), IsLittle(little),
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2011-09-21 17:31:45 +00:00
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IsSingleFloat(false), IsFP64bit(false), IsGP64bit(false), HasVFPU(false),
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2012-12-07 03:04:05 +00:00
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IsLinux(true), HasSEInReg(false), HasCondMov(false), HasSwap(false),
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HasBitCount(false), HasFPIdx(false),
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Checkin in of first of several patches to finish implementation of
mips16/mips32 floating point interoperability.
This patch fixes returns from mips16 functions so that if the function
was in fact called by a mips32 hard float routine, then values
that would have been returned in floating point registers are so returned.
Mips16 mode has no floating point instructions so there is no way to
load values into floating point registers.
This is needed when returning float, double, single complex, double complex
in the Mips ABI.
Helper functions in libc for mips16 are available to do this.
For efficiency purposes, these helper functions have a different calling
convention from normal Mips calls.
Registers v0,v1,a0,a1 are used to pass parameters instead of
a0,a1,a2,a3.
This is because v0,v1,a0,a1 are the natural registers used to return
floating point values in soft float. These values can then be moved
to the appropriate floating point registers with no extra cost.
The only register that is modified is ra in this call.
The helper functions make sure that the return values are in the floating
point registers that they would be in if soft float was not in effect
(which it is for mips16, though the soft float is implemented using a mips32
library that uses hard float).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181641 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 22:25:39 +00:00
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InMips16Mode(false), InMips16HardFloat(Mips16HardFloat),
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InMicroMipsMode(false), HasDSP(false), HasDSPR2(false),
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2013-04-10 16:58:04 +00:00
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AllowMixed16_32(Mixed16_32 | Mips_Os16), Os16(Mips_Os16),
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2013-04-09 19:46:01 +00:00
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RM(_RM), OverrideMode(NoOverride), TM(_TM)
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2007-06-06 07:42:06 +00:00
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{
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2011-06-30 01:53:36 +00:00
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std::string CPUName = CPU;
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if (CPUName.empty())
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2011-11-29 23:08:41 +00:00
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CPUName = "mips32";
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2007-06-06 07:42:06 +00:00
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// Parse features string.
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2011-07-07 07:07:08 +00:00
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ParseSubtargetFeatures(CPUName, FS);
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2008-07-14 14:42:54 +00:00
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2013-04-09 19:46:01 +00:00
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PreviousInMips16Mode = InMips16Mode;
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2011-07-01 20:45:01 +00:00
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// Initialize scheduling itinerary for the specified CPU.
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InstrItins = getInstrItineraryForCPU(CPUName);
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2011-09-21 02:45:29 +00:00
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// Set MipsABI if it hasn't been set yet.
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if (MipsABI == UnknownABI)
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2012-02-28 07:46:26 +00:00
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MipsABI = hasMips64() ? N64 : O32;
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2011-09-21 02:45:29 +00:00
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// Check if Architecture and ABI are compatible.
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assert(((!hasMips64() && (isABI_O32() || isABI_EABI())) ||
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(hasMips64() && (isABI_N32() || isABI_N64()))) &&
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"Invalid Arch & ABI pair.");
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2008-07-14 14:42:54 +00:00
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// Is the target system Linux ?
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if (TT.find("linux") == std::string::npos)
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IsLinux = false;
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2012-08-22 03:18:13 +00:00
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// Set UseSmallSection.
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UseSmallSection = !IsLinux && (RM == Reloc::Static);
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2007-06-06 07:42:06 +00:00
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}
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2012-03-28 00:24:17 +00:00
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bool
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MipsSubtarget::enablePostRAScheduler(CodeGenOpt::Level OptLevel,
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2012-06-14 21:10:56 +00:00
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TargetSubtargetInfo::AntiDepBreakMode &Mode,
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RegClassVector &CriticalPathRCs) const {
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2012-05-15 03:14:52 +00:00
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Mode = TargetSubtargetInfo::ANTIDEP_NONE;
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2012-03-28 00:24:17 +00:00
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CriticalPathRCs.clear();
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CriticalPathRCs.push_back(hasMips64() ?
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&Mips::CPU64RegsRegClass : &Mips::CPURegsRegClass);
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2012-03-28 00:52:23 +00:00
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return OptLevel >= CodeGenOpt::Aggressive;
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2012-03-28 00:24:17 +00:00
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}
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2013-04-09 19:46:01 +00:00
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//FIXME: This logic for reseting the subtarget along with
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// the helper classes can probably be simplified but there are a lot of
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// cases so we will defer rewriting this to later.
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//
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void MipsSubtarget::resetSubtarget(MachineFunction *MF) {
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bool ChangeToMips16 = false, ChangeToNoMips16 = false;
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DEBUG(dbgs() << "resetSubtargetFeatures" << "\n");
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AttributeSet FnAttrs = MF->getFunction()->getAttributes();
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ChangeToMips16 = FnAttrs.hasAttribute(AttributeSet::FunctionIndex,
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"mips16");
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ChangeToNoMips16 = FnAttrs.hasAttribute(AttributeSet::FunctionIndex,
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"nomips16");
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assert (!(ChangeToMips16 & ChangeToNoMips16) &&
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"mips16 and nomips16 specified on the same function");
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if (ChangeToMips16) {
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if (PreviousInMips16Mode)
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return;
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OverrideMode = Mips16Override;
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PreviousInMips16Mode = true;
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TM->setHelperClassesMips16();
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return;
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} else if (ChangeToNoMips16) {
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if (!PreviousInMips16Mode)
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return;
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OverrideMode = NoMips16Override;
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PreviousInMips16Mode = false;
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TM->setHelperClassesMipsSE();
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return;
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} else {
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if (OverrideMode == NoOverride)
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return;
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OverrideMode = NoOverride;
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DEBUG(dbgs() << "back to default" << "\n");
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if (inMips16Mode() && !PreviousInMips16Mode) {
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TM->setHelperClassesMips16();
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PreviousInMips16Mode = true;
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} else if (!inMips16Mode() && PreviousInMips16Mode) {
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TM->setHelperClassesMipsSE();
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PreviousInMips16Mode = false;
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}
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return;
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}
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}
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