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Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to

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be the first encoded as the first feature. It then uses the CPU name to look up
features / scheduling itineray even though clients know full well the CPU name
being used to query these properties.

The fix is to just have the clients explictly pass the CPU name!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134127 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2011-06-30 01:53:36 +00:00
parent ca0ede7655
commit 276365dd4b
68 changed files with 271 additions and 236 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

28
include/llvm/MC/SubtargetFeature.h
View File

@ -80,26 +80,19 @@ public:
std::string getString() const;
void setString(const std::string &Initial);
/// Set the CPU string. Replaces previous setting. Setting to "" clears CPU.
void setCPU(const std::string &String);
/// Setting CPU string only if no string is set.
void setCPUIfNone(const std::string &String);
/// Returns current CPU string.
const std::string & getCPU() const;
/// Adding Features.
void AddFeature(const std::string &String, bool IsEnabled = true);
/// Get feature bits.
uint64_t getBits(const SubtargetFeatureKV *CPUTable,
size_t CPUTableSize,
const SubtargetFeatureKV *FeatureTable,
size_t FeatureTableSize);
/// Get feature bits of a CPU.
uint64_t getFeatureBits(const std::string &CPU,
const SubtargetFeatureKV *CPUTable,
size_t CPUTableSize,
const SubtargetFeatureKV *FeatureTable,
size_t FeatureTableSize);
/// Get info pointer
void *getInfo(const SubtargetInfoKV *Table, size_t TableSize);
/// Get scheduling itinerary of a CPU.
void *getItinerary(const std::string &CPU,
const SubtargetInfoKV *Table, size_t TableSize);
/// Print feature string.
void print(raw_ostream &OS) const;
@ -109,8 +102,7 @@ public:
/// Retrieve a formatted string of the default features for the specified
/// target triple.
void getDefaultSubtargetFeatures(const std::string &CPU,
const Triple& Triple);
void getDefaultSubtargetFeatures(const Triple& Triple);
};
} // End namespace llvm

7
include/llvm/Target/TargetRegistry.h
View File

@ -71,6 +71,7 @@ namespace llvm {
typedef MCRegisterInfo *(*MCRegInfoCtorFnTy)(void);
typedef TargetMachine *(*TargetMachineCtorTy)(const Target &T,
const std::string &TT,
const std::string &CPU,
const std::string &Features);
typedef AsmPrinter *(*AsmPrinterCtorTy)(TargetMachine &TM,
MCStreamer &Streamer);
@ -269,10 +270,11 @@ namespace llvm {
/// either the target triple from the module, or the target triple of the
/// host if that does not exist.
TargetMachine *createTargetMachine(const std::string &Triple,
const std::string &CPU,
const std::string &Features) const {
if (!TargetMachineCtorFn)
return 0;
return TargetMachineCtorFn(*this, Triple, Features);
return TargetMachineCtorFn(*this, Triple, CPU, Features);
}
/// createAsmBackend - Create a target specific assembly parser.
@ -796,8 +798,9 @@ namespace llvm {
private:
static TargetMachine *Allocator(const Target &T, const std::string &TT,
const std::string &CPU,
const std::string &FS) {
return new TargetMachineImpl(T, TT, FS);
return new TargetMachineImpl(T, TT, CPU, FS);
}
};

5
lib/ExecutionEngine/TargetSelect.cpp
View File

@ -75,9 +75,8 @@ TargetMachine *EngineBuilder::selectTarget(Module *Mod,
// Package up features to be passed to target/subtarget
std::string FeaturesStr;
if (!MCPU.empty() || !MAttrs.empty()) {
if (!MAttrs.empty()) {
SubtargetFeatures Features;
Features.setCPU(MCPU);
for (unsigned i = 0; i != MAttrs.size(); ++i)
Features.AddFeature(MAttrs[i]);
FeaturesStr = Features.getString();
@ -85,7 +84,7 @@ TargetMachine *EngineBuilder::selectTarget(Module *Mod,
// Allocate a target...
TargetMachine *Target =
TheTarget->createTargetMachine(TheTriple.getTriple(), FeaturesStr);
TheTarget->createTargetMachine(TheTriple.getTriple(), MCPU, FeaturesStr);
assert(Target && "Could not allocate target machine!");
return Target;
}

4
lib/MC/MCDisassembler/Disassembler.cpp
View File

@ -55,11 +55,13 @@ LLVMDisasmContextRef LLVMCreateDisasm(const char *TripleName, void *DisInfo,
// Package up features to be passed to target/subtarget
std::string FeaturesStr;
std::string CPU;
// FIXME: We shouldn't need to do this (and link in codegen).
// When we split this out, we should do it in a way that makes
// it straightforward to switch subtargets on the fly.
TargetMachine *TM = TheTarget->createTargetMachine(TripleName, FeaturesStr);
TargetMachine *TM = TheTarget->createTargetMachine(TripleName, CPU,
FeaturesStr);
assert(TM && "Unable to create target machine!");
// Get the target assembler info needed to setup the context.

4
lib/MC/MCDisassembler/EDDisassembler.cpp
View File

@ -167,9 +167,9 @@ EDDisassembler::EDDisassembler(CPUKey &key) :
if (!Tgt)
return;
std::string CPU;
std::string featureString;
TargetMachine.reset(Tgt->createTargetMachine(tripleString,
TargetMachine.reset(Tgt->createTargetMachine(tripleString, CPU,
featureString));
const TargetRegisterInfo *registerInfo = TargetMachine->getRegisterInfo();

62
lib/MC/SubtargetFeature.cpp
View File

@ -63,6 +63,9 @@ static inline std::string PrependFlag(const std::string &Feature,
/// Split - Splits a string of comma separated items in to a vector of strings.
///
static void Split(std::vector<std::string> &V, const std::string &S) {
if (S.empty())
return;
// Start at beginning of string.
size_t Pos = 0;
while (true) {
@ -88,7 +91,7 @@ static std::string Join(const std::vector<std::string> &V) {
std::string Result;
// If the vector is not empty
if (!V.empty()) {
// Start with the CPU feature
// Start with the first feature
Result = V[0];
// For each successive feature
for (size_t i = 1; i < V.size(); i++) {
@ -186,27 +189,6 @@ void SubtargetFeatures::setString(const std::string &Initial) {
Split(Features, LowercaseString(Initial));
}
/// setCPU - Set the CPU string. Replaces previous setting. Setting to ""
/// clears CPU.
void SubtargetFeatures::setCPU(const std::string &String) {
Features[0] = LowercaseString(String);
}
/// setCPUIfNone - Setting CPU string only if no string is set.
///
void SubtargetFeatures::setCPUIfNone(const std::string &String) {
if (Features[0].empty()) setCPU(String);
}
/// getCPU - Returns current CPU.
///
const std::string & SubtargetFeatures::getCPU() const {
return Features[0];
}
/// SetImpliedBits - For each feature that is (transitively) implied by this
/// feature, set it.
///
@ -245,12 +227,13 @@ void ClearImpliedBits(uint64_t &Bits, const SubtargetFeatureKV *FeatureEntry,
}
}
/// getBits - Get feature bits.
/// getFeatureBits - Get feature bits a CPU.
///
uint64_t SubtargetFeatures::getBits(const SubtargetFeatureKV *CPUTable,
size_t CPUTableSize,
const SubtargetFeatureKV *FeatureTable,
size_t FeatureTableSize) {
uint64_t SubtargetFeatures::getFeatureBits(const std::string &CPU,
const SubtargetFeatureKV *CPUTable,
size_t CPUTableSize,
const SubtargetFeatureKV *FeatureTable,
size_t FeatureTableSize) {
assert(CPUTable && "missing CPU table");
assert(FeatureTable && "missing features table");
#ifndef NDEBUG
@ -266,12 +249,11 @@ uint64_t SubtargetFeatures::getBits(const SubtargetFeatureKV *CPUTable,
uint64_t Bits = 0; // Resulting bits
// Check if help is needed
if (Features[0] == "help")
if (CPU == "help")
Help(CPUTable, CPUTableSize, FeatureTable, FeatureTableSize);
// Find CPU entry
const SubtargetFeatureKV *CPUEntry =
Find(Features[0], CPUTable, CPUTableSize);
const SubtargetFeatureKV *CPUEntry = Find(CPU, CPUTable, CPUTableSize);
// If there is a match
if (CPUEntry) {
// Set base feature bits
@ -284,12 +266,12 @@ uint64_t SubtargetFeatures::getBits(const SubtargetFeatureKV *CPUTable,
SetImpliedBits(Bits, &FE, FeatureTable, FeatureTableSize);
}
} else {
errs() << "'" << Features[0]
errs() << "'" << CPU
<< "' is not a recognized processor for this target"
<< " (ignoring processor)\n";
}
// Iterate through each feature
for (size_t i = 1; i < Features.size(); i++) {
for (size_t i = 0, E = Features.size(); i < E; i++) {
const std::string &Feature = Features[i];
// Check for help
@ -323,9 +305,10 @@ uint64_t SubtargetFeatures::getBits(const SubtargetFeatureKV *CPUTable,
return Bits;
}
/// Get info pointer
void *SubtargetFeatures::getInfo(const SubtargetInfoKV *Table,
size_t TableSize) {
/// Get scheduling itinerary of a CPU.
void *SubtargetFeatures::getItinerary(const std::string &CPU,
const SubtargetInfoKV *Table,
size_t TableSize) {
assert(Table && "missing table");
#ifndef NDEBUG
for (size_t i = 1; i < TableSize; i++) {
@ -334,12 +317,12 @@ void *SubtargetFeatures::getInfo(const SubtargetInfoKV *Table,
#endif
// Find entry
const SubtargetInfoKV *Entry = Find(Features[0], Table, TableSize);
const SubtargetInfoKV *Entry = Find(CPU, Table, TableSize);
if (Entry) {
return Entry->Value;
} else {
errs() << "'" << Features[0]
errs() << "'" << CPU
<< "' is not a recognized processor for this target"
<< " (ignoring processor)\n";
return NULL;
@ -367,10 +350,7 @@ void SubtargetFeatures::dump() const {
/// subtarget. It would be better if we could encode this information
/// into the IR. See <rdar://5972456>.
///
void SubtargetFeatures::getDefaultSubtargetFeatures(const std::string &CPU,
const Triple& Triple) {
setCPU(CPU);
void SubtargetFeatures::getDefaultSubtargetFeatures(const Triple& Triple) {
if (Triple.getVendor() == Triple::Apple) {
if (Triple.getArch() == Triple::ppc) {
// powerpc-apple-*

26
lib/Target/ARM/ARMSubtarget.cpp
View File

@ -30,8 +30,8 @@ static cl::opt<bool>
StrictAlign("arm-strict-align", cl::Hidden,
cl::desc("Disallow all unaligned memory accesses"));
ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &FS,
bool isT)
ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS, bool isT)
: ARMArchVersion(V4)
, ARMProcFamily(Others)
, ARMFPUType(None)
@ -56,7 +56,7 @@ ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &FS,
, FPOnlySP(false)
, AllowsUnalignedMem(false)
, stackAlignment(4)
, CPUString("generic")
, CPUString(CPU)
, TargetTriple(TT)
, TargetABI(ARM_ABI_APCS) {
// Determine default and user specified characteristics
@ -64,9 +64,11 @@ ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &FS,
// When no arch is specified either by CPU or by attributes, make the default
// ARMv4T.
const char *ARMArchFeature = "";
if (CPUString.empty())
CPUString = "generic";
if (CPUString == "generic" && (FS.empty() || FS == "generic")) {
ARMArchVersion = V4T;
ARMArchFeature = ",+v4t";
ARMArchFeature = "+v4t";
}
// Set the boolean corresponding to the current target triple, or the default
@ -85,29 +87,29 @@ ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &FS,
unsigned SubVer = TT[Idx];
if (SubVer >= '7' && SubVer <= '9') {
ARMArchVersion = V7A;
ARMArchFeature = ",+v7a";
ARMArchFeature = "+v7a";
if (Len >= Idx+2 && TT[Idx+1] == 'm') {
ARMArchVersion = V7M;
ARMArchFeature = ",+v7m";
ARMArchFeature = "+v7m";
}
} else if (SubVer == '6') {
ARMArchVersion = V6;
ARMArchFeature = ",+v6";
ARMArchFeature = "+v6";
if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == '2') {
ARMArchVersion = V6T2;
ARMArchFeature = ",+v6t2";
ARMArchFeature = "+v6t2";
}
} else if (SubVer == '5') {
ARMArchVersion = V5T;
ARMArchFeature = ",+v5t";
ARMArchFeature = "+v5t";
if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == 'e') {
ARMArchVersion = V5TE;
ARMArchFeature = ",+v5te";
ARMArchFeature = "+v5te";
}
} else if (SubVer == '4') {
if (Len >= Idx+2 && TT[Idx+1] == 't') {
ARMArchVersion = V4T;
ARMArchFeature = ",+v4t";
ARMArchFeature = "+v4t";
} else {
ARMArchVersion = V4;
ARMArchFeature = "";
@ -129,7 +131,7 @@ ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &FS,
FSWithArch = std::string(ARMArchFeature) + FS;
else
FSWithArch = FS;
CPUString = ParseSubtargetFeatures(FSWithArch, CPUString);
ParseSubtargetFeatures(FSWithArch, CPUString);
// After parsing Itineraries, set ItinData.IssueWidth.
computeIssueWidth();

6
lib/Target/ARM/ARMSubtarget.h
View File

@ -153,7 +153,8 @@ protected:
/// This constructor initializes the data members to match that
/// of the specified triple.
///
ARMSubtarget(const std::string &TT, const std::string &FS, bool isThumb);
ARMSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS, bool isThumb);
/// getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size
/// that still makes it profitable to inline the call.
@ -164,8 +165,7 @@ protected:
}
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
std::string ParseSubtargetFeatures(const std::string &FS,
const std::string &CPU);
void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
void computeIssueWidth();

9
lib/Target/ARM/ARMTargetMachine.cpp
View File

@ -78,10 +78,11 @@ extern "C" void LLVMInitializeARMTarget() {
///
ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T,
const std::string &TT,
const std::string &CPU,
const std::string &FS,
bool isThumb)
: LLVMTargetMachine(T, TT),
Subtarget(TT, FS, isThumb),
Subtarget(TT, CPU, FS, isThumb),
JITInfo(),
InstrItins(Subtarget.getInstrItineraryData()) {
DefRelocModel = getRelocationModel();
@ -92,8 +93,9 @@ ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T,
}
ARMTargetMachine::ARMTargetMachine(const Target &T, const std::string &TT,
const std::string &CPU,
const std::string &FS)
: ARMBaseTargetMachine(T, TT, FS, false), InstrInfo(Subtarget),
: ARMBaseTargetMachine(T, TT, CPU, FS, false), InstrInfo(Subtarget),
DataLayout(Subtarget.isAPCS_ABI() ?
std::string("e-p:32:32-f64:32:64-i64:32:64-"
"v128:32:128-v64:32:64-n32") :
@ -109,8 +111,9 @@ ARMTargetMachine::ARMTargetMachine(const Target &T, const std::string &TT,
}
ThumbTargetMachine::ThumbTargetMachine(const Target &T, const std::string &TT,
const std::string &CPU,
const std::string &FS)
: ARMBaseTargetMachine(T, TT, FS, true),
: ARMBaseTargetMachine(T, TT, CPU, FS, true),
InstrInfo(Subtarget.hasThumb2()
? ((ARMBaseInstrInfo*)new Thumb2InstrInfo(Subtarget))
: ((ARMBaseInstrInfo*)new Thumb1InstrInfo(Subtarget))),

7
lib/Target/ARM/ARMTargetMachine.h
View File

@ -41,7 +41,8 @@ private:
public:
ARMBaseTargetMachine(const Target &T, const std::string &TT,
const std::string &FS, bool isThumb);
const std::string &CPU, const std::string &FS,
bool isThumb);
virtual ARMJITInfo *getJITInfo() { return &JITInfo; }
virtual const ARMSubtarget *getSubtargetImpl() const { return &Subtarget; }
@ -70,7 +71,7 @@ class ARMTargetMachine : public ARMBaseTargetMachine {
ARMFrameLowering FrameLowering;
public:
ARMTargetMachine(const Target &T, const std::string &TT,
const std::string &FS);
const std::string &CPU, const std::string &FS);
virtual const ARMRegisterInfo *getRegisterInfo() const {
return &InstrInfo.getRegisterInfo();
@ -109,7 +110,7 @@ class ThumbTargetMachine : public ARMBaseTargetMachine {
OwningPtr<ARMFrameLowering> FrameLowering;
public:
ThumbTargetMachine(const Target &T, const std::string &TT,
const std::string &FS);
const std::string &CPU, const std::string &FS);
/// returns either Thumb1RegisterInfo or Thumb2RegisterInfo
virtual const ARMBaseRegisterInfo *getRegisterInfo() const {

6
lib/Target/ARM/AsmParser/ARMAsmLexer.cpp
View File

@ -87,8 +87,9 @@ public:
: ARMBaseAsmLexer(T, MAI) {
std::string tripleString("arm-unknown-unknown");
std::string featureString;
std::string CPU;
OwningPtr<const TargetMachine>
targetMachine(T.createTargetMachine(tripleString, featureString));
targetMachine(T.createTargetMachine(tripleString, CPU, featureString));
InitRegisterMap(targetMachine->getRegisterInfo());
}
};
@ -99,8 +100,9 @@ public:
: ARMBaseAsmLexer(T, MAI) {
std::string tripleString("thumb-unknown-unknown");
std::string featureString;
std::string CPU;
OwningPtr<const TargetMachine>
targetMachine(T.createTargetMachine(tripleString, featureString));
targetMachine(T.createTargetMachine(tripleString, CPU, featureString));
InitRegisterMap(targetMachine->getRegisterInfo());
}
};

9
lib/Target/Alpha/AlphaSubtarget.cpp
View File

@ -16,10 +16,13 @@
#include "AlphaGenSubtarget.inc"
using namespace llvm;
AlphaSubtarget::AlphaSubtarget(const std::string &TT, const std::string &FS)
AlphaSubtarget::AlphaSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS)
: HasCT(false) {
std::string CPU = "generic";
std::string CPUName = CPU;
if (CPUName.empty())
CPUName = "generic";
// Parse features string.
ParseSubtargetFeatures(FS, CPU);
ParseSubtargetFeatures(FS, CPUName);
}

6
lib/Target/Alpha/AlphaSubtarget.h
View File

@ -31,12 +31,12 @@ public:
/// This constructor initializes the data members to match that
/// of the specified triple.
///
AlphaSubtarget(const std::string &TT, const std::string &FS);
AlphaSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS);
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
std::string ParseSubtargetFeatures(const std::string &FS,
const std::string &CPU);
void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
bool hasCT() const { return HasCT; }
};

3
lib/Target/Alpha/AlphaTargetMachine.cpp
View File

@ -25,11 +25,12 @@ extern "C" void LLVMInitializeAlphaTarget() {
}
AlphaTargetMachine::AlphaTargetMachine(const Target &T, const std::string &TT,
const std::string &CPU,
const std::string &FS)
: LLVMTargetMachine(T, TT),
DataLayout("e-f128:128:128-n64"),
FrameLowering(Subtarget),
Subtarget(TT, FS),
Subtarget(TT, CPU, FS),
TLInfo(*this),
TSInfo(*this) {
setRelocationModel(Reloc::PIC_);

2
lib/Target/Alpha/AlphaTargetMachine.h
View File

@ -37,7 +37,7 @@ class AlphaTargetMachine : public LLVMTargetMachine {
public:
AlphaTargetMachine(const Target &T, const std::string &TT,
const std::string &FS);
const std::string &CPU, const std::string &FS);
virtual const AlphaInstrInfo *getInstrInfo() const { return &InstrInfo; }
virtual const TargetFrameLowering *getFrameLowering() const {

7
lib/Target/Blackfin/BlackfinSubtarget.cpp
View File

@ -17,6 +17,7 @@
using namespace llvm;
BlackfinSubtarget::BlackfinSubtarget(const std::string &TT,
const std::string &CPU,
const std::string &FS)
: sdram(false),
icplb(false),
@ -30,7 +31,9 @@ BlackfinSubtarget::BlackfinSubtarget(const std::string &TT,
wa_killed_mmr(false),
wa_rets(false)
{
std::string CPU = "generic";
std::string CPUName = CPU;
if (CPUName.empty())
CPUName = "generic";
// Parse features string.
ParseSubtargetFeatures(FS, CPU);
ParseSubtargetFeatures(FS, CPUName);
}

5
lib/Target/Blackfin/BlackfinSubtarget.h
View File

@ -32,11 +32,12 @@ namespace llvm {
bool wa_killed_mmr;
bool wa_rets;
public:
BlackfinSubtarget(const std::string &TT, const std::string &FS);
BlackfinSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS);
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
std::string ParseSubtargetFeatures(const std::string &FS,
void ParseSubtargetFeatures(const std::string &FS,
const std::string &CPU);
};

3
lib/Target/Blackfin/BlackfinTargetMachine.cpp
View File

@ -26,10 +26,11 @@ extern "C" void LLVMInitializeBlackfinTarget() {
BlackfinTargetMachine::BlackfinTargetMachine(const Target &T,
const std::string &TT,
const std::string &CPU,
const std::string &FS)
: LLVMTargetMachine(T, TT),
DataLayout("e-p:32:32-i64:32-f64:32-n32"),
Subtarget(TT, FS),
Subtarget(TT, CPU, FS),
TLInfo(*this),
TSInfo(*this),
InstrInfo(Subtarget),

2
lib/Target/Blackfin/BlackfinTargetMachine.h
View File

@ -36,7 +36,7 @@ namespace llvm {
BlackfinIntrinsicInfo IntrinsicInfo;
public:
BlackfinTargetMachine(const Target &T, const std::string &TT,
const std::string &FS);
const std::string &CPU, const std::string &FS);
virtual const BlackfinInstrInfo *getInstrInfo() const { return &InstrInfo; }
virtual const TargetFrameLowering *getFrameLowering() const {

3
lib/Target/CBackend/CTargetMachine.h
View File

@ -20,7 +20,8 @@
namespace llvm {
struct CTargetMachine : public TargetMachine {
CTargetMachine(const Target &T, const std::string &TT, const std::string &FS)
CTargetMachine(const Target &T, const std::string &TT,
const std::string &CPU, const std::string &FS)
: TargetMachine(T) {}
virtual bool addPassesToEmitFile(PassManagerBase &PM,

3
lib/Target/CellSPU/SPUSubtarget.cpp
View File

@ -19,7 +19,8 @@
using namespace llvm;
SPUSubtarget::SPUSubtarget(const std::string &TT, const std::string &FS) :
SPUSubtarget::SPUSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS) :
StackAlignment(16),
ProcDirective(SPU::DEFAULT_PROC),
UseLargeMem(false)

6
lib/Target/CellSPU/SPUSubtarget.h
View File

@ -49,12 +49,12 @@ namespace llvm {
/// This constructor initializes the data members to match that
/// of the specified triple.
///
SPUSubtarget(const std::string &TT, const std::string &FS);
SPUSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS);
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
std::string ParseSubtargetFeatures(const std::string &FS,
const std::string &CPU);
void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
/// SetJITMode - This is called to inform the subtarget info that we are
/// producing code for the JIT.

4
lib/Target/CellSPU/SPUTargetMachine.cpp
View File

@ -35,9 +35,9 @@ SPUFrameLowering::getCalleeSaveSpillSlots(unsigned &NumEntries) const {
}
SPUTargetMachine::SPUTargetMachine(const Target &T, const std::string &TT,
const std::string &FS)
const std::string &CPU,const std::string &FS)
: LLVMTargetMachine(T, TT),
Subtarget(TT, FS),
Subtarget(TT, CPU, FS),
DataLayout(Subtarget.getTargetDataString()),
InstrInfo(*this),
FrameLowering(Subtarget),

2
lib/Target/CellSPU/SPUTargetMachine.h
View File

@ -39,7 +39,7 @@ class SPUTargetMachine : public LLVMTargetMachine {
InstrItineraryData InstrItins;
public:
SPUTargetMachine(const Target &T, const std::string &TT,
const std::string &FS);
const std::string &CPU, const std::string &FS);
/// Return the subtarget implementation object
virtual const SPUSubtarget *getSubtargetImpl() const {

2
lib/Target/CppBackend/CPPTargetMachine.h
View File

@ -23,7 +23,7 @@ class formatted_raw_ostream;
struct CPPTargetMachine : public TargetMachine {
CPPTargetMachine(const Target &T, const std::string &TT,
const std::string &FS)
const std::string &CPU, const std::string &FS)
: TargetMachine(T) {}
virtual bool addPassesToEmitFile(PassManagerBase &PM,

3
lib/Target/MBlaze/AsmParser/MBlazeAsmLexer.cpp
View File

@ -86,8 +86,9 @@ namespace {
: MBlazeBaseAsmLexer(T, MAI) {
std::string tripleString("mblaze-unknown-unknown");
std::string featureString;
std::string CPU;
OwningPtr<const TargetMachine>
targetMachine(T.createTargetMachine(tripleString, featureString));
targetMachine(T.createTargetMachine(tripleString, CPU, featureString));
InitRegisterMap(targetMachine->getRegisterInfo());
}
};

14
lib/Target/MBlaze/MBlazeSubtarget.cpp
View File

@ -18,18 +18,22 @@
#include "llvm/Support/CommandLine.h"
using namespace llvm;
MBlazeSubtarget::MBlazeSubtarget(const std::string &TT, const std::string &FS):
MBlazeSubtarget::MBlazeSubtarget(const std::string &TT,
const std::string &CPU,
const std::string &FS):
HasBarrel(false), HasDiv(false), HasMul(false), HasPatCmp(false),
HasFPU(false), HasMul64(false), HasSqrt(false)
{
// Parse features string.
std::string CPU = "mblaze";
CPU = ParseSubtargetFeatures(FS, CPU);
std::string CPUName = CPU;
if (CPUName.empty())
CPUName = "mblaze";
ParseSubtargetFeatures(FS, CPUName);
// Only use instruction scheduling if the selected CPU has an instruction
// itinerary (the default CPU is the only one that doesn't).
HasItin = CPU != "mblaze";
DEBUG(dbgs() << "CPU " << CPU << "(" << HasItin << ")\n");
HasItin = CPUName != "mblaze";
DEBUG(dbgs() << "CPU " << CPUName << "(" << HasItin << ")\n");
// Compute the issue width of the MBlaze itineraries
computeIssueWidth();

6
lib/Target/MBlaze/MBlazeSubtarget.h
View File

@ -38,12 +38,12 @@ public:
/// This constructor initializes the data members to match that
/// of the specified triple.
MBlazeSubtarget(const std::string &TT, const std::string &FS);
MBlazeSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS);
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
std::string ParseSubtargetFeatures(const std::string &FS,
const std::string &CPU);
void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
/// Compute the number of maximum number of issues per cycle for the
/// MBlaze scheduling itineraries.

4
lib/Target/MBlaze/MBlazeTargetMachine.cpp
View File

@ -80,9 +80,9 @@ extern "C" void LLVMInitializeMBlazeTarget() {
// an easier handling.
MBlazeTargetMachine::
MBlazeTargetMachine(const Target &T, const std::string &TT,
const std::string &FS):
const std::string &CPU, const std::string &FS):
LLVMTargetMachine(T, TT),
Subtarget(TT, FS),
Subtarget(TT, CPU, FS),
DataLayout("E-p:32:32:32-i8:8:8-i16:16:16"),
InstrInfo(*this),
FrameLowering(Subtarget),

2
lib/Target/MBlaze/MBlazeTargetMachine.h
View File

@ -42,7 +42,7 @@ namespace llvm {
public:
MBlazeTargetMachine(const Target &T, const std::string &TT,
const std::string &FS);
const std::string &CPU, const std::string &FS);
virtual const MBlazeInstrInfo *getInstrInfo() const
{ return &InstrInfo; }

4
lib/Target/MSP430/MSP430Subtarget.cpp
View File

@ -17,7 +17,9 @@
using namespace llvm;
MSP430Subtarget::MSP430Subtarget(const std::string &TT, const std::string &FS) {
MSP430Subtarget::MSP430Subtarget(const std::string &TT,
const std::string &CPUIgnored,
const std::string &FS) {
std::string CPU = "generic";
// Parse features string.

6
lib/Target/MSP430/MSP430Subtarget.h
View File

@ -26,12 +26,12 @@ public:
/// This constructor initializes the data members to match that
/// of the specified triple.
///
MSP430Subtarget(const std::string &TT, const std::string &FS);
MSP430Subtarget(const std::string &TT, const std::string &CPU,
const std::string &FS);
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
std::string ParseSubtargetFeatures(const std::string &FS,
const std::string &CPU);
void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
};
} // End llvm namespace

3
lib/Target/MSP430/MSP430TargetMachine.cpp
View File

@ -28,9 +28,10 @@ extern "C" void LLVMInitializeMSP430Target() {
MSP430TargetMachine::MSP430TargetMachine(const Target &T,
const std::string &TT,
const std::string &CPU,
const std::string &FS)
: LLVMTargetMachine(T, TT),
Subtarget(TT, FS),
Subtarget(TT, CPU, FS),
// FIXME: Check TargetData string.
DataLayout("e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"),
InstrInfo(*this), TLInfo(*this), TSInfo(*this),

2
lib/Target/MSP430/MSP430TargetMachine.h
View File

@ -39,7 +39,7 @@ class MSP430TargetMachine : public LLVMTargetMachine {
public:
MSP430TargetMachine(const Target &T, const std::string &TT,
const std::string &FS);
const std::string &CPU, const std::string &FS);
virtual const TargetFrameLowering *getFrameLowering() const {
return &FrameLowering;

10
lib/Target/Mips/MipsSubtarget.cpp
View File

@ -16,18 +16,20 @@
#include "MipsGenSubtarget.inc"
using namespace llvm;
MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &FS,
bool little) :
MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS, bool little) :
MipsArchVersion(Mips1), MipsABI(O32), IsLittle(little), IsSingleFloat(false),
IsFP64bit(false), IsGP64bit(false), HasVFPU(false), IsLinux(true),
HasSEInReg(false), HasCondMov(false), HasMulDivAdd(false), HasMinMax(false),
HasSwap(false), HasBitCount(false)
{
std::string CPU = "mips1";
std::string CPUName = CPU;
if (CPUName.empty())
CPUName = "mips1";
MipsArchVersion = Mips1;
// Parse features string.
ParseSubtargetFeatures(FS, CPU);
ParseSubtargetFeatures(FS, CPUName);
// Is the target system Linux ?
if (TT.find("linux") == std::string::npos)

6
lib/Target/Mips/MipsSubtarget.h
View File

@ -91,12 +91,12 @@ public:
/// This constructor initializes the data members to match that
/// of the specified triple.
MipsSubtarget(const std::string &TT, const std::string &FS, bool little);
MipsSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS, bool little);
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
std::string ParseSubtargetFeatures(const std::string &FS,
const std::string &CPU);
void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
bool isMips1() const { return MipsArchVersion == Mips1; }
bool isMips32() const { return MipsArchVersion >= Mips32; }

9
lib/Target/Mips/MipsTargetMachine.cpp
View File

@ -34,10 +34,11 @@ extern "C" void LLVMInitializeMipsTarget() {
// an easier handling.
// Using CodeModel::Large enables different CALL behavior.
MipsTargetMachine::
MipsTargetMachine(const Target &T, const std::string &TT, const std::string &FS,
MipsTargetMachine(const Target &T, const std::string &TT,
const std::string &CPU, const std::string &FS,
bool isLittle=false):
LLVMTargetMachine(T, TT),
Subtarget(TT, FS, isLittle),
Subtarget(TT, CPU, FS, isLittle),
DataLayout(isLittle ?
std::string("e-p:32:32:32-i8:8:32-i16:16:32-i64:64:64-n32") :
std::string("E-p:32:32:32-i8:8:32-i16:16:32-i64:64:64-n32")),
@ -55,8 +56,8 @@ MipsTargetMachine(const Target &T, const std::string &TT, const std::string &FS,
MipselTargetMachine::
MipselTargetMachine(const Target &T, const std::string &TT,
const std::string &FS) :
MipsTargetMachine(T, TT, FS, true) {}
const std::string &CPU, const std::string &FS) :
MipsTargetMachine(T, TT, CPU, FS, true) {}
// Install an instruction selector pass using
// the ISelDag to gen Mips code.

5
lib/Target/Mips/MipsTargetMachine.h
View File

@ -35,7 +35,8 @@ namespace llvm {
MipsSelectionDAGInfo TSInfo;
public:
MipsTargetMachine(const Target &T, const std::string &TT,
const std::string &FS, bool isLittle);
const std::string &CPU, const std::string &FS,
bool isLittle);
virtual const MipsInstrInfo *getInstrInfo() const
{ return &InstrInfo; }
@ -73,7 +74,7 @@ namespace llvm {
class MipselTargetMachine : public MipsTargetMachine {
public:
MipselTargetMachine(const Target &T, const std::string &TT,
const std::string &FS);
const std::string &CPU, const std::string &FS);
};
} // End llvm namespace

8
lib/Target/PTX/PTXSubtarget.cpp
View File

@ -16,14 +16,16 @@
using namespace llvm;
PTXSubtarget::PTXSubtarget(const std::string &TT, const std::string &FS,
bool is64Bit)
PTXSubtarget::PTXSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS, bool is64Bit)
: PTXTarget(PTX_COMPUTE_1_0),
PTXVersion(PTX_VERSION_2_0),
SupportsDouble(false),
SupportsFMA(true),
Is64Bit(is64Bit) {
std::string TARGET = "generic";
std::string TARGET = CPU;
if (TARGET.empty())
TARGET = "generic";
ParseSubtargetFeatures(FS, TARGET);
}

7
lib/Target/PTX/PTXSubtarget.h
View File

@ -74,7 +74,8 @@ namespace llvm {
public:
PTXSubtarget(const std::string &TT, const std::string &FS, bool is64Bit);
PTXSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS, bool is64Bit);
// Target architecture accessors
std::string getTargetString() const;
@ -108,8 +109,8 @@ namespace llvm {
(PTXTarget >= PTX_COMPUTE_2_0 && PTXTarget < PTX_LAST_COMPUTE);
}
std::string ParseSubtargetFeatures(const std::string &FS,
const std::string &CPU);
void ParseSubtargetFeatures(const std::string &FS,
const std::string &CPU);
}; // class PTXSubtarget
} // namespace llvm

9
lib/Target/PTX/PTXTargetMachine.cpp
View File

@ -52,11 +52,12 @@ namespace {
// DataLayout and FrameLowering are filled with dummy data
PTXTargetMachine::PTXTargetMachine(const Target &T,
const std::string &TT,
const std::string &CPU,
const std::string &FS,
bool is64Bit)
: LLVMTargetMachine(T, TT),
DataLayout(is64Bit ? DataLayout64 : DataLayout32),
Subtarget(TT, FS, is64Bit),
Subtarget(TT, CPU, FS, is64Bit),
FrameLowering(Subtarget),
InstrInfo(*this),
TLInfo(*this) {
@ -64,14 +65,16 @@ PTXTargetMachine::PTXTargetMachine(const Target &T,
PTX32TargetMachine::PTX32TargetMachine(const Target &T,
const std::string& TT,
const std::string& CPU,
const std::string& FS)
: PTXTargetMachine(T, TT, FS, false) {
: PTXTargetMachine(T, TT, CPU, FS, false) {
}
PTX64TargetMachine::PTX64TargetMachine(const Target &T,
const std::string& TT,
const std::string& CPU,
const std::string& FS)
: PTXTargetMachine(T, TT, FS, true) {
: PTXTargetMachine(T, TT, CPU, FS, true) {
}
bool PTXTargetMachine::addInstSelector(PassManagerBase &PM,

7
lib/Target/PTX/PTXTargetMachine.h
View File

@ -33,7 +33,8 @@ class PTXTargetMachine : public LLVMTargetMachine {
public:
PTXTargetMachine(const Target &T, const std::string &TT,
const std::string &FS, bool is64Bit);
const std::string &CPU, const std::string &FS,
bool is64Bit);
virtual const TargetData *getTargetData() const { return &DataLayout; }
@ -61,14 +62,14 @@ class PTX32TargetMachine : public PTXTargetMachine {
public:
PTX32TargetMachine(const Target &T, const std::string &TT,
const std::string& FS);
const std::string& CPU, const std::string& FS);
}; // class PTX32TargetMachine
class PTX64TargetMachine : public PTXTargetMachine {
public:
PTX64TargetMachine(const Target &T, const std::string &TT,
const std::string& FS);
const std::string& CPU, const std::string& FS);
}; // class PTX32TargetMachine
} // namespace llvm

13
lib/Target/PowerPC/PPCSubtarget.cpp
View File

@ -57,8 +57,8 @@ static const char *GetCurrentPowerPCCPU() {
#endif
PPCSubtarget::PPCSubtarget(const std::string &TT, const std::string &FS,
bool is64Bit)
PPCSubtarget::PPCSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS, bool is64Bit)
: StackAlignment(16)
, DarwinDirective(PPC::DIR_NONE)
, IsGigaProcessor(false)
@ -73,13 +73,16 @@ PPCSubtarget::PPCSubtarget(const std::string &TT, const std::string &FS,
, TargetTriple(TT) {
// Determine default and user specified characteristics
std::string CPU = "generic";
std::string CPUName = CPU;
if (CPUName.empty())
CPUName = "generic";
#if defined(__APPLE__)
CPU = GetCurrentPowerPCCPU();
if (CPUName == "generic")
CPUName = GetCurrentPowerPCCPU();
#endif
// Parse features string.
ParseSubtargetFeatures(FS, CPU);
ParseSubtargetFeatures(FS, CPUName);
// If we are generating code for ppc64, verify that options make sense.
if (is64Bit) {

6
lib/Target/PowerPC/PPCSubtarget.h
View File

@ -72,12 +72,12 @@ public:
/// This constructor initializes the data members to match that
/// of the specified triple.
///
PPCSubtarget(const std::string &TT, const std::string &FS, bool is64Bit);
PPCSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS, bool is64Bit);
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
std::string ParseSubtargetFeatures(const std::string &FS,
const std::string &CPU);
void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
/// SetJITMode - This is called to inform the subtarget info that we are

9
lib/Target/PowerPC/PPCTargetMachine.cpp
View File

@ -67,9 +67,10 @@ extern "C" void LLVMInitializePowerPCTarget() {
PPCTargetMachine::PPCTargetMachine(const Target &T, const std::string &TT,
const std::string &CPU,
const std::string &FS, bool is64Bit)
: LLVMTargetMachine(T, TT),
Subtarget(TT, FS, is64Bit),
Subtarget(TT, CPU, FS, is64Bit),
DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
FrameLowering(Subtarget), JITInfo(*this, is64Bit),
TLInfo(*this), TSInfo(*this),
@ -88,14 +89,16 @@ PPCTargetMachine::PPCTargetMachine(const Target &T, const std::string &TT,
bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; }
PPC32TargetMachine::PPC32TargetMachine(const Target &T, const std::string &TT,
const std::string &CPU,
const std::string &FS)
: PPCTargetMachine(T, TT, FS, false) {
: PPCTargetMachine(T, TT, CPU, FS, false) {
}
PPC64TargetMachine::PPC64TargetMachine(const Target &T, const std::string &TT,
const std::string &CPU,
const std::string &FS)
: PPCTargetMachine(T, TT, FS, true) {
: PPCTargetMachine(T, TT, CPU, FS, true) {
}

7
lib/Target/PowerPC/PPCTargetMachine.h
View File

@ -41,7 +41,8 @@ class PPCTargetMachine : public LLVMTargetMachine {
public:
PPCTargetMachine(const Target &T, const std::string &TT,
const std::string &FS, bool is64Bit);
const std::string &CPU, const std::string &FS,
bool is64Bit);
virtual const PPCInstrInfo *getInstrInfo() const { return &InstrInfo; }
virtual const PPCFrameLowering *getFrameLowering() const {
@ -77,7 +78,7 @@ public:
class PPC32TargetMachine : public PPCTargetMachine {
public:
PPC32TargetMachine(const Target &T, const std::string &TT,
const std::string &FS);
const std::string &CPU, const std::string &FS);
};
/// PPC64TargetMachine - PowerPC 64-bit target machine.
@ -85,7 +86,7 @@ public:
class PPC64TargetMachine : public PPCTargetMachine {
public:
PPC64TargetMachine(const Target &T, const std::string &TT,
const std::string &FS);
const std::string &CPU, const std::string &FS);
};
} // end namespace llvm

17
lib/Target/Sparc/SparcSubtarget.cpp
View File

@ -15,20 +15,23 @@
#include "SparcGenSubtarget.inc"
using namespace llvm;
SparcSubtarget::SparcSubtarget(const std::string &TT, const std::string &FS,
bool is64Bit) :
SparcSubtarget::SparcSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS, bool is64Bit) :
IsV9(false),
V8DeprecatedInsts(false),
IsVIS(false),
Is64Bit(is64Bit) {
// Determine default and user specified characteristics
const char *CPU = "v8";
if (is64Bit) {
CPU = "v9";
IsV9 = true;
std::string CPUName = CPU;
if (CPUName.empty()) {
if (is64Bit)
CPUName = "v9";
else
CPUName = "v8";
}
IsV9 = CPUName == "v9";
// Parse features string.
ParseSubtargetFeatures(FS, CPU);
ParseSubtargetFeatures(FS, CPUName);
}

6
lib/Target/Sparc/SparcSubtarget.h
View File

@ -26,7 +26,8 @@ class SparcSubtarget : public TargetSubtarget {
bool Is64Bit;
public:
SparcSubtarget(const std::string &TT, const std::string &FS, bool is64bit);
SparcSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS, bool is64bit);
bool isV9() const { return IsV9; }
bool isVIS() const { return IsVIS; }
@ -34,8 +35,7 @@ public:
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
std::string ParseSubtargetFeatures(const std::string &FS,
const std::string &CPU);
void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
bool is64Bit() const { return Is64Bit; }
std::string getDataLayout() const {

9
lib/Target/Sparc/SparcTargetMachine.cpp
View File

@ -30,9 +30,10 @@ extern "C" void LLVMInitializeSparcTarget() {
/// SparcTargetMachine ctor - Create an ILP32 architecture model
///
SparcTargetMachine::SparcTargetMachine(const Target &T, const std::string &TT,
const std::string &CPU,
const std::string &FS, bool is64bit)
: LLVMTargetMachine(T, TT),
Subtarget(TT, FS, is64bit),
Subtarget(TT, CPU, FS, is64bit),
DataLayout(Subtarget.getDataLayout()),
TLInfo(*this), TSInfo(*this), InstrInfo(Subtarget),
FrameLowering(Subtarget) {
@ -56,12 +57,14 @@ bool SparcTargetMachine::addPreEmitPass(PassManagerBase &PM,
SparcV8TargetMachine::SparcV8TargetMachine(const Target &T,
const std::string &TT,
const std::string &CPU,
const std::string &FS)
: SparcTargetMachine(T, TT, FS, false) {
: SparcTargetMachine(T, TT, CPU, FS, false) {
}
SparcV9TargetMachine::SparcV9TargetMachine(const Target &T,
const std::string &TT,
const std::string &CPU,
const std::string &FS)
: SparcTargetMachine(T, TT, FS, true) {
: SparcTargetMachine(T, TT, CPU, FS, true) {
}

7
lib/Target/Sparc/SparcTargetMachine.h
View File

@ -34,7 +34,8 @@ class SparcTargetMachine : public LLVMTargetMachine {
SparcFrameLowering FrameLowering;
public:
SparcTargetMachine(const Target &T, const std::string &TT,
const std::string &FS, bool is64bit);
const std::string &CPU, const std::string &FS,
bool is64bit);
virtual const SparcInstrInfo *getInstrInfo() const { return &InstrInfo; }
virtual const TargetFrameLowering *getFrameLowering() const {
@ -62,7 +63,7 @@ public:
class SparcV8TargetMachine : public SparcTargetMachine {
public:
SparcV8TargetMachine(const Target &T, const std::string &TT,
const std::string &FS);
const std::string &CPU, const std::string &FS);
};
/// SparcV9TargetMachine - Sparc 64-bit target machine
@ -70,7 +71,7 @@ public:
class SparcV9TargetMachine : public SparcTargetMachine {
public:
SparcV9TargetMachine(const Target &T, const std::string &TT,
const std::string &FS);
const std::string &CPU, const std::string &FS);
};
} // end namespace llvm

7
lib/Target/SystemZ/SystemZSubtarget.cpp
View File

@ -20,12 +20,15 @@
using namespace llvm;
SystemZSubtarget::SystemZSubtarget(const std::string &TT,
const std::string &CPU,
const std::string &FS):
HasZ10Insts(false) {
std::string CPU = "z9";
std::string CPUName = CPU;
if (CPUName.empty())
CPUName = "z9";
// Parse features string.
ParseSubtargetFeatures(FS, CPU);
ParseSubtargetFeatures(FS, CPUName);
}
/// True if accessing the GV requires an extra load.

6
lib/Target/SystemZ/SystemZSubtarget.h
View File

@ -28,12 +28,12 @@ public:
/// This constructor initializes the data members to match that
/// of the specified triple.
///
SystemZSubtarget(const std::string &TT, const std::string &FS);
SystemZSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS);
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
std::string ParseSubtargetFeatures(const std::string &FS,
const std::string &CPU);
void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
bool isZ10() const { return HasZ10Insts; }

3
lib/Target/SystemZ/SystemZTargetMachine.cpp
View File

@ -24,9 +24,10 @@ extern "C" void LLVMInitializeSystemZTarget() {
///
SystemZTargetMachine::SystemZTargetMachine(const Target &T,
const std::string &TT,
const std::string &CPU,
const std::string &FS)
: LLVMTargetMachine(T, TT),
Subtarget(TT, FS),
Subtarget(TT, CPU, FS),
DataLayout("E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32"
"-f64:64:64-f128:128:128-a0:16:16-n32:64"),
InstrInfo(*this), TLInfo(*this), TSInfo(*this),

2
lib/Target/SystemZ/SystemZTargetMachine.h
View File

@ -38,7 +38,7 @@ class SystemZTargetMachine : public LLVMTargetMachine {
SystemZFrameLowering FrameLowering;
public:
SystemZTargetMachine(const Target &T, const std::string &TT,
const std::string &FS);
const std::string &CPU, const std::string &FS);
virtual const TargetFrameLowering *getFrameLowering() const {
return &FrameLowering;

11
lib/Target/X86/X86Subtarget.cpp
View File

@ -284,7 +284,8 @@ void X86Subtarget::AutoDetectSubtargetFeatures() {
}
}
X86Subtarget::X86Subtarget(const std::string &TT, const std::string &FS,
X86Subtarget::X86Subtarget(const std::string &TT, const std::string &CPU,
const std::string &FS,
bool is64Bit, unsigned StackAlignOverride)
: PICStyle(PICStyles::None)
, X86SSELevel(NoMMXSSE)
@ -308,10 +309,12 @@ X86Subtarget::X86Subtarget(const std::string &TT, const std::string &FS,
, Is64Bit(is64Bit) {
// Determine default and user specified characteristics
if (!FS.empty()) {
if (!CPU.empty() || !FS.empty()) {
// If feature string is not empty, parse features string.
std::string CPU = sys::getHostCPUName();
ParseSubtargetFeatures(FS, CPU);
std::string CPUName = CPU;
if (CPUName.empty())
CPUName = sys::getHostCPUName();
ParseSubtargetFeatures(FS, CPUName);
// All X86-64 CPUs also have SSE2, however user might request no SSE via
// -mattr, so don't force SSELevel here.
if (HasAVX)

6
lib/Target/X86/X86Subtarget.h
View File

@ -117,7 +117,8 @@ public:
/// This constructor initializes the data members to match that
/// of the specified triple.
///
X86Subtarget(const std::string &TT, const std::string &FS, bool is64Bit,
X86Subtarget(const std::string &TT, const std::string &CPU,
const std::string &FS, bool is64Bit,
unsigned StackAlignOverride);
/// getStackAlignment - Returns the minimum alignment known to hold of the
@ -131,8 +132,7 @@ public:
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
std::string ParseSubtargetFeatures(const std::string &FS,
const std::string &CPU);
void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
/// AutoDetectSubtargetFeatures - Auto-detect CPU features using CPUID
/// instruction.

9
lib/Target/X86/X86TargetMachine.cpp
View File

@ -87,8 +87,9 @@ extern "C" void LLVMInitializeX86Target() {
X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT,
const std::string &CPU,
const std::string &FS)
: X86TargetMachine(T, TT, FS, false),
: X86TargetMachine(T, TT, CPU, FS, false),
DataLayout(getSubtargetImpl()->isTargetDarwin() ?
"e-p:32:32-f64:32:64-i64:32:64-f80:128:128-f128:128:128-n8:16:32" :
(getSubtargetImpl()->isTargetCygMing() ||
@ -103,8 +104,9 @@ X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT,
X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT,
const std::string &CPU,
const std::string &FS)
: X86TargetMachine(T, TT, FS, true),
: X86TargetMachine(T, TT, CPU, FS, true),
DataLayout("e-p:64:64-s:64-f64:64:64-i64:64:64-f80:128:128-f128:128:128-n8:16:32:64"),
InstrInfo(*this),
TSInfo(*this),
@ -115,9 +117,10 @@ X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT,
/// X86TargetMachine ctor - Create an X86 target.
///
X86TargetMachine::X86TargetMachine(const Target &T, const std::string &TT,
const std::string &CPU,
const std::string &FS, bool is64Bit)
: LLVMTargetMachine(T, TT),
Subtarget(TT, FS, is64Bit, StackAlignmentOverride),
Subtarget(TT, CPU, FS, is64Bit, StackAlignmentOverride),
FrameLowering(*this, Subtarget),
ELFWriterInfo(is64Bit, true) {
DefRelocModel = getRelocationModel();

7
lib/Target/X86/X86TargetMachine.h
View File

@ -43,7 +43,8 @@ private:
public:
X86TargetMachine(const Target &T, const std::string &TT,
const std::string &FS, bool is64Bit);
const std::string &CPU, const std::string &FS,
bool is64Bit);
virtual const X86InstrInfo *getInstrInfo() const {
llvm_unreachable("getInstrInfo not implemented");
@ -87,7 +88,7 @@ class X86_32TargetMachine : public X86TargetMachine {
X86JITInfo JITInfo;
public:
X86_32TargetMachine(const Target &T, const std::string &M,
const std::string &FS);
const std::string &CPU, const std::string &FS);
virtual const TargetData *getTargetData() const { return &DataLayout; }
virtual const X86TargetLowering *getTargetLowering() const {
return &TLInfo;
@ -113,7 +114,7 @@ class X86_64TargetMachine : public X86TargetMachine {
X86JITInfo JITInfo;
public:
X86_64TargetMachine(const Target &T, const std::string &TT,
const std::string &FS);
const std::string &CPU, const std::string &FS);
virtual const TargetData *getTargetData() const { return &DataLayout; }
virtual const X86TargetLowering *getTargetLowering() const {
return &TLInfo;

3
lib/Target/XCore/XCoreSubtarget.cpp
View File

@ -15,6 +15,7 @@
#include "XCore.h"
using namespace llvm;
XCoreSubtarget::XCoreSubtarget(const std::string &TT, const std::string &FS)
XCoreSubtarget::XCoreSubtarget(const std::string &TT,
const std::string &CPU, const std::string &FS)
{
}

6
lib/Target/XCore/XCoreSubtarget.h
View File

@ -27,12 +27,12 @@ public:
/// This constructor initializes the data members to match that
/// of the specified triple.
///
XCoreSubtarget(const std::string &TT, const std::string &FS);
XCoreSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS);
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
std::string ParseSubtargetFeatures(const std::string &FS,
const std::string &CPU);
void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
};
} // End llvm namespace

3
lib/Target/XCore/XCoreTargetMachine.cpp
View File

@ -21,9 +21,10 @@ using namespace llvm;
/// XCoreTargetMachine ctor - Create an ILP32 architecture model
///
XCoreTargetMachine::XCoreTargetMachine(const Target &T, const std::string &TT,
const std::string &CPU,
const std::string &FS)
: LLVMTargetMachine(T, TT),
Subtarget(TT, FS),
Subtarget(TT, CPU, FS),
DataLayout("e-p:32:32:32-a0:0:32-f32:32:32-f64:32:32-i1:8:32-i8:8:32-"
"i16:16:32-i32:32:32-i64:32:32-n32"),
InstrInfo(),

2
lib/Target/XCore/XCoreTargetMachine.h
View File

@ -33,7 +33,7 @@ class XCoreTargetMachine : public LLVMTargetMachine {
XCoreSelectionDAGInfo TSInfo;
public:
XCoreTargetMachine(const Target &T, const std::string &TT,
const std::string &FS);
const std::string &CPU, const std::string &FS);
virtual const XCoreInstrInfo *getInstrInfo() const { return &InstrInfo; }
virtual const XCoreFrameLowering *getFrameLowering() const {

6
tools/llc/llc.cpp
View File

@ -261,16 +261,16 @@ int main(int argc, char **argv) {
// Package up features to be passed to target/subtarget
std::string FeaturesStr;
if (MCPU.size() || MAttrs.size()) {
if (MAttrs.size()) {
SubtargetFeatures Features;
Features.setCPU(MCPU);
for (unsigned i = 0; i != MAttrs.size(); ++i)
Features.AddFeature(MAttrs[i]);
FeaturesStr = Features.getString();
}
std::auto_ptr<TargetMachine>
target(TheTarget->createTargetMachine(TheTriple.getTriple(), FeaturesStr));
target(TheTarget->createTargetMachine(TheTriple.getTriple(), MCPU,
FeaturesStr));
assert(target.get() && "Could not allocate target machine!");
TargetMachine &Target = *target.get();

12
tools/llvm-mc/llvm-mc.cpp
View File

@ -309,17 +309,13 @@ static int AssembleInput(const char *ProgName) {
// Package up features to be passed to target/subtarget
std::string FeaturesStr;
if (MCPU.size()) {
SubtargetFeatures Features;
Features.setCPU(MCPU);
FeaturesStr = Features.getString();
}
// FIXME: We shouldn't need to do this (and link in codegen).
// When we split this out, we should do it in a way that makes
// it straightforward to switch subtargets on the fly (.e.g,
// the .cpu and .code16 directives).
OwningPtr<TargetMachine> TM(TheTarget->createTargetMachine(TripleName,
MCPU,
FeaturesStr));
if (!TM) {
@ -415,17 +411,13 @@ static int DisassembleInput(const char *ProgName, bool Enhanced) {
} else {
// Package up features to be passed to target/subtarget
std::string FeaturesStr;
if (MCPU.size()) {
SubtargetFeatures Features;
Features.setCPU(MCPU);
FeaturesStr = Features.getString();
}
// FIXME: We shouldn't need to do this (and link in codegen).
// When we split this out, we should do it in a way that makes
// it straightforward to switch subtargets on the fly (.e.g,
// the .cpu and .code16 directives).
OwningPtr<TargetMachine> TM(TheTarget->createTargetMachine(TripleName,
MCPU,
FeaturesStr));
if (!TM) {

3
tools/llvm-objdump/llvm-objdump.cpp
View File

@ -201,7 +201,8 @@ static void DisassembleInput(const StringRef &Filename) {
// it straightforward to switch subtargets on the fly (.e.g,
// the .cpu and .code16 directives).
std::string FeaturesStr;
OwningPtr<TargetMachine> TM(TheTarget->createTargetMachine(TripleName,
std::string CPU;
OwningPtr<TargetMachine> TM(TheTarget->createTargetMachine(TripleName, CPU,
FeaturesStr));
if (!TM) {
errs() << "error: could not create target for triple " << TripleName << "\n";

4
tools/lto/LTOCodeGenerator.cpp
View File

@ -262,9 +262,9 @@ bool LTOCodeGenerator::determineTarget(std::string& errMsg)
// construct LTModule, hand over ownership of module and target
SubtargetFeatures Features;
Features.getDefaultSubtargetFeatures(_mCpu, llvm::Triple(Triple));
Features.getDefaultSubtargetFeatures(llvm::Triple(Triple));
std::string FeatureStr = Features.getString();
_target = march->createTargetMachine(Triple, FeatureStr);
_target = march->createTargetMachine(Triple, _mCpu, FeatureStr);
}
return false;
}

5
tools/lto/LTOModule.cpp
View File

@ -157,9 +157,10 @@ LTOModule *LTOModule::makeLTOModule(MemoryBuffer *buffer,
// construct LTOModule, hand over ownership of module and target
SubtargetFeatures Features;
Features.getDefaultSubtargetFeatures("" /* cpu */, llvm::Triple(Triple));
Features.getDefaultSubtargetFeatures(llvm::Triple(Triple));
std::string FeatureStr = Features.getString();
TargetMachine *target = march->createTargetMachine(Triple, FeatureStr);
std::string CPU;
TargetMachine *target = march->createTargetMachine(Triple, CPU, FeatureStr);
LTOModule *Ret = new LTOModule(m.take(), target);
bool Err = Ret->ParseSymbols();
if (Err) {

12
utils/TableGen/SubtargetEmitter.cpp
View File

@ -606,15 +606,15 @@ void SubtargetEmitter::ParseFeaturesFunction(raw_ostream &OS) {
OS << "// ParseSubtargetFeatures - Parses features string setting specified\n"
<< "// subtarget options.\n"
<< "std::string llvm::";
<< "void llvm::";
OS << Target;
OS << "Subtarget::ParseSubtargetFeatures(const std::string &FS,\n"
<< " const std::string &CPU) {\n"
<< " DEBUG(dbgs() << \"\\nFeatures:\" << FS);\n"
<< " DEBUG(dbgs() << \"\\nCPU:\" << CPU);\n"
<< " SubtargetFeatures Features(FS);\n"
<< " Features.setCPUIfNone(CPU);\n"
<< " uint64_t Bits = Features.getBits(SubTypeKV, SubTypeKVSize,\n"
<< " uint64_t Bits = Features.getFeatureBits(CPU, "
<< "SubTypeKV, SubTypeKVSize,\n"
<< " FeatureKV, FeatureKVSize);\n";
for (unsigned i = 0; i < Features.size(); i++) {
@ -635,13 +635,13 @@ void SubtargetEmitter::ParseFeaturesFunction(raw_ostream &OS) {
if (HasItineraries) {
OS << "\n"
<< " InstrItinerary *Itinerary = (InstrItinerary *)"
<< "Features.getInfo(ProcItinKV, ProcItinKVSize);\n"
<< "Features.getItinerary(CPU, "
<< "ProcItinKV, ProcItinKVSize);\n"
<< " InstrItins = InstrItineraryData(Stages, OperandCycles, "
<< "ForwardingPathes, Itinerary);\n";
}
OS << " return Features.getCPU();\n"
<< "}\n";
OS << "}\n";
}
//