2007-02-23 01:01:19 +00:00
|
|
|
//===-- RegisterScavenging.h - Machine register scavenging ------*- C++ -*-===//
|
|
|
|
//
|
|
|
|
// The LLVM Compiler Infrastructure
|
|
|
|
//
|
2007-12-29 19:59:42 +00:00
|
|
|
// This file is distributed under the University of Illinois Open Source
|
|
|
|
// License. See LICENSE.TXT for details.
|
2007-02-23 01:01:19 +00:00
|
|
|
//
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
//
|
|
|
|
// This file declares the machine register scavenger class. It can provide
|
|
|
|
// information such as unused register at any point in a machine basic block.
|
|
|
|
// It also provides a mechanism to make registers availbale by evicting them
|
|
|
|
// to spill slots.
|
|
|
|
//
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
|
2013-01-10 00:45:19 +00:00
|
|
|
#ifndef LLVM_CODEGEN_REGISTERSCAVENGING_H
|
|
|
|
#define LLVM_CODEGEN_REGISTERSCAVENGING_H
|
2007-02-23 01:01:19 +00:00
|
|
|
|
2012-12-03 17:02:12 +00:00
|
|
|
#include "llvm/ADT/BitVector.h"
|
2007-02-23 01:01:19 +00:00
|
|
|
#include "llvm/CodeGen/MachineBasicBlock.h"
|
2012-10-15 21:57:41 +00:00
|
|
|
#include "llvm/CodeGen/MachineRegisterInfo.h"
|
2007-02-23 01:01:19 +00:00
|
|
|
|
|
|
|
namespace llvm {
|
|
|
|
|
2008-04-05 02:17:58 +00:00
|
|
|
class MachineRegisterInfo;
|
2008-02-10 18:45:23 +00:00
|
|
|
class TargetRegisterInfo;
|
2007-03-06 10:01:25 +00:00
|
|
|
class TargetInstrInfo;
|
2007-02-23 01:01:19 +00:00
|
|
|
class TargetRegisterClass;
|
|
|
|
|
|
|
|
class RegScavenger {
|
2008-11-20 02:32:35 +00:00
|
|
|
const TargetRegisterInfo *TRI;
|
|
|
|
const TargetInstrInfo *TII;
|
|
|
|
MachineRegisterInfo* MRI;
|
2007-02-23 01:01:19 +00:00
|
|
|
MachineBasicBlock *MBB;
|
|
|
|
MachineBasicBlock::iterator MBBI;
|
|
|
|
unsigned NumPhysRegs;
|
|
|
|
|
2007-02-27 22:58:43 +00:00
|
|
|
/// Tracking - True if RegScavenger is currently tracking the liveness of
|
|
|
|
/// registers.
|
|
|
|
bool Tracking;
|
2007-02-27 21:09:48 +00:00
|
|
|
|
2007-03-06 10:01:25 +00:00
|
|
|
/// ScavengingFrameIndex - Special spill slot used for scavenging a register
|
|
|
|
/// post register allocation.
|
|
|
|
int ScavengingFrameIndex;
|
|
|
|
|
|
|
|
/// ScavengedReg - If none zero, the specific register is currently being
|
|
|
|
/// scavenged. That is, it is spilled to the special scavenging stack slot.
|
|
|
|
unsigned ScavengedReg;
|
|
|
|
|
|
|
|
/// ScavengedRC - Register class of the scavenged register.
|
|
|
|
///
|
|
|
|
const TargetRegisterClass *ScavengedRC;
|
|
|
|
|
2008-11-20 02:32:35 +00:00
|
|
|
/// ScavengeRestore - Instruction that restores the scavenged register from
|
|
|
|
/// stack.
|
|
|
|
const MachineInstr *ScavengeRestore;
|
|
|
|
|
|
|
|
/// CalleeSavedrRegs - A bitvector of callee saved registers for the target.
|
|
|
|
///
|
|
|
|
BitVector CalleeSavedRegs;
|
|
|
|
|
2007-03-26 22:23:54 +00:00
|
|
|
/// RegsAvailable - The current state of all the physical registers immediately
|
2007-02-23 01:01:19 +00:00
|
|
|
/// before MBBI. One bit per physical register. If bit is set that means it's
|
|
|
|
/// available, unset means the register is currently being used.
|
2007-03-26 22:23:54 +00:00
|
|
|
BitVector RegsAvailable;
|
2007-02-23 01:01:19 +00:00
|
|
|
|
2012-01-29 01:29:28 +00:00
|
|
|
// These BitVectors are only used internally to forward(). They are members
|
|
|
|
// to avoid frequent reallocations.
|
|
|
|
BitVector KillRegs, DefRegs;
|
|
|
|
|
2007-02-23 01:01:19 +00:00
|
|
|
public:
|
2007-02-27 21:09:48 +00:00
|
|
|
RegScavenger()
|
2007-03-06 10:01:25 +00:00
|
|
|
: MBB(NULL), NumPhysRegs(0), Tracking(false),
|
2007-08-27 14:50:10 +00:00
|
|
|
ScavengingFrameIndex(-1), ScavengedReg(0), ScavengedRC(NULL) {}
|
2007-02-27 21:09:48 +00:00
|
|
|
|
2007-03-01 02:18:06 +00:00
|
|
|
/// enterBasicBlock - Start tracking liveness from the begin of the specific
|
|
|
|
/// basic block.
|
|
|
|
void enterBasicBlock(MachineBasicBlock *mbb);
|
2007-02-23 01:01:19 +00:00
|
|
|
|
2009-08-06 16:32:47 +00:00
|
|
|
/// initRegState - allow resetting register state info for multiple
|
|
|
|
/// passes over/within the same function.
|
|
|
|
void initRegState();
|
|
|
|
|
2009-08-06 21:19:03 +00:00
|
|
|
/// forward - Move the internal MBB iterator and update register states.
|
2007-02-23 01:01:19 +00:00
|
|
|
void forward();
|
|
|
|
|
2009-08-06 21:19:03 +00:00
|
|
|
/// forward - Move the internal MBB iterator and update register states until
|
|
|
|
/// it has processed the specific iterator.
|
2007-02-27 21:09:48 +00:00
|
|
|
void forward(MachineBasicBlock::iterator I) {
|
2008-12-19 00:45:13 +00:00
|
|
|
if (!Tracking && MBB->begin() != I) forward();
|
2007-02-27 21:09:48 +00:00
|
|
|
while (MBBI != I) forward();
|
|
|
|
}
|
2007-02-27 01:58:48 +00:00
|
|
|
|
2007-03-07 02:36:16 +00:00
|
|
|
/// skipTo - Move the internal MBB iterator but do not update register states.
|
|
|
|
///
|
|
|
|
void skipTo(MachineBasicBlock::iterator I) { MBBI = I; }
|
|
|
|
|
2007-03-20 21:35:06 +00:00
|
|
|
/// getRegsUsed - return all registers currently in use in used.
|
|
|
|
void getRegsUsed(BitVector &used, bool includeReserved);
|
|
|
|
|
2010-07-08 00:38:54 +00:00
|
|
|
/// getRegsAvailable - Return all available registers in the register class
|
|
|
|
/// in Mask.
|
2011-03-05 00:20:19 +00:00
|
|
|
BitVector getRegsAvailable(const TargetRegisterClass *RC);
|
2010-07-08 00:38:54 +00:00
|
|
|
|
2007-02-23 01:01:19 +00:00
|
|
|
/// FindUnusedReg - Find a unused register of the specified register class.
|
2009-08-18 21:14:54 +00:00
|
|
|
/// Return 0 if none is found.
|
|
|
|
unsigned FindUnusedReg(const TargetRegisterClass *RegClass) const;
|
2007-02-23 01:01:19 +00:00
|
|
|
|
2007-03-06 10:01:25 +00:00
|
|
|
/// setScavengingFrameIndex / getScavengingFrameIndex - accessor and setter of
|
|
|
|
/// ScavengingFrameIndex.
|
|
|
|
void setScavengingFrameIndex(int FI) { ScavengingFrameIndex = FI; }
|
|
|
|
int getScavengingFrameIndex() const { return ScavengingFrameIndex; }
|
|
|
|
|
|
|
|
/// scavengeRegister - Make a register of the specific register class
|
2007-05-01 08:59:18 +00:00
|
|
|
/// available and do the appropriate bookkeeping. SPAdj is the stack
|
|
|
|
/// adjustment due to call frame, it's passed along to eliminateFrameIndex().
|
|
|
|
/// Returns the scavenged register.
|
2007-03-06 10:01:25 +00:00
|
|
|
unsigned scavengeRegister(const TargetRegisterClass *RegClass,
|
2007-05-01 08:59:18 +00:00
|
|
|
MachineBasicBlock::iterator I, int SPAdj);
|
|
|
|
unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj) {
|
|
|
|
return scavengeRegister(RegClass, MBBI, SPAdj);
|
2007-03-06 10:01:25 +00:00
|
|
|
}
|
|
|
|
|
2009-10-07 17:12:56 +00:00
|
|
|
/// setUsed - Tell the scavenger a register is used.
|
|
|
|
///
|
|
|
|
void setUsed(unsigned Reg);
|
2007-02-23 01:01:19 +00:00
|
|
|
private:
|
2009-08-16 17:41:20 +00:00
|
|
|
/// isReserved - Returns true if a register is reserved. It is never "unused".
|
2012-10-15 21:57:41 +00:00
|
|
|
bool isReserved(unsigned Reg) const { return MRI->isReserved(Reg); }
|
2009-08-16 17:41:20 +00:00
|
|
|
|
2012-11-15 18:13:20 +00:00
|
|
|
/// isUsed - Test if a register is currently being used. When called by the
|
|
|
|
/// isAliasUsed function, we only check isReserved if this is the original
|
|
|
|
/// register, not an alias register.
|
2009-08-16 17:41:20 +00:00
|
|
|
///
|
2012-11-15 18:13:20 +00:00
|
|
|
bool isUsed(unsigned Reg, bool CheckReserved = true) const {
|
|
|
|
return !RegsAvailable.test(Reg) || (CheckReserved && isReserved(Reg));
|
2012-02-23 01:13:32 +00:00
|
|
|
}
|
2009-08-16 17:41:20 +00:00
|
|
|
|
|
|
|
/// isAliasUsed - Is Reg or an alias currently in use?
|
|
|
|
bool isAliasUsed(unsigned Reg) const;
|
|
|
|
|
|
|
|
/// setUsed / setUnused - Mark the state of one or a number of registers.
|
|
|
|
///
|
|
|
|
void setUsed(BitVector &Regs) {
|
2012-01-29 01:29:28 +00:00
|
|
|
RegsAvailable.reset(Regs);
|
2009-08-16 17:41:20 +00:00
|
|
|
}
|
|
|
|
void setUnused(BitVector &Regs) {
|
|
|
|
RegsAvailable |= Regs;
|
|
|
|
}
|
2008-11-20 02:32:35 +00:00
|
|
|
|
2009-08-08 13:18:47 +00:00
|
|
|
/// Add Reg and all its sub-registers to BV.
|
|
|
|
void addRegWithSubRegs(BitVector &BV, unsigned Reg);
|
|
|
|
|
2010-07-08 17:27:23 +00:00
|
|
|
/// findSurvivorReg - Return the candidate register that is unused for the
|
|
|
|
/// longest after StartMI. UseMI is set to the instruction where the search
|
|
|
|
/// stopped.
|
|
|
|
///
|
|
|
|
/// No more than InstrLimit instructions are inspected.
|
|
|
|
unsigned findSurvivorReg(MachineBasicBlock::iterator StartMI,
|
|
|
|
BitVector &Candidates,
|
|
|
|
unsigned InstrLimit,
|
|
|
|
MachineBasicBlock::iterator &UseMI);
|
|
|
|
|
2007-02-23 01:01:19 +00:00
|
|
|
};
|
2009-08-08 13:18:47 +00:00
|
|
|
|
2007-02-23 01:01:19 +00:00
|
|
|
} // End llvm namespace
|
|
|
|
|
|
|
|
#endif
|