llvm-6502/test/CodeGen/Generic/2007-02-23-DAGCombine-Miscompile.ll

; PR1219
; RUN: llc < %s -march=x86 | grep {movl	\$1, %eax}

define i32 @test(i1 %X) {
old_entry1:
        %hvar2 = zext i1 %X to i32
	%C = icmp sgt i32 %hvar2, -1
	br i1 %C, label %cond_true15, label %cond_true
cond_true15:
        ret i32 1
cond_true:
        ret i32 2
}
testcase for PR1219 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34550 91177308-0d34-0410-b5e6-96231b3b80d8 2007-02-24 02:08:00 +00:00			`; PR1219`
Eliminate more uses of llvm-as and llvm-dis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81293 91177308-0d34-0410-b5e6-96231b3b80d8 2009-09-09 00:09:15 +00:00			`; RUN: llc < %s -march=x86 \| grep {movl \$1, %eax}`
testcase for PR1219 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34550 91177308-0d34-0410-b5e6-96231b3b80d8 2007-02-24 02:08:00 +00:00
			`define i32 @test(i1 %X) {`
			`old_entry1:`
			`%hvar2 = zext i1 %X to i32`
			`%C = icmp sgt i32 %hvar2, -1`
			`br i1 %C, label %cond_true15, label %cond_true`
			`cond_true15:`
			`ret i32 1`
			`cond_true:`
			`ret i32 2`
			`}`