llvm-6502/test/CodeGen
Anton Korobeynikov 8f8e9f0830 It seems that OR operation does not affect status reg at all.
Remove impdef of SRW. This fixes PR4779


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83739 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-10 22:17:47 +00:00
..
Alpha
ARM Update this test; the code is the same but it gets counted as one 2009-10-09 23:31:04 +00:00
Blackfin
CBackend
CellSPU
CPP
Generic
Mips
MSP430 It seems that OR operation does not affect status reg at all. 2009-10-10 22:17:47 +00:00
PIC16
PowerPC
SPARC
SystemZ
Thumb
Thumb2
X86 Fix the x86 test-shrink optimization so that it doesn't shrink comparisons 2009-10-09 20:35:19 +00:00
XCore Add some peepholes for signed comparisons using ashr X, X, 32. 2009-10-08 15:38:17 +00:00