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llvm-6502/test/CodeGen/NVPTX/ldu-i8.ll

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[NVPTX] Make sure we zero out high-order 24 bits for 8-bit load into 32-bit value git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185328 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-01 12:58:48 +00:00
; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
[NVPTX] Make the alignment an explicit argument to ldu/ldg Summary: Instead of specifying the alignment as metadata which may be destroyed by transformation passes, make the alignment the second argument to ldu/ldg intrinsic calls. Test Plan: ldu-ldg.ll ldu-i8.ll ldu-reg-plus-offset.ll Reviewers: eliben, meheff, jholewinski Reviewed By: meheff, jholewinski Subscribers: jholewinski, llvm-commits Differential Revision: http://reviews.llvm.org/D5093 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216731 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 15:30:20 +00:00
declare i8 @llvm.nvvm.ldu.global.i.i8.p0i8(i8*, i32)
[NVPTX] Make sure we zero out high-order 24 bits for 8-bit load into 32-bit value git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185328 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-01 12:58:48 +00:00
define i8 @foo(i8* %a) {
; Ensure we properly truncate off the high-order 24 bits
; CHECK: ldu.global.u8
; CHECK: cvt.u32.u16
; CHECK: and.b32 %r{{[0-9]+}}, %r{{[0-9]+}}, 255
[NVPTX] Make the alignment an explicit argument to ldu/ldg Summary: Instead of specifying the alignment as metadata which may be destroyed by transformation passes, make the alignment the second argument to ldu/ldg intrinsic calls. Test Plan: ldu-ldg.ll ldu-i8.ll ldu-reg-plus-offset.ll Reviewers: eliben, meheff, jholewinski Reviewed By: meheff, jholewinski Subscribers: jholewinski, llvm-commits Differential Revision: http://reviews.llvm.org/D5093 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216731 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-29 15:30:20 +00:00
%val = tail call i8 @llvm.nvvm.ldu.global.i.i8.p0i8(i8* %a, i32 4)
[NVPTX] Make sure we zero out high-order 24 bits for 8-bit load into 32-bit value git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185328 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-01 12:58:48 +00:00
ret i8 %val
}
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