2005-07-01 22:44:09 +00:00
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//===-- X86ATTAsmPrinter.cpp - Convert X86 LLVM code to Intel assembly ----===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a printer that converts from our internal representation
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// of machine-dependent LLVM code to AT&T format assembly
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// language. This printer is the output mechanism used by `llc'.
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//
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//===----------------------------------------------------------------------===//
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#include "X86ATTAsmPrinter.h"
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#include "X86.h"
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#include "X86TargetMachine.h"
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#include "llvm/Module.h"
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#include "llvm/Support/Mangler.h"
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2006-02-18 00:15:05 +00:00
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#include "llvm/Target/TargetOptions.h"
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2006-01-22 23:41:00 +00:00
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#include <iostream>
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2005-07-01 22:44:09 +00:00
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using namespace llvm;
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/// runOnMachineFunction - This uses the printMachineInstruction()
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/// method to print assembly for each instruction.
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///
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bool X86ATTAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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2006-03-07 02:23:26 +00:00
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// if (forDarwin) {
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// Let PassManager know we need debug information and relay
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// the MachineDebugInfo address on to DwarfWriter.
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DW.SetDebugInfo(&getAnalysis<MachineDebugInfo>());
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// }
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2006-03-07 02:02:57 +00:00
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2005-11-21 07:51:23 +00:00
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SetupMachineFunction(MF);
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2005-07-01 22:44:09 +00:00
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O << "\n\n";
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// Print out constants referenced by the function
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2005-11-21 08:32:23 +00:00
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EmitConstantPool(MF.getConstantPool());
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2005-07-01 22:44:09 +00:00
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2006-04-22 18:53:45 +00:00
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// Print out jump tables referenced by the function
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EmitJumpTableInfo(MF.getJumpTableInfo());
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2005-07-01 22:44:09 +00:00
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// Print out labels for the function.
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2006-02-07 08:38:37 +00:00
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const Function *F = MF.getFunction();
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switch (F->getLinkage()) {
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default: assert(0 && "Unknown linkage type!");
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case Function::InternalLinkage: // Symbols default to internal.
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SwitchSection(".text", F);
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EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
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break;
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case Function::ExternalLinkage:
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SwitchSection(".text", F);
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EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
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2005-12-16 00:07:30 +00:00
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O << "\t.globl\t" << CurrentFnName << "\n";
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2006-02-07 08:38:37 +00:00
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break;
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case Function::WeakLinkage:
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case Function::LinkOnceLinkage:
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if (forDarwin) {
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SwitchSection(".section __TEXT,__textcoal_nt,coalesced,pure_instructions",
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F);
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2006-02-22 23:59:57 +00:00
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O << "\t.globl\t" << CurrentFnName << "\n";
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2006-02-07 08:38:37 +00:00
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O << "\t.weak_definition\t" << CurrentFnName << "\n";
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} else {
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EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
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O << "\t.section\t.llvm.linkonce.t." << CurrentFnName
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<< ",\"ax\",@progbits\n";
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O << "\t.weak " << CurrentFnName << "\n";
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}
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break;
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}
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2005-07-01 22:44:09 +00:00
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O << CurrentFnName << ":\n";
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2006-04-07 20:44:42 +00:00
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if (forDarwin) {
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// Emit pre-function debug information.
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DW.BeginFunction(&MF);
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}
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2005-07-01 22:44:09 +00:00
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// Print out code for the function.
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for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
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I != E; ++I) {
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// Print a label for the basic block.
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if (I->pred_begin() != I->pred_end())
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2005-11-21 07:43:59 +00:00
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O << PrivateGlobalPrefix << "BB" << CurrentFnName << "_" << I->getNumber()
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<< ":\t" << CommentString << " " << I->getBasicBlock()->getName()
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<< "\n";
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2005-07-01 22:44:09 +00:00
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for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
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II != E; ++II) {
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// Print the assembly for the instruction.
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O << "\t";
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printMachineInstruction(II);
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}
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}
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2005-11-21 23:06:54 +00:00
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if (HasDotTypeDotSizeDirective)
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2005-07-12 01:37:28 +00:00
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O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
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2005-07-01 22:44:09 +00:00
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2006-03-07 02:23:26 +00:00
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if (forDarwin) {
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// Emit post-function debug information.
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2006-03-23 18:09:44 +00:00
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DW.EndFunction();
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2006-03-07 02:23:26 +00:00
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}
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2006-03-07 02:02:57 +00:00
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2005-07-01 22:44:09 +00:00
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// We didn't modify anything.
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return false;
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}
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2006-02-06 23:41:19 +00:00
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void X86ATTAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
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const char *Modifier) {
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const MachineOperand &MO = MI->getOperand(OpNo);
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2005-07-01 22:44:09 +00:00
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const MRegisterInfo &RI = *TM.getRegisterInfo();
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switch (MO.getType()) {
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case MachineOperand::MO_VirtualRegister:
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case MachineOperand::MO_MachineRegister:
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assert(MRegisterInfo::isPhysicalRegister(MO.getReg()) &&
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"Virtual registers should not make it this far!");
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O << '%';
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for (const char *Name = RI.get(MO.getReg()).Name; *Name; ++Name)
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O << (char)tolower(*Name);
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return;
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case MachineOperand::MO_SignExtendedImmed:
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case MachineOperand::MO_UnextendedImmed:
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2006-03-07 02:02:57 +00:00
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if (!Modifier || strcmp(Modifier, "debug") != 0)
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O << '$';
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O << (int)MO.getImmedValue();
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2005-07-01 22:44:09 +00:00
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return;
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2006-04-22 18:53:45 +00:00
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case MachineOperand::MO_MachineBasicBlock:
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printBasicBlockLabel(MO.getMachineBasicBlock());
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2005-07-01 22:44:09 +00:00
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return;
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case MachineOperand::MO_PCRelativeDisp:
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std::cerr << "Shouldn't use addPCDisp() when building X86 MachineInstrs";
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abort ();
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return;
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2006-04-22 18:53:45 +00:00
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case MachineOperand::MO_JumpTableIndex: {
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bool isMemOp = Modifier && !strcmp(Modifier, "mem");
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if (!isMemOp) O << '$';
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O << PrivateGlobalPrefix << "JTI" << getFunctionNumber() << "_"
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<< MO.getJumpTableIndex();
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// FIXME: PIC relocation model
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return;
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}
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2006-02-26 08:28:12 +00:00
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case MachineOperand::MO_ConstantPoolIndex: {
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bool isMemOp = Modifier && !strcmp(Modifier, "mem");
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if (!isMemOp) O << '$';
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O << PrivateGlobalPrefix << "CPI" << getFunctionNumber() << "_"
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<< MO.getConstantPoolIndex();
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if (forDarwin && TM.getRelocationModel() == Reloc::PIC)
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O << "-\"L" << getFunctionNumber() << "$pb\"";
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int Offset = MO.getOffset();
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if (Offset > 0)
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O << "+" << Offset;
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else if (Offset < 0)
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O << Offset;
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return;
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}
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2005-07-01 22:44:09 +00:00
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case MachineOperand::MO_GlobalAddress: {
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2006-02-06 23:41:19 +00:00
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bool isCallOp = Modifier && !strcmp(Modifier, "call");
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2006-02-07 08:38:37 +00:00
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bool isMemOp = Modifier && !strcmp(Modifier, "mem");
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2006-02-18 00:15:05 +00:00
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if (!isMemOp && !isCallOp) O << '$';
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2006-02-07 08:38:37 +00:00
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// Darwin block shameless ripped from PPCAsmPrinter.cpp
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2006-02-22 20:19:42 +00:00
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if (forDarwin && TM.getRelocationModel() != Reloc::Static) {
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2005-07-08 00:23:26 +00:00
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GlobalValue *GV = MO.getGlobal();
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std::string Name = Mang->getValueName(GV);
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2006-02-07 08:38:37 +00:00
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// Link-once, External, or Weakly-linked global variables need
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// non-lazily-resolved stubs
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if (GV->isExternal() || GV->hasWeakLinkage() ||
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GV->hasLinkOnceLinkage()) {
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// Dynamically-resolved functions need a stub for the function.
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if (isCallOp && isa<Function>(GV) && cast<Function>(GV)->isExternal()) {
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FnStubs.insert(Name);
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O << "L" << Name << "$stub";
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} else {
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GVStubs.insert(Name);
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O << "L" << Name << "$non_lazy_ptr";
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}
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2005-07-12 18:34:58 +00:00
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} else {
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O << Mang->getValueName(GV);
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2006-02-23 02:43:52 +00:00
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}
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if (!isCallOp && TM.getRelocationModel() == Reloc::PIC)
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O << "-\"L" << getFunctionNumber() << "$pb\"";
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} else
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2006-02-18 00:15:05 +00:00
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O << Mang->getValueName(MO.getGlobal());
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2005-07-01 22:44:09 +00:00
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int Offset = MO.getOffset();
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if (Offset > 0)
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O << "+" << Offset;
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else if (Offset < 0)
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O << Offset;
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return;
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}
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2006-02-06 23:41:19 +00:00
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case MachineOperand::MO_ExternalSymbol: {
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bool isCallOp = Modifier && !strcmp(Modifier, "call");
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2006-02-22 20:19:42 +00:00
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if (isCallOp && forDarwin && TM.getRelocationModel() != Reloc::Static) {
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std::string Name(GlobalPrefix);
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Name += MO.getSymbolName();
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2005-07-08 00:23:26 +00:00
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FnStubs.insert(Name);
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O << "L" << Name << "$stub";
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return;
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}
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2006-02-22 20:19:42 +00:00
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if (!isCallOp) O << '$';
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2005-07-01 22:44:09 +00:00
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O << GlobalPrefix << MO.getSymbolName();
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return;
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2006-02-06 23:41:19 +00:00
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}
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2005-07-01 22:44:09 +00:00
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default:
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O << "<unknown operand type>"; return;
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}
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}
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2005-11-30 18:54:35 +00:00
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void X86ATTAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op) {
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2005-07-14 22:52:25 +00:00
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unsigned char value = MI->getOperand(Op).getImmedValue();
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assert(value <= 7 && "Invalid ssecc argument!");
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switch (value) {
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case 0: O << "eq"; break;
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case 1: O << "lt"; break;
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case 2: O << "le"; break;
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case 3: O << "unord"; break;
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case 4: O << "neq"; break;
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case 5: O << "nlt"; break;
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case 6: O << "nle"; break;
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case 7: O << "ord"; break;
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}
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}
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2005-07-01 22:44:09 +00:00
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void X86ATTAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op){
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assert(isMem(MI, Op) && "Invalid memory reference!");
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const MachineOperand &BaseReg = MI->getOperand(Op);
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int ScaleVal = MI->getOperand(Op+1).getImmedValue();
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const MachineOperand &IndexReg = MI->getOperand(Op+2);
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const MachineOperand &DispSpec = MI->getOperand(Op+3);
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if (BaseReg.isFrameIndex()) {
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O << "[frame slot #" << BaseReg.getFrameIndex();
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if (DispSpec.getImmedValue())
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O << " + " << DispSpec.getImmedValue();
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O << "]";
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return;
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}
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2006-02-26 08:28:12 +00:00
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if (DispSpec.isGlobalAddress() || DispSpec.isConstantPoolIndex()) {
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2006-02-07 08:38:37 +00:00
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printOperand(MI, Op+3, "mem");
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2005-07-01 22:44:09 +00:00
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} else {
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int DispVal = DispSpec.getImmedValue();
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if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
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O << DispVal;
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}
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if (IndexReg.getReg() || BaseReg.getReg()) {
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O << "(";
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if (BaseReg.getReg())
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2006-02-06 23:41:19 +00:00
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printOperand(MI, Op);
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2005-07-01 22:44:09 +00:00
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if (IndexReg.getReg()) {
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O << ",";
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2006-02-06 23:41:19 +00:00
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printOperand(MI, Op+2);
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2005-07-01 22:44:09 +00:00
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if (ScaleVal != 1)
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O << "," << ScaleVal;
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}
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O << ")";
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}
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}
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2006-02-18 00:15:05 +00:00
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void X86ATTAsmPrinter::printPICLabel(const MachineInstr *MI, unsigned Op) {
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O << "\"L" << getFunctionNumber() << "$pb\"\n";
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O << "\"L" << getFunctionNumber() << "$pb\":";
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}
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2006-04-28 23:11:40 +00:00
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bool X86ATTAsmPrinter::printAsmMRegsiter(const MachineOperand &MO,
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const char Mode) {
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const MRegisterInfo &RI = *TM.getRegisterInfo();
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unsigned Reg = MO.getReg();
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const char *Name = RI.get(Reg).Name;
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switch (Mode) {
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default: return true; // Unknown mode.
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case 'b': // Print QImode register
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switch (Reg) {
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default: return true;
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case X86::AH: case X86::AL: case X86::AX: case X86::EAX:
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Name = "al";
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break;
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case X86::DH: case X86::DL: case X86::DX: case X86::EDX:
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Name = "dl";
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break;
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case X86::CH: case X86::CL: case X86::CX: case X86::ECX:
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Name = "cl";
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break;
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case X86::BH: case X86::BL: case X86::BX: case X86::EBX:
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Name = "bl";
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break;
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case X86::ESI:
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Name = "sil";
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break;
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case X86::EDI:
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Name = "dil";
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break;
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case X86::EBP:
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Name = "bpl";
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break;
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case X86::ESP:
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Name = "spl";
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break;
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}
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break;
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case 'h': // Print QImode high register
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switch (Reg) {
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default: return true;
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case X86::AH: case X86::AL: case X86::AX: case X86::EAX:
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Name = "al";
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break;
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case X86::DH: case X86::DL: case X86::DX: case X86::EDX:
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Name = "dl";
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break;
|
|
|
|
case X86::CH: case X86::CL: case X86::CX: case X86::ECX:
|
|
|
|
Name = "cl";
|
|
|
|
break;
|
|
|
|
case X86::BH: case X86::BL: case X86::BX: case X86::EBX:
|
|
|
|
Name = "bl";
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 'w': // Print HImode register
|
|
|
|
switch (Reg) {
|
|
|
|
default: return true;
|
|
|
|
case X86::AH: case X86::AL: case X86::AX: case X86::EAX:
|
|
|
|
Name = "ax";
|
|
|
|
break;
|
|
|
|
case X86::DH: case X86::DL: case X86::DX: case X86::EDX:
|
|
|
|
Name = "dx";
|
|
|
|
break;
|
|
|
|
case X86::CH: case X86::CL: case X86::CX: case X86::ECX:
|
|
|
|
Name = "cx";
|
|
|
|
break;
|
|
|
|
case X86::BH: case X86::BL: case X86::BX: case X86::EBX:
|
|
|
|
Name = "bx";
|
|
|
|
break;
|
|
|
|
case X86::ESI:
|
|
|
|
Name = "si";
|
|
|
|
break;
|
|
|
|
case X86::EDI:
|
|
|
|
Name = "di";
|
|
|
|
break;
|
|
|
|
case X86::EBP:
|
|
|
|
Name = "bp";
|
|
|
|
break;
|
|
|
|
case X86::ESP:
|
|
|
|
Name = "sp";
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 'k': // Print SImode register
|
|
|
|
switch (Reg) {
|
|
|
|
default: return true;
|
|
|
|
case X86::AH: case X86::AL: case X86::AX: case X86::EAX:
|
|
|
|
Name = "eax";
|
|
|
|
break;
|
|
|
|
case X86::DH: case X86::DL: case X86::DX: case X86::EDX:
|
|
|
|
Name = "edx";
|
|
|
|
break;
|
|
|
|
case X86::CH: case X86::CL: case X86::CX: case X86::ECX:
|
|
|
|
Name = "ecx";
|
|
|
|
break;
|
|
|
|
case X86::BH: case X86::BL: case X86::BX: case X86::EBX:
|
|
|
|
Name = "ebx";
|
|
|
|
break;
|
|
|
|
case X86::ESI:
|
|
|
|
Name = "esi";
|
|
|
|
break;
|
|
|
|
case X86::EDI:
|
|
|
|
Name = "edi";
|
|
|
|
break;
|
|
|
|
case X86::EBP:
|
|
|
|
Name = "ebp";
|
|
|
|
break;
|
|
|
|
case X86::ESP:
|
|
|
|
Name = "esp";
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
O << '%' << Name;
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2006-04-28 21:19:05 +00:00
|
|
|
/// PrintAsmOperand - Print out an operand for an inline asm expression.
|
|
|
|
///
|
|
|
|
bool X86ATTAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
|
|
|
|
unsigned AsmVariant,
|
|
|
|
const char *ExtraCode) {
|
|
|
|
// Does this asm operand have a single letter operand modifier?
|
|
|
|
if (ExtraCode && ExtraCode[0]) {
|
|
|
|
if (ExtraCode[1] != 0) return true; // Unknown modifier.
|
|
|
|
|
|
|
|
switch (ExtraCode[0]) {
|
|
|
|
default: return true; // Unknown modifier.
|
2006-04-28 23:11:40 +00:00
|
|
|
case 'b': // Print QImode register
|
|
|
|
case 'h': // Print QImode high register
|
|
|
|
case 'w': // Print HImode register
|
|
|
|
case 'k': // Print SImode register
|
|
|
|
return printAsmMRegsiter(MI->getOperand(OpNo), ExtraCode[0]);
|
2006-04-28 21:19:05 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
printOperand(MI, OpNo);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool X86ATTAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
|
|
|
|
unsigned OpNo,
|
|
|
|
unsigned AsmVariant,
|
|
|
|
const char *ExtraCode) {
|
|
|
|
if (ExtraCode && ExtraCode[0])
|
|
|
|
return true; // Unknown modifier.
|
|
|
|
printMemReference(MI, OpNo);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2005-07-01 22:44:09 +00:00
|
|
|
/// printMachineInstruction -- Print out a single X86 LLVM instruction
|
|
|
|
/// MI in Intel syntax to the current output stream.
|
|
|
|
///
|
|
|
|
void X86ATTAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
|
|
|
|
++EmittedInsts;
|
2006-01-26 02:27:43 +00:00
|
|
|
// This works around some Darwin assembler bugs.
|
|
|
|
if (forDarwin) {
|
|
|
|
switch (MI->getOpcode()) {
|
|
|
|
case X86::REP_MOVSB:
|
|
|
|
O << "rep/movsb (%esi),(%edi)\n";
|
|
|
|
return;
|
|
|
|
case X86::REP_MOVSD:
|
|
|
|
O << "rep/movsl (%esi),(%edi)\n";
|
|
|
|
return;
|
|
|
|
case X86::REP_MOVSW:
|
|
|
|
O << "rep/movsw (%esi),(%edi)\n";
|
|
|
|
return;
|
|
|
|
case X86::REP_STOSB:
|
|
|
|
O << "rep/stosb\n";
|
|
|
|
return;
|
|
|
|
case X86::REP_STOSD:
|
|
|
|
O << "rep/stosl\n";
|
|
|
|
return;
|
|
|
|
case X86::REP_STOSW:
|
|
|
|
O << "rep/stosw\n";
|
|
|
|
return;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2005-07-01 22:44:09 +00:00
|
|
|
// Call the autogenerated instruction printer routines.
|
|
|
|
printInstruction(MI);
|
|
|
|
}
|
|
|
|
|
|
|
|
// Include the auto-generated portion of the assembly writer.
|
|
|
|
#include "X86GenAsmWriter.inc"
|
|
|
|
|