llvm-6502/test/CodeGen/Hexagon/vaddh.ll

; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; CHECK: vaddh(r{{[0-9]+}}, r{{[0-9]+}})

@j = external global i32
@k = external global i32

define void @foo() nounwind {
entry:
  %0 = load i32* @j, align 4
  %1 = load i32* @k, align 4
  %2 = call i32 @llvm.hexagon.A2.svaddh(i32 %0, i32 %1)
  store i32 %2, i32* @k, align 4
  ret void
}

declare i32 @llvm.hexagon.A2.svaddh(i32, i32) nounwind readnone
Enable all Hexagon tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156824 91177308-0d34-0410-b5e6-96231b3b80d8 2012-05-15 16:13:12 +00:00			`; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s \| FileCheck %s`
Hexagon backend support git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146412 91177308-0d34-0410-b5e6-96231b3b80d8 2011-12-12 21:14:40 +00:00			`; CHECK: vaddh(r{{[0-9]+}}, r{{[0-9]+}})`

			`@j = external global i32`
			`@k = external global i32`

			`define void @foo() nounwind {`
			`entry:`
			`%0 = load i32* @j, align 4`
			`%1 = load i32* @k, align 4`
			`%2 = call i32 @llvm.hexagon.A2.svaddh(i32 %0, i32 %1)`
			`store i32 %2, i32* @k, align 4`
			`ret void`
			`}`

			`declare i32 @llvm.hexagon.A2.svaddh(i32, i32) nounwind readnone`