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Enable all Hexagon tests.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156824 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sirish Pande
2012-05-15 16:13:12 +00:00
parent 39de32f497
commit 0031af6615
11 changed files with 18 additions and 28 deletions
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test/CodeGen/Hexagon/args.ll
+1 -2
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@@ -1,5 +1,4 @@
; RUN: true
; DISABLED: llc -march=hexagon -mcpu=hexagonv4 -disable-dfa-sched < %s | FileCheck %s
; RUN: llc -march=hexagon -mcpu=hexagonv4 -disable-dfa-sched < %s | FileCheck %s
; CHECK: r[[T0:[0-9]+]] = #7
; CHECK: memw(r29 + #0) = r[[T0]]
; CHECK: r0 = #1
test/CodeGen/Hexagon/combine.ll
+1 -2
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@@ -1,5 +1,4 @@
; RUN: true
; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; CHECK: combine(r{{[0-9]+}}, r{{[0-9]+}})
@j = external global i32
test/CodeGen/Hexagon/double.ll
+1 -2
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@@ -1,5 +1,4 @@
; RUN: true
; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; CHECK: __hexagon_adddf3
; CHECK: __hexagon_subdf3
test/CodeGen/Hexagon/float.ll
+1 -2
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@@ -1,5 +1,4 @@
; RUN: true
; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; CHECK: __hexagon_addsf3
; CHECK: __hexagon_subsf3
test/CodeGen/Hexagon/floatconvert-ieee-rnd-near.ll
+1 -2
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@@ -1,5 +1,4 @@
; RUN: true
; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; CHECK: __hexagon_addsf3
; CHECK: __hexagon_subsf3
test/CodeGen/Hexagon/frame.ll
+1 -2
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@@ -1,5 +1,4 @@
; RUN: true
; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
@num = external global i32
@acc = external global i32
test/CodeGen/Hexagon/mpy.ll
+1 -2
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@@ -1,5 +1,4 @@
; RUN: true
; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; CHECK: += mpyi
define void @foo(i32 %acc, i32 %num, i32 %num2) nounwind {
test/CodeGen/Hexagon/static.ll
+4 -5
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@@ -1,13 +1,12 @@
; RUN: true
; DISABLED: llc -march=hexagon -mcpu=hexagonv4 -disable-dfa-sched < %s | FileCheck %s
; RUN: llc -march=hexagon -mcpu=hexagonv4 -disable-dfa-sched < %s | FileCheck %s
@num = external global i32
@acc = external global i32
@val = external global i32
; CHECK: CONST32(#num)
; CHECK: CONST32(#acc)
; CHECK: CONST32(#val)
; CHECK: memw(##num)
; CHECK: memw(##acc)
; CHECK: memw(##val)
define void @foo() nounwind {
entry:
test/CodeGen/Hexagon/struct_args.ll
+3 -3
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@@ -1,6 +1,6 @@
; RUN: true
; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; CHECK: r1:0 = or(r{{[0-9]}}:{{[0-9]}}, r{{[0-9]}}:{{[0-9]}})
; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; CHECK: r{{[0-9]}}:{{[0-9]}} = combine(r{{[0-9]}}, r{{[0-9]}})
; CHECK: r{{[0-9]}}:{{[0-9]}} |= asl(r{{[0-9]}}:{{[0-9]}}, #32)
%struct.small = type { i32, i32 }
test/CodeGen/Hexagon/struct_args_large.ll
+3 -4
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@@ -1,8 +1,7 @@
; RUN: true
; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; CHECK: r[[T0:[0-9]+]] = CONST32(#s2)
; CHECK: r[[T1:[0-9]+]] = memw(r[[T0]] + #0)
; CHECK: memw(r29 + #0) = r[[T1]]
; CHECK: memw(r29 + #0) = r{{.}}
; CHECK: memw(r29+#8) = r{{.}}
%struct.large = type { i64, i64 }
test/CodeGen/Hexagon/vaddh.ll
+1 -2
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@@ -1,5 +1,4 @@
; RUN: true
; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; CHECK: vaddh(r{{[0-9]+}}, r{{[0-9]+}})
@j = external global i32