2012-09-10 21:10:49 +00:00
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; RUN: llc < %s -march=x86 | FileCheck %s
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define i32 @t1() nounwind {
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entry:
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2012-09-11 16:33:10 +00:00
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%0 = tail call i32 asm sideeffect inteldialect "mov eax, $1\0A\09mov $0, eax", "=r,r,~{eax},~{dirflag},~{fpsr},~{flags}"(i32 1) nounwind
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2012-09-10 21:10:49 +00:00
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ret i32 %0
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2012-09-10 21:31:43 +00:00
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; CHECK: t1
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2012-09-10 22:04:54 +00:00
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; CHECK: {{## InlineAsm Start|#APP}}
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2012-09-10 21:36:05 +00:00
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; CHECK: .intel_syntax
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2012-09-10 21:10:49 +00:00
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; CHECK: mov eax, ecx
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; CHECK: mov ecx, eax
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2012-09-10 21:36:05 +00:00
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; CHECK: .att_syntax
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2012-09-10 22:04:54 +00:00
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; CHECK: {{## InlineAsm End|#NO_APP}}
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2012-09-10 21:10:49 +00:00
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}
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2012-09-11 19:09:56 +00:00
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define void @t2() nounwind {
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entry:
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call void asm sideeffect inteldialect "mov eax, $$1", "~{eax},~{dirflag},~{fpsr},~{flags}"() nounwind
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ret void
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; CHECK: t2
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; CHECK: {{## InlineAsm Start|#APP}}
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; CHECK: .intel_syntax
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; CHECK: mov eax, 1
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; CHECK: .att_syntax
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; CHECK: {{## InlineAsm End|#NO_APP}}
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}
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2012-10-03 22:06:44 +00:00
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define void @t3(i32 %V) nounwind {
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entry:
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%V.addr = alloca i32, align 4
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store i32 %V, i32* %V.addr, align 4
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call void asm sideeffect inteldialect "mov eax, DWORD PTR [$0]", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %V.addr) nounwind
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ret void
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; CHECK: t3
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; CHECK: {{## InlineAsm Start|#APP}}
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; CHECK: .intel_syntax
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; CHECK: mov eax, DWORD PTR {{[[esp]}}
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; CHECK: .att_syntax
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; CHECK: {{## InlineAsm End|#NO_APP}}
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}
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