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https://github.com/c64scene-ar/llvm-6502.git
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34448ae393
in the Intel syntax. The MC layer supports emitting in the Intel syntax, but this would require the inline assembly MachineInstr to be lowered to an MCInst before emission. This is potential future work, but for now emitting directly from the MachineInstr suffices. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165173 91177308-0d34-0410-b5e6-96231b3b80d8
41 lines
1.1 KiB
LLVM
41 lines
1.1 KiB
LLVM
; RUN: llc < %s -march=x86 | FileCheck %s
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define i32 @t1() nounwind {
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entry:
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%0 = tail call i32 asm sideeffect inteldialect "mov eax, $1\0A\09mov $0, eax", "=r,r,~{eax},~{dirflag},~{fpsr},~{flags}"(i32 1) nounwind
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ret i32 %0
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; CHECK: t1
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; CHECK: {{## InlineAsm Start|#APP}}
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; CHECK: .intel_syntax
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; CHECK: mov eax, ecx
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; CHECK: mov ecx, eax
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; CHECK: .att_syntax
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; CHECK: {{## InlineAsm End|#NO_APP}}
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}
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define void @t2() nounwind {
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entry:
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call void asm sideeffect inteldialect "mov eax, $$1", "~{eax},~{dirflag},~{fpsr},~{flags}"() nounwind
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ret void
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; CHECK: t2
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; CHECK: {{## InlineAsm Start|#APP}}
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; CHECK: .intel_syntax
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; CHECK: mov eax, 1
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; CHECK: .att_syntax
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; CHECK: {{## InlineAsm End|#NO_APP}}
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}
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define void @t3(i32 %V) nounwind {
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entry:
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%V.addr = alloca i32, align 4
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store i32 %V, i32* %V.addr, align 4
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call void asm sideeffect inteldialect "mov eax, DWORD PTR [$0]", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %V.addr) nounwind
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ret void
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; CHECK: t3
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; CHECK: {{## InlineAsm Start|#APP}}
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; CHECK: .intel_syntax
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; CHECK: mov eax, DWORD PTR {{[[esp]}}
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; CHECK: .att_syntax
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; CHECK: {{## InlineAsm End|#NO_APP}}
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}
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