llvm-6502/test/CodeGen/Mips/inlineasm-cnstrnt-bad-L.ll

;
;This is a negative test. The constant value given for the constraint (L)
;is non-zero in the lower 16 bits (0x00100003).
;
; RUN: not llc -march=mipsel < %s  2> %t
; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s

define i32 @main() nounwind {
entry:

;CHECK-ERRORS:	error: invalid operand for inline asm constraint 'L'

  tail call i32 asm "addiu $0,$1,$2", "=r,r,L"(i32 7, i32 1048579) nounwind
  ret i32 0
}
Add support for the 'L' inline asm constraint. Patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156283 91177308-0d34-0410-b5e6-96231b3b80d8 2012-05-07 05:46:37 +00:00			`;`
			`;This is a negative test. The constant value given for the constraint (L)`
			`;is non-zero in the lower 16 bits (0x00100003).`
			`;`
			`; RUN: not llc -march=mipsel < %s 2> %t`
			`; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s`

			`define i32 @main() nounwind {`
			`entry:`

			`;CHECK-ERRORS: error: invalid operand for inline asm constraint 'L'`

[mips] Use addiu in inline assembly tests since addi is not available in all ISA's Summary: This patch is necessary so that they do not fail on MIPS32r6/MIPS64r6 when -integrated-as is enabled by default and we correctly detect the host CPU. No functional change since these tests are testing the behaviour of the constraint used for the third operand rather than the mnemonic. Depends on D3842 Reviewers: zoran.jovanovic, jkolek, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3843 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209421 91177308-0d34-0410-b5e6-96231b3b80d8 2014-05-22 11:46:58 +00:00			`tail call i32 asm "addiu $0,$1,$2", "=r,r,L"(i32 7, i32 1048579) nounwind`
Add support for the 'L' inline asm constraint. Patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156283 91177308-0d34-0410-b5e6-96231b3b80d8 2012-05-07 05:46:37 +00:00			`ret i32 0`
			`}`