6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-13 09:33:50 +00:00
Code Issues Projects Releases Wiki Activity

Add support for the 'L' inline asm constraint.

Browse Source 
Patch by Jack Carter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156283 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2012-05-07 05:46:37 +00:00
parent f49f846eec
commit 5ac47bba83
3 changed files with 33 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
lib/Target/Mips/MipsISelLowering.cpp
View File

@ -3042,6 +3042,7 @@ MipsTargetLowering::getSingleConstraintMatchWeight(
case 'I': // signed 16 bit immediate
case 'J': // integer zero
case 'K': // unsigned 16 bit immediate
case 'L': // signed 32 bit immediate where lower 16 bits are 0
if (isa<ConstantInt>(CallOperandVal))
weight = CW_Constant;
break;
@ -3124,6 +3125,16 @@ void MipsTargetLowering::LowerAsmOperandForConstraint(SDValue Op,
}
}
return;
case 'L': // signed 32 bit immediate where lower 16 bits are 0
if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) {
EVT Type = Op.getValueType();
int64_t Val = C->getSExtValue();
if ((isInt<32>(Val)) && ((Val & 0xffff) == 0)){
Result = DAG.getTargetConstant(Val, Type);
break;
}
}
return;
}
if (Result.getNode()) {

16
test/CodeGen/Mips/inlineasm-cnstrnt-bad-L.ll Normal file
View File

@ -0,0 +1,16 @@
;
;This is a negative test. The constant value given for the constraint (L)
;is non-zero in the lower 16 bits (0x00100003).
;
; RUN: not llc -march=mipsel < %s 2> %t
; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
define i32 @main() nounwind {
entry:
;CHECK-ERRORS: error: invalid operand for inline asm constraint 'L'
tail call i32 asm "addi $0,$1,$2", "=r,r,L"(i32 7, i32 1048579) nounwind
ret i32 0
}

7
test/CodeGen/Mips/inlineasm_constraint.ll
View File

@ -27,6 +27,11 @@ entry:
; CHECK: #NO_APP
tail call i16 asm sideeffect "addu $0,$1,$2\0A\09 ", "=r,r,K"(i16 7, i16 64) nounwind
; Now L with 0x00100000
; CHECK: #APP
; CHECK: add ${{[0-9]+}},${{[0-9]+}},${{[0-9]+}}
; CHECK: #NO_APP
tail call i32 asm sideeffect "add $0,$1,$3\0A\09", "=r,r,L,r"(i32 7, i32 1048576, i32 0) nounwind
ret i32 0
}