llvm-6502/test/CodeGen/R600/setuo.ll

;RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck %s

;CHECK-LABEL: @main
;CHECK: V_CMP_U_F32_e64 s[0:1], {{[sv][0-9]+, [sv][0-9]+}}, 0, 0

define void @main(float %p) {
main_body:
  %c = fcmp une float %p, %p
  %r = select i1 %c, float 1.000000e+00, float 0.000000e+00
  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %r, float %r, float %r, float %r)
  ret void
}

declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
R600/SI: Use -verify-machineinstrs for most tests We can't enable the verifier for tests with SI_IF and SI_ELSE, because these instructions are always followed by a COPY which copies their result to the next basic block. This violates the machine verifier's rule that non-terminators can not folow terminators. Reviewed-by: Vincent Lejeune<vljn at ovi.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192366 91177308-0d34-0410-b5e6-96231b3b80d8 2013-10-10 17:11:46 +00:00			`;RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs \| FileCheck %s`
R600/SI: add SETO/SETUO patterns 6 more piglit tests. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178145 91177308-0d34-0410-b5e6-96231b3b80d8 2013-03-27 15:27:31 +00:00
R600/SI: Prettier display of input modifiers git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208479 91177308-0d34-0410-b5e6-96231b3b80d8 2014-05-10 19:18:33 +00:00			`;CHECK-LABEL: @main`
			`;CHECK: V_CMP_U_F32_e64 s[0:1], {{[sv][0-9]+, [sv][0-9]+}}, 0, 0`
R600/SI: add SETO/SETUO patterns 6 more piglit tests. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178145 91177308-0d34-0410-b5e6-96231b3b80d8 2013-03-27 15:27:31 +00:00
			`define void @main(float %p) {`
			`main_body:`
			`%c = fcmp une float %p, %p`
			`%r = select i1 %c, float 1.000000e+00, float 0.000000e+00`
			`call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %r, float %r, float %r, float %r)`
			`ret void`
			`}`

			`declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)`