llvm-6502/test/CodeGen/XCore/fneg.ll

; RUN: llvm-as < %s | llc -march=xcore | grep "xor" | count 1
define i1 @test(double %F) nounwind {
entry:
	%0 = fsub double -0.000000e+00, %F
	%1 = fcmp olt double 0.000000e+00, %0
	ret i1 %1
}
switch off of 'Section' onto MCSection. We're not properly using MCSection subclasses yet, but this is a step in the right direction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77708 91177308-0d34-0410-b5e6-96231b3b80d8 2009-07-31 18:48:30 +00:00			`; RUN: llvm-as < %s \| llc -march=xcore \| grep "xor" \| count 1`
Add soft float support for a bunch more operations. Original patch by Richard Osborne, tweaked and extended by your humble servant. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59464 91177308-0d34-0410-b5e6-96231b3b80d8 2008-11-17 20:52:38 +00:00			`define i1 @test(double %F) nounwind {`
			`entry:`
Split the Add, Sub, and Mul instruction opcodes into separate integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8 2009-06-04 22:49:04 +00:00			`%0 = fsub double -0.000000e+00, %F`
Add soft float support for a bunch more operations. Original patch by Richard Osborne, tweaked and extended by your humble servant. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59464 91177308-0d34-0410-b5e6-96231b3b80d8 2008-11-17 20:52:38 +00:00			`%1 = fcmp olt double 0.000000e+00, %0`
			`ret i1 %1`
			`}`