mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-21 18:29:46 +00:00
Add soft float support for a bunch more operations. Original
patch by Richard Osborne, tweaked and extended by your humble servant. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59464 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
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e93483d855
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@ -61,14 +61,28 @@ void DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) {
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break;
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case ISD::FABS: R = SoftenFloatRes_FABS(N); break;
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case ISD::FADD: R = SoftenFloatRes_FADD(N); break;
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case ISD::FCEIL: R = SoftenFloatRes_FCEIL(N); break;
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case ISD::FCOPYSIGN: R = SoftenFloatRes_FCOPYSIGN(N); break;
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case ISD::FCOS: R = SoftenFloatRes_FCOS(N); break;
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case ISD::FDIV: R = SoftenFloatRes_FDIV(N); break;
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case ISD::FEXP: R = SoftenFloatRes_FEXP(N); break;
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case ISD::FEXP2: R = SoftenFloatRes_FEXP2(N); break;
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case ISD::FFLOOR: R = SoftenFloatRes_FFLOOR(N); break;
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case ISD::FLOG: R = SoftenFloatRes_FLOG(N); break;
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case ISD::FLOG2: R = SoftenFloatRes_FLOG2(N); break;
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case ISD::FLOG10: R = SoftenFloatRes_FLOG10(N); break;
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case ISD::FMUL: R = SoftenFloatRes_FMUL(N); break;
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case ISD::FNEARBYINT: R = SoftenFloatRes_FNEARBYINT(N); break;
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case ISD::FNEG: R = SoftenFloatRes_FNEG(N); break;
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case ISD::FP_EXTEND: R = SoftenFloatRes_FP_EXTEND(N); break;
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case ISD::FP_ROUND: R = SoftenFloatRes_FP_ROUND(N); break;
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case ISD::FPOW: R = SoftenFloatRes_FPOW(N); break;
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case ISD::FPOWI: R = SoftenFloatRes_FPOWI(N); break;
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case ISD::FRINT: R = SoftenFloatRes_FRINT(N); break;
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case ISD::FSIN: R = SoftenFloatRes_FSIN(N); break;
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case ISD::FSQRT: R = SoftenFloatRes_FSQRT(N); break;
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case ISD::FSUB: R = SoftenFloatRes_FSUB(N); break;
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case ISD::FTRUNC: R = SoftenFloatRes_FTRUNC(N); break;
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case ISD::LOAD: R = SoftenFloatRes_LOAD(N); break;
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case ISD::SELECT: R = SoftenFloatRes_SELECT(N); break;
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case ISD::SELECT_CC: R = SoftenFloatRes_SELECT_CC(N); break;
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@ -103,7 +117,7 @@ SDValue DAGTypeLegalizer::SoftenFloatRes_FABS(SDNode *N) {
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unsigned Size = NVT.getSizeInBits();
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// Mask = ~(1 << (Size-1))
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SDValue Mask = DAG.getConstant(APInt::getAllOnesValue(Size).clear(Size-1),
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SDValue Mask = DAG.getConstant(APInt::getAllOnesValue(Size).clear(Size-1),
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NVT);
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SDValue Op = GetSoftenedFloat(N->getOperand(0));
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return DAG.getNode(ISD::AND, NVT, Op, Mask);
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@ -121,6 +135,17 @@ SDValue DAGTypeLegalizer::SoftenFloatRes_FADD(SDNode *N) {
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NVT, Ops, 2, false);
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}
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SDValue DAGTypeLegalizer::SoftenFloatRes_FCEIL(SDNode *N) {
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MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
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SDValue Op = GetSoftenedFloat(N->getOperand(0));
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return MakeLibCall(GetFPLibCall(N->getValueType(0),
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RTLIB::CEIL_F32,
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RTLIB::CEIL_F64,
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RTLIB::CEIL_F80,
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RTLIB::CEIL_PPCF128),
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NVT, &Op, 1, false);
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}
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SDValue DAGTypeLegalizer::SoftenFloatRes_FCOPYSIGN(SDNode *N) {
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SDValue LHS = GetSoftenedFloat(N->getOperand(0));
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SDValue RHS = BitConvertToInteger(N->getOperand(1));
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@ -160,6 +185,17 @@ SDValue DAGTypeLegalizer::SoftenFloatRes_FCOPYSIGN(SDNode *N) {
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return DAG.getNode(ISD::OR, LVT, LHS, SignBit);
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}
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SDValue DAGTypeLegalizer::SoftenFloatRes_FCOS(SDNode *N) {
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MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
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SDValue Op = GetSoftenedFloat(N->getOperand(0));
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return MakeLibCall(GetFPLibCall(N->getValueType(0),
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RTLIB::COS_F32,
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RTLIB::COS_F64,
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RTLIB::COS_F80,
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RTLIB::COS_PPCF128),
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NVT, &Op, 1, false);
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}
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SDValue DAGTypeLegalizer::SoftenFloatRes_FDIV(SDNode *N) {
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MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
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SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
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@ -172,6 +208,72 @@ SDValue DAGTypeLegalizer::SoftenFloatRes_FDIV(SDNode *N) {
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NVT, Ops, 2, false);
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}
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SDValue DAGTypeLegalizer::SoftenFloatRes_FEXP(SDNode *N) {
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MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
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SDValue Op = GetSoftenedFloat(N->getOperand(0));
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return MakeLibCall(GetFPLibCall(N->getValueType(0),
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RTLIB::EXP_F32,
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RTLIB::EXP_F64,
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RTLIB::EXP_F80,
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RTLIB::EXP_PPCF128),
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NVT, &Op, 1, false);
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}
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SDValue DAGTypeLegalizer::SoftenFloatRes_FEXP2(SDNode *N) {
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MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
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SDValue Op = GetSoftenedFloat(N->getOperand(0));
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return MakeLibCall(GetFPLibCall(N->getValueType(0),
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RTLIB::EXP2_F32,
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RTLIB::EXP2_F64,
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RTLIB::EXP2_F80,
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RTLIB::EXP2_PPCF128),
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NVT, &Op, 1, false);
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}
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SDValue DAGTypeLegalizer::SoftenFloatRes_FFLOOR(SDNode *N) {
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MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
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SDValue Op = GetSoftenedFloat(N->getOperand(0));
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return MakeLibCall(GetFPLibCall(N->getValueType(0),
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RTLIB::FLOOR_F32,
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RTLIB::FLOOR_F64,
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RTLIB::FLOOR_F80,
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RTLIB::FLOOR_PPCF128),
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NVT, &Op, 1, false);
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}
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SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG(SDNode *N) {
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MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
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SDValue Op = GetSoftenedFloat(N->getOperand(0));
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return MakeLibCall(GetFPLibCall(N->getValueType(0),
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RTLIB::LOG_F32,
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RTLIB::LOG_F64,
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RTLIB::LOG_F80,
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RTLIB::LOG_PPCF128),
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NVT, &Op, 1, false);
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}
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SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG2(SDNode *N) {
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MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
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SDValue Op = GetSoftenedFloat(N->getOperand(0));
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return MakeLibCall(GetFPLibCall(N->getValueType(0),
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RTLIB::LOG2_F32,
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RTLIB::LOG2_F64,
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RTLIB::LOG2_F80,
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RTLIB::LOG2_PPCF128),
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NVT, &Op, 1, false);
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}
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SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG10(SDNode *N) {
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MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
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SDValue Op = GetSoftenedFloat(N->getOperand(0));
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return MakeLibCall(GetFPLibCall(N->getValueType(0),
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RTLIB::LOG10_F32,
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RTLIB::LOG10_F64,
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RTLIB::LOG10_F80,
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RTLIB::LOG10_PPCF128),
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NVT, &Op, 1, false);
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}
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SDValue DAGTypeLegalizer::SoftenFloatRes_FMUL(SDNode *N) {
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MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
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SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
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@ -184,6 +286,30 @@ SDValue DAGTypeLegalizer::SoftenFloatRes_FMUL(SDNode *N) {
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NVT, Ops, 2, false);
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}
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SDValue DAGTypeLegalizer::SoftenFloatRes_FNEARBYINT(SDNode *N) {
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MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
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SDValue Op = GetSoftenedFloat(N->getOperand(0));
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return MakeLibCall(GetFPLibCall(N->getValueType(0),
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RTLIB::NEARBYINT_F32,
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RTLIB::NEARBYINT_F64,
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RTLIB::NEARBYINT_F80,
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RTLIB::NEARBYINT_PPCF128),
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NVT, &Op, 1, false);
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}
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SDValue DAGTypeLegalizer::SoftenFloatRes_FNEG(SDNode *N) {
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MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
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// Expand Y = FNEG(X) -> Y = SUB -0.0, X
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SDValue Ops[2] = { DAG.getConstantFP(-0.0, NVT),
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GetSoftenedFloat(N->getOperand(0)) };
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return MakeLibCall(GetFPLibCall(N->getValueType(0),
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RTLIB::SUB_F32,
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RTLIB::SUB_F64,
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RTLIB::SUB_F80,
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RTLIB::SUB_PPCF128),
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NVT, Ops, 2, false);
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}
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SDValue DAGTypeLegalizer::SoftenFloatRes_FP_EXTEND(SDNode *N) {
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MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
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SDValue Op = N->getOperand(0);
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@ -225,6 +351,39 @@ SDValue DAGTypeLegalizer::SoftenFloatRes_FPOWI(SDNode *N) {
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NVT, Ops, 2, false);
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}
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SDValue DAGTypeLegalizer::SoftenFloatRes_FRINT(SDNode *N) {
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MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
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SDValue Op = GetSoftenedFloat(N->getOperand(0));
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return MakeLibCall(GetFPLibCall(N->getValueType(0),
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RTLIB::RINT_F32,
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RTLIB::RINT_F64,
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RTLIB::RINT_F80,
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RTLIB::RINT_PPCF128),
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NVT, &Op, 1, false);
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}
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SDValue DAGTypeLegalizer::SoftenFloatRes_FSIN(SDNode *N) {
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MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
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SDValue Op = GetSoftenedFloat(N->getOperand(0));
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return MakeLibCall(GetFPLibCall(N->getValueType(0),
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RTLIB::SIN_F32,
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RTLIB::SIN_F64,
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RTLIB::SIN_F80,
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RTLIB::SIN_PPCF128),
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NVT, &Op, 1, false);
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}
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SDValue DAGTypeLegalizer::SoftenFloatRes_FSQRT(SDNode *N) {
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MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
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SDValue Op = GetSoftenedFloat(N->getOperand(0));
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return MakeLibCall(GetFPLibCall(N->getValueType(0),
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RTLIB::SQRT_F32,
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RTLIB::SQRT_F64,
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RTLIB::SQRT_F80,
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RTLIB::SQRT_PPCF128),
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NVT, &Op, 1, false);
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}
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SDValue DAGTypeLegalizer::SoftenFloatRes_FSUB(SDNode *N) {
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MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
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SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
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@ -237,6 +396,17 @@ SDValue DAGTypeLegalizer::SoftenFloatRes_FSUB(SDNode *N) {
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NVT, Ops, 2, false);
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}
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SDValue DAGTypeLegalizer::SoftenFloatRes_FTRUNC(SDNode *N) {
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MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
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SDValue Op = GetSoftenedFloat(N->getOperand(0));
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return MakeLibCall(GetFPLibCall(N->getValueType(0),
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RTLIB::TRUNC_F32,
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RTLIB::TRUNC_F64,
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RTLIB::TRUNC_F80,
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RTLIB::TRUNC_PPCF128),
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NVT, &Op, 1, false);
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}
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SDValue DAGTypeLegalizer::SoftenFloatRes_LOAD(SDNode *N) {
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LoadSDNode *L = cast<LoadSDNode>(N);
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MVT VT = N->getValueType(0);
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@ -607,7 +777,7 @@ void DAGTypeLegalizer::ExpandFloatResult(SDNode *N, unsigned ResNo) {
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case ISD::FPOW: ExpandFloatRes_FPOW(N, Lo, Hi); break;
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case ISD::FPOWI: ExpandFloatRes_FPOWI(N, Lo, Hi); break;
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case ISD::FRINT: ExpandFloatRes_FRINT(N, Lo, Hi); break;
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case ISD::FSIN: ExpandFloatRes_FABS(N, Lo, Hi); break;
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case ISD::FSIN: ExpandFloatRes_FSIN(N, Lo, Hi); break;
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case ISD::FSQRT: ExpandFloatRes_FSQRT(N, Lo, Hi); break;
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case ISD::FSUB: ExpandFloatRes_FSUB(N, Lo, Hi); break;
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case ISD::FTRUNC: ExpandFloatRes_FTRUNC(N, Lo, Hi); break;
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@ -926,14 +1096,14 @@ void DAGTypeLegalizer::ExpandFloatRes_XINT_TO_FP(SDNode *N, SDValue &Lo,
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// though.
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if (SrcVT.bitsLE(MVT::i32)) {
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// The integer can be represented exactly in an f64.
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Src = DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND,
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Src = DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND,
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MVT::i32, Src);
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Lo = DAG.getConstantFP(APFloat(APInt(NVT.getSizeInBits(), 0)), NVT);
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Hi = DAG.getNode(ISD::SINT_TO_FP, NVT, Src);
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} else {
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RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
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if (SrcVT.bitsLE(MVT::i64)) {
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Src = DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND,
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Src = DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND,
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MVT::i64, Src);
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LC = RTLIB::SINTTOFP_I64_PPCF128;
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} else if (SrcVT.bitsLE(MVT::i128)) {
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@ -351,14 +351,28 @@ private:
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SDValue SoftenFloatRes_ConstantFP(ConstantFPSDNode *N);
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SDValue SoftenFloatRes_FABS(SDNode *N);
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SDValue SoftenFloatRes_FADD(SDNode *N);
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SDValue SoftenFloatRes_FCEIL(SDNode *N);
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SDValue SoftenFloatRes_FCOPYSIGN(SDNode *N);
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SDValue SoftenFloatRes_FCOS(SDNode *N);
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SDValue SoftenFloatRes_FDIV(SDNode *N);
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SDValue SoftenFloatRes_FEXP(SDNode *N);
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SDValue SoftenFloatRes_FEXP2(SDNode *N);
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SDValue SoftenFloatRes_FFLOOR(SDNode *N);
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SDValue SoftenFloatRes_FLOG(SDNode *N);
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SDValue SoftenFloatRes_FLOG2(SDNode *N);
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SDValue SoftenFloatRes_FLOG10(SDNode *N);
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SDValue SoftenFloatRes_FMUL(SDNode *N);
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SDValue SoftenFloatRes_FNEARBYINT(SDNode *N);
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SDValue SoftenFloatRes_FNEG(SDNode *N);
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SDValue SoftenFloatRes_FP_EXTEND(SDNode *N);
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SDValue SoftenFloatRes_FP_ROUND(SDNode *N);
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SDValue SoftenFloatRes_FPOW(SDNode *N);
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SDValue SoftenFloatRes_FPOWI(SDNode *N);
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SDValue SoftenFloatRes_FRINT(SDNode *N);
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SDValue SoftenFloatRes_FSIN(SDNode *N);
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SDValue SoftenFloatRes_FSQRT(SDNode *N);
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SDValue SoftenFloatRes_FSUB(SDNode *N);
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SDValue SoftenFloatRes_FTRUNC(SDNode *N);
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SDValue SoftenFloatRes_LOAD(SDNode *N);
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SDValue SoftenFloatRes_SELECT(SDNode *N);
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SDValue SoftenFloatRes_SELECT_CC(SDNode *N);
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16
test/CodeGen/XCore/cos.ll
Normal file
16
test/CodeGen/XCore/cos.ll
Normal file
@ -0,0 +1,16 @@
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; RUN: llvm-as < %s | llc -march=xcore > %t1.s
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; RUN: grep "bl cosf" %t1.s | count 1
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; RUN: grep "bl cos" %t1.s | count 2
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declare double @llvm.cos.f64(double)
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define double @test(double %F) {
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%result = call double @llvm.cos.f64(double %F)
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ret double %result
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}
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declare float @llvm.cos.f32(float)
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define float @testf(float %F) {
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%result = call float @llvm.cos.f32(float %F)
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ret float %result
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}
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16
test/CodeGen/XCore/exp.ll
Normal file
16
test/CodeGen/XCore/exp.ll
Normal file
@ -0,0 +1,16 @@
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; RUN: llvm-as < %s | llc -march=xcore > %t1.s
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; RUN: grep "bl expf" %t1.s | count 1
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; RUN: grep "bl exp" %t1.s | count 2
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declare double @llvm.exp.f64(double)
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define double @test(double %F) {
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%result = call double @llvm.exp.f64(double %F)
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ret double %result
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}
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declare float @llvm.exp.f32(float)
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define float @testf(float %F) {
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%result = call float @llvm.exp.f32(float %F)
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ret float %result
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}
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16
test/CodeGen/XCore/exp2.ll
Normal file
16
test/CodeGen/XCore/exp2.ll
Normal file
@ -0,0 +1,16 @@
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; RUN: llvm-as < %s | llc -march=xcore > %t1.s
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; RUN: grep "bl exp2f" %t1.s | count 1
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; RUN: grep "bl exp2" %t1.s | count 2
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declare double @llvm.exp2.f64(double)
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define double @test(double %F) {
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%result = call double @llvm.exp2.f64(double %F)
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ret double %result
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}
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declare float @llvm.exp2.f32(float)
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define float @testf(float %F) {
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%result = call float @llvm.exp2.f32(float %F)
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ret float %result
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}
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8
test/CodeGen/XCore/fneg.ll
Normal file
8
test/CodeGen/XCore/fneg.ll
Normal file
@ -0,0 +1,8 @@
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; RUN: llvm-as < %s | llc -march=xcore > %t1.s
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; RUN: grep "bl __subdf3" %t1.s | count 1
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define i1 @test(double %F) nounwind {
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entry:
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%0 = sub double -0.000000e+00, %F
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%1 = fcmp olt double 0.000000e+00, %0
|
||||
ret i1 %1
|
||||
}
|
16
test/CodeGen/XCore/log.ll
Normal file
16
test/CodeGen/XCore/log.ll
Normal file
@ -0,0 +1,16 @@
|
||||
; RUN: llvm-as < %s | llc -march=xcore > %t1.s
|
||||
; RUN: grep "bl logf" %t1.s | count 1
|
||||
; RUN: grep "bl log" %t1.s | count 2
|
||||
declare double @llvm.log.f64(double)
|
||||
|
||||
define double @test(double %F) {
|
||||
%result = call double @llvm.log.f64(double %F)
|
||||
ret double %result
|
||||
}
|
||||
|
||||
declare float @llvm.log.f32(float)
|
||||
|
||||
define float @testf(float %F) {
|
||||
%result = call float @llvm.log.f32(float %F)
|
||||
ret float %result
|
||||
}
|
16
test/CodeGen/XCore/log10.ll
Normal file
16
test/CodeGen/XCore/log10.ll
Normal file
@ -0,0 +1,16 @@
|
||||
; RUN: llvm-as < %s | llc -march=xcore > %t1.s
|
||||
; RUN: grep "bl log10f" %t1.s | count 1
|
||||
; RUN: grep "bl log10" %t1.s | count 2
|
||||
declare double @llvm.log10.f64(double)
|
||||
|
||||
define double @test(double %F) {
|
||||
%result = call double @llvm.log10.f64(double %F)
|
||||
ret double %result
|
||||
}
|
||||
|
||||
declare float @llvm.log10.f32(float)
|
||||
|
||||
define float @testf(float %F) {
|
||||
%result = call float @llvm.log10.f32(float %F)
|
||||
ret float %result
|
||||
}
|
16
test/CodeGen/XCore/log2.ll
Normal file
16
test/CodeGen/XCore/log2.ll
Normal file
@ -0,0 +1,16 @@
|
||||
; RUN: llvm-as < %s | llc -march=xcore > %t1.s
|
||||
; RUN: grep "bl log2f" %t1.s | count 1
|
||||
; RUN: grep "bl log2" %t1.s | count 2
|
||||
declare double @llvm.log2.f64(double)
|
||||
|
||||
define double @test(double %F) {
|
||||
%result = call double @llvm.log2.f64(double %F)
|
||||
ret double %result
|
||||
}
|
||||
|
||||
declare float @llvm.log2.f32(float)
|
||||
|
||||
define float @testf(float %F) {
|
||||
%result = call float @llvm.log2.f32(float %F)
|
||||
ret float %result
|
||||
}
|
16
test/CodeGen/XCore/pow.ll
Normal file
16
test/CodeGen/XCore/pow.ll
Normal file
@ -0,0 +1,16 @@
|
||||
; RUN: llvm-as < %s | llc -march=xcore > %t1.s
|
||||
; RUN: grep "bl powf" %t1.s | count 1
|
||||
; RUN: grep "bl pow" %t1.s | count 2
|
||||
declare double @llvm.pow.f64(double, double)
|
||||
|
||||
define double @test(double %F, double %power) {
|
||||
%result = call double @llvm.pow.f64(double %F, double %power)
|
||||
ret double %result
|
||||
}
|
||||
|
||||
declare float @llvm.pow.f32(float, float)
|
||||
|
||||
define float @testf(float %F, float %power) {
|
||||
%result = call float @llvm.pow.f32(float %F, float %power)
|
||||
ret float %result
|
||||
}
|
16
test/CodeGen/XCore/powi.ll
Normal file
16
test/CodeGen/XCore/powi.ll
Normal file
@ -0,0 +1,16 @@
|
||||
; RUN: llvm-as < %s | llc -march=xcore > %t1.s
|
||||
; RUN: grep "bl __powidf2" %t1.s | count 1
|
||||
; RUN: grep "bl __powisf2" %t1.s | count 1
|
||||
declare double @llvm.powi.f64(double, i32)
|
||||
|
||||
define double @test(double %F, i32 %power) {
|
||||
%result = call double @llvm.powi.f64(double %F, i32 %power)
|
||||
ret double %result
|
||||
}
|
||||
|
||||
declare float @llvm.powi.f32(float, i32)
|
||||
|
||||
define float @testf(float %F, i32 %power) {
|
||||
%result = call float @llvm.powi.f32(float %F, i32 %power)
|
||||
ret float %result
|
||||
}
|
16
test/CodeGen/XCore/sin.ll
Normal file
16
test/CodeGen/XCore/sin.ll
Normal file
@ -0,0 +1,16 @@
|
||||
; RUN: llvm-as < %s | llc -march=xcore > %t1.s
|
||||
; RUN: grep "bl sinf" %t1.s | count 1
|
||||
; RUN: grep "bl sin" %t1.s | count 2
|
||||
declare double @llvm.sin.f64(double)
|
||||
|
||||
define double @test(double %F) {
|
||||
%result = call double @llvm.sin.f64(double %F)
|
||||
ret double %result
|
||||
}
|
||||
|
||||
declare float @llvm.sin.f32(float)
|
||||
|
||||
define float @testf(float %F) {
|
||||
%result = call float @llvm.sin.f32(float %F)
|
||||
ret float %result
|
||||
}
|
16
test/CodeGen/XCore/sqrt.ll
Normal file
16
test/CodeGen/XCore/sqrt.ll
Normal file
@ -0,0 +1,16 @@
|
||||
; RUN: llvm-as < %s | llc -march=xcore > %t1.s
|
||||
; RUN: grep "bl sqrtf" %t1.s | count 1
|
||||
; RUN: grep "bl sqrt" %t1.s | count 2
|
||||
declare double @llvm.sqrt.f64(double)
|
||||
|
||||
define double @test(double %F) {
|
||||
%result = call double @llvm.sqrt.f64(double %F)
|
||||
ret double %result
|
||||
}
|
||||
|
||||
declare float @llvm.sqrt.f32(float)
|
||||
|
||||
define float @testf(float %F) {
|
||||
%result = call float @llvm.sqrt.f32(float %F)
|
||||
ret float %result
|
||||
}
|
Loading…
Reference in New Issue
Block a user