2012-02-18 12:03:15 +00:00
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//===-- Thumb1InstrInfo.cpp - Thumb-1 Instruction Information -------------===//
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2009-06-26 21:28:53 +00:00
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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2009-07-02 22:18:33 +00:00
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// This file contains the Thumb-1 implementation of the TargetInstrInfo class.
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2009-06-26 21:28:53 +00:00
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//
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//===----------------------------------------------------------------------===//
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2009-11-06 23:52:48 +00:00
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#include "Thumb1InstrInfo.h"
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2009-06-26 21:28:53 +00:00
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#include "ARM.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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2009-11-01 22:04:35 +00:00
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#include "llvm/CodeGen/MachineMemOperand.h"
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2012-12-03 16:50:05 +00:00
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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2012-02-28 23:53:30 +00:00
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#include "llvm/MC/MCInst.h"
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2009-06-26 21:28:53 +00:00
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using namespace llvm;
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2009-11-02 00:10:38 +00:00
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Thumb1InstrInfo::Thumb1InstrInfo(const ARMSubtarget &STI)
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: ARMBaseInstrInfo(STI), RI(*this, STI) {
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2009-06-26 21:28:53 +00:00
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}
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2012-02-28 23:53:30 +00:00
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/// getNoopForMachoTarget - Return the noop instruction to use for a noop.
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void Thumb1InstrInfo::getNoopForMachoTarget(MCInst &NopInst) const {
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NopInst.setOpcode(ARM::tMOVr);
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NopInst.addOperand(MCOperand::CreateReg(ARM::R8));
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NopInst.addOperand(MCOperand::CreateReg(ARM::R8));
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NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
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NopInst.addOperand(MCOperand::CreateReg(0));
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}
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2009-07-11 06:43:01 +00:00
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unsigned Thumb1InstrInfo::getUnindexedOpcode(unsigned Opc) const {
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2009-07-08 16:09:28 +00:00
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return 0;
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}
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2010-07-11 06:33:54 +00:00
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void Thumb1InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I, DebugLoc DL,
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unsigned DestReg, unsigned SrcReg,
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bool KillSrc) const {
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2011-06-30 23:38:17 +00:00
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AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tMOVr), DestReg)
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2011-06-30 22:10:46 +00:00
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.addReg(SrcReg, getKillRegState(KillSrc)));
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2010-07-11 06:33:54 +00:00
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assert(ARM::GPRRegClass.contains(DestReg, SrcReg) &&
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"Thumb1 can only copy GPR registers");
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2009-06-26 21:28:53 +00:00
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}
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2009-07-02 22:18:33 +00:00
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void Thumb1InstrInfo::
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2009-06-26 21:28:53 +00:00
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storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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unsigned SrcReg, bool isKill, int FI,
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2010-05-06 19:06:44 +00:00
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const TargetRegisterClass *RC,
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const TargetRegisterInfo *TRI) const {
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2012-04-20 07:30:17 +00:00
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assert((RC == &ARM::tGPRRegClass ||
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2009-08-13 05:40:51 +00:00
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(TargetRegisterInfo::isPhysicalRegister(SrcReg) &&
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isARMLowRegister(SrcReg))) && "Unknown regclass!");
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2009-06-26 21:28:53 +00:00
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2012-04-20 07:30:17 +00:00
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if (RC == &ARM::tGPRRegClass ||
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2010-01-15 22:21:03 +00:00
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(TargetRegisterInfo::isPhysicalRegister(SrcReg) &&
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isARMLowRegister(SrcReg))) {
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2010-05-06 19:06:44 +00:00
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DebugLoc DL;
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if (I != MBB.end()) DL = I->getDebugLoc();
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2009-11-01 22:04:35 +00:00
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MachineFunction &MF = *MBB.getParent();
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MachineFrameInfo &MFI = *MF.getFrameInfo();
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MachineMemOperand *MMO =
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2011-11-15 07:34:52 +00:00
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MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FI),
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2010-09-21 04:39:43 +00:00
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MachineMemOperand::MOStore,
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2009-11-01 22:04:35 +00:00
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MFI.getObjectSize(FI),
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MFI.getObjectAlignment(FI));
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2011-06-29 20:26:39 +00:00
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AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tSTRspi))
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2009-07-11 06:43:01 +00:00
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.addReg(SrcReg, getKillRegState(isKill))
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2009-11-01 22:04:35 +00:00
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.addFrameIndex(FI).addImm(0).addMemOperand(MMO));
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2009-06-26 21:28:53 +00:00
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}
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}
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2009-07-02 22:18:33 +00:00
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void Thumb1InstrInfo::
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2009-06-26 21:28:53 +00:00
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loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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unsigned DestReg, int FI,
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2010-05-06 19:06:44 +00:00
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const TargetRegisterClass *RC,
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const TargetRegisterInfo *TRI) const {
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2012-04-20 07:30:17 +00:00
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assert((RC == &ARM::tGPRRegClass ||
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2009-08-13 05:40:51 +00:00
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(TargetRegisterInfo::isPhysicalRegister(DestReg) &&
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isARMLowRegister(DestReg))) && "Unknown regclass!");
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2009-06-26 21:28:53 +00:00
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2012-04-20 07:30:17 +00:00
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if (RC == &ARM::tGPRRegClass ||
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2010-01-15 22:21:03 +00:00
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(TargetRegisterInfo::isPhysicalRegister(DestReg) &&
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isARMLowRegister(DestReg))) {
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2010-05-06 19:06:44 +00:00
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DebugLoc DL;
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if (I != MBB.end()) DL = I->getDebugLoc();
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2009-11-01 22:04:35 +00:00
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MachineFunction &MF = *MBB.getParent();
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MachineFrameInfo &MFI = *MF.getFrameInfo();
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MachineMemOperand *MMO =
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2011-11-15 07:34:52 +00:00
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MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FI),
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2010-09-21 04:39:43 +00:00
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MachineMemOperand::MOLoad,
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2009-11-01 22:04:35 +00:00
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MFI.getObjectSize(FI),
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MFI.getObjectAlignment(FI));
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2011-06-29 20:26:39 +00:00
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AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tLDRspi), DestReg)
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2009-11-01 22:04:35 +00:00
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.addFrameIndex(FI).addImm(0).addMemOperand(MMO));
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2009-06-26 21:28:53 +00:00
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}
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}
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