2004-09-22 21:38:42 +00:00
|
|
|
//===- SparcV8InstrFormats.td - SparcV8 Instr Formats ------*- tablegen -*-===//
|
|
|
|
//
|
2004-02-25 20:52:20 +00:00
|
|
|
// The LLVM Compiler Infrastructure
|
|
|
|
//
|
|
|
|
// This file was developed by the LLVM research group and is distributed under
|
|
|
|
// the University of Illinois Open Source License. See LICENSE.TXT for details.
|
|
|
|
//
|
|
|
|
//===----------------------------------------------------------------------===//
|
2004-09-22 21:38:42 +00:00
|
|
|
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
// Format #2 instruction classes in the SparcV8
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
|
|
|
|
class F2 : InstV8 { // Format 2 instructions
|
|
|
|
bits<3> op2;
|
|
|
|
bits<22> imm22;
|
|
|
|
let op = 0; // op = 0
|
|
|
|
let Inst{24-22} = op2;
|
|
|
|
let Inst{21-0} = imm22;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Specific F2 classes: SparcV8 manual, page 44
|
2004-02-25 20:52:20 +00:00
|
|
|
//
|
2004-09-22 21:38:42 +00:00
|
|
|
class F2_1<bits<3> op2Val, string name> : F2 {
|
|
|
|
bits<5> rd;
|
|
|
|
|
|
|
|
let op2 = op2Val;
|
|
|
|
let Name = name;
|
|
|
|
|
|
|
|
let Inst{29-25} = rd;
|
|
|
|
}
|
|
|
|
|
|
|
|
class F2_2<bits<4> condVal, bits<3> op2Val, string name> : F2 {
|
|
|
|
bits<4> cond;
|
|
|
|
bit annul = 0; // currently unused
|
|
|
|
|
|
|
|
let cond = condVal;
|
|
|
|
let op2 = op2Val;
|
|
|
|
let Name = name;
|
|
|
|
|
|
|
|
let Inst{29} = annul;
|
|
|
|
let Inst{28-25} = cond;
|
|
|
|
}
|
|
|
|
|
|
|
|
//===----------------------------------------------------------------------===//
|
2004-02-25 20:52:20 +00:00
|
|
|
// Format #3 instruction classes in the SparcV8
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
|
|
|
|
class F3 : InstV8 {
|
|
|
|
bits<5> rd;
|
|
|
|
bits<6> op3;
|
|
|
|
bits<5> rs1;
|
|
|
|
let op{1} = 1; // Op = 2 or 3
|
|
|
|
let Inst{29-25} = rd;
|
|
|
|
let Inst{24-19} = op3;
|
|
|
|
let Inst{18-14} = rs1;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Specific F3 classes: SparcV8 manual, page 44
|
|
|
|
//
|
|
|
|
class F3_1<bits<2> opVal, bits<6> op3val, string name> : F3 {
|
2004-10-14 21:53:39 +00:00
|
|
|
bits<8> asi = 0; // asi not currently used in SparcV8
|
2004-02-25 20:52:20 +00:00
|
|
|
bits<5> rs2;
|
|
|
|
|
|
|
|
let op = opVal;
|
|
|
|
let op3 = op3val;
|
|
|
|
let Name = name;
|
|
|
|
|
|
|
|
let Inst{13} = 0; // i field = 0
|
|
|
|
let Inst{12-5} = asi; // address space identifier
|
|
|
|
let Inst{4-0} = rs2;
|
|
|
|
}
|
|
|
|
|
|
|
|
class F3_2<bits<2> opVal, bits<6> op3val, string name> : F3 {
|
|
|
|
bits<13> simm13;
|
|
|
|
|
|
|
|
let op = opVal;
|
|
|
|
let op3 = op3val;
|
|
|
|
let Name = name;
|
|
|
|
|
|
|
|
let Inst{13} = 1; // i field = 1
|
|
|
|
let Inst{12-0} = simm13;
|
|
|
|
}
|
|
|
|
|
2004-06-18 06:28:21 +00:00
|
|
|
// floating-point
|
|
|
|
class F3_3<bits<2> opVal, bits<6> op3val, bits<9> opfval, string name> : F3 {
|
2004-02-25 20:52:20 +00:00
|
|
|
bits<5> rs2;
|
|
|
|
|
|
|
|
let op = opVal;
|
|
|
|
let op3 = op3val;
|
|
|
|
let Name = name;
|
|
|
|
|
2004-06-18 06:28:21 +00:00
|
|
|
let Inst{13-5} = opfval; // fp opcode
|
2004-02-25 20:52:20 +00:00
|
|
|
let Inst{4-0} = rs2;
|
|
|
|
}
|