2010-11-15 08:49:58 +00:00
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//===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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2011-07-25 19:53:23 +00:00
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#include "MCTargetDesc/PPCMCTargetDesc.h"
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#include "MCTargetDesc/PPCFixupKinds.h"
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2012-03-17 18:46:09 +00:00
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#include "llvm/MC/MCAsmBackend.h"
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2011-08-02 15:51:38 +00:00
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#include "llvm/MC/MCELFObjectWriter.h"
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2012-03-26 06:58:25 +00:00
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#include "llvm/MC/MCFixupKindInfo.h"
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2010-12-16 16:08:33 +00:00
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#include "llvm/MC/MCMachObjectWriter.h"
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2010-11-15 08:49:58 +00:00
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#include "llvm/MC/MCObjectWriter.h"
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2012-12-03 16:50:05 +00:00
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#include "llvm/MC/MCSectionMachO.h"
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2011-06-24 23:44:37 +00:00
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#include "llvm/MC/MCValue.h"
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2010-11-27 04:38:36 +00:00
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#include "llvm/Object/MachOFormat.h"
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2011-08-02 15:51:38 +00:00
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#include "llvm/Support/ELF.h"
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#include "llvm/Support/ErrorHandling.h"
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2011-08-24 18:08:43 +00:00
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#include "llvm/Support/TargetRegistry.h"
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2010-11-15 08:49:58 +00:00
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using namespace llvm;
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2011-08-02 15:51:38 +00:00
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static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
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switch (Kind) {
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default:
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llvm_unreachable("Unknown fixup kind!");
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case FK_Data_1:
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case FK_Data_2:
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case FK_Data_4:
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2012-10-25 12:27:42 +00:00
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case FK_Data_8:
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case PPC::fixup_ppc_toc:
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2012-12-04 16:18:08 +00:00
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case PPC::fixup_ppc_tlsreg:
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2012-12-12 19:29:35 +00:00
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case PPC::fixup_ppc_nofixup:
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2011-08-02 15:51:38 +00:00
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return Value;
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2012-10-25 12:27:42 +00:00
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case PPC::fixup_ppc_lo14:
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case PPC::fixup_ppc_toc16_ds:
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return (Value & 0xffff) << 2;
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2011-08-02 15:51:38 +00:00
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case PPC::fixup_ppc_brcond14:
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2012-10-25 12:27:42 +00:00
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return Value & 0xfffc;
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2011-08-02 15:51:38 +00:00
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case PPC::fixup_ppc_br24:
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return Value & 0x3fffffc;
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#if 0
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case PPC::fixup_ppc_hi16:
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return (Value >> 16) & 0xffff;
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#endif
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case PPC::fixup_ppc_ha16:
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return ((Value >> 16) + ((Value & 0x8000) ? 1 : 0)) & 0xffff;
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case PPC::fixup_ppc_lo16:
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2012-10-25 12:27:42 +00:00
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case PPC::fixup_ppc_toc16:
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2011-08-02 15:51:38 +00:00
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return Value & 0xffff;
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}
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}
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2010-11-15 08:49:58 +00:00
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namespace {
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2010-12-16 16:09:19 +00:00
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class PPCMachObjectWriter : public MCMachObjectTargetWriter {
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2010-12-16 17:21:02 +00:00
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public:
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PPCMachObjectWriter(bool Is64Bit, uint32_t CPUType,
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uint32_t CPUSubtype)
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: MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
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2011-06-24 23:44:37 +00:00
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void RecordRelocation(MachObjectWriter *Writer,
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const MCAssembler &Asm, const MCAsmLayout &Layout,
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const MCFragment *Fragment, const MCFixup &Fixup,
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2012-11-24 15:23:49 +00:00
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MCValue Target, uint64_t &FixedValue) {
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llvm_unreachable("Relocation emission for MachO/PPC unimplemented!");
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}
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2010-12-16 16:09:19 +00:00
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};
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2011-07-25 23:24:55 +00:00
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class PPCAsmBackend : public MCAsmBackend {
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2010-12-16 16:08:43 +00:00
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const Target &TheTarget;
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public:
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2011-07-25 23:24:55 +00:00
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PPCAsmBackend(const Target &T) : MCAsmBackend(), TheTarget(T) {}
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2010-12-16 03:20:06 +00:00
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2010-12-16 16:08:43 +00:00
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unsigned getNumFixupKinds() const { return PPC::NumTargetFixupKinds; }
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const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const {
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const static MCFixupKindInfo Infos[PPC::NumTargetFixupKinds] = {
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// name offset bits flags
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{ "fixup_ppc_br24", 6, 24, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_ppc_brcond14", 16, 14, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_ppc_lo16", 16, 16, 0 },
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{ "fixup_ppc_ha16", 16, 16, 0 },
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2012-10-25 12:27:42 +00:00
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{ "fixup_ppc_lo14", 16, 14, 0 },
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{ "fixup_ppc_toc", 0, 64, 0 },
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{ "fixup_ppc_toc16", 16, 16, 0 },
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2012-12-04 16:18:08 +00:00
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{ "fixup_ppc_toc16_ds", 16, 14, 0 },
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This patch implements the general dynamic TLS model for 64-bit PowerPC.
Given a thread-local symbol x with global-dynamic access, the generated
code to obtain x's address is:
Instruction Relocation Symbol
addis ra,r2,x@got@tlsgd@ha R_PPC64_GOT_TLSGD16_HA x
addi r3,ra,x@got@tlsgd@l R_PPC64_GOT_TLSGD16_L x
bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x
R_PPC64_REL24 __tls_get_addr
nop
<use address in r3>
The implementation borrows from the medium code model work for introducing
special forms of ADDIS and ADDI into the DAG representation. This is made
slightly more complicated by having to introduce a call to the external
function __tls_get_addr. Using the full call machinery is overkill and,
more importantly, makes it difficult to add a special relocation. So I've
introduced another opcode GET_TLS_ADDR to represent the function call, and
surrounded it with register copies to set up the parameter and return value.
Most of the code is pretty straightforward. I ran into one peculiarity
when I introduced a new PPC opcode BL8_NOP_ELF_TLSGD, which is just like
BL8_NOP_ELF except that it takes another parameter to represent the symbol
("x" above) that requires a relocation on the call. Something in the
TblGen machinery causes BL8_NOP_ELF and BL8_NOP_ELF_TLSGD to be treated
identically during the emit phase, so this second operand was never
visited to generate relocations. This is the reason for the slightly
messy workaround in PPCMCCodeEmitter.cpp:getDirectBrEncoding().
Two new tests are included to demonstrate correct external assembly and
correct generation of relocations using the integrated assembler.
Comments welcome!
Thanks,
Bill
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169910 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 20:30:11 +00:00
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{ "fixup_ppc_tlsreg", 0, 0, 0 },
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2012-12-12 19:29:35 +00:00
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{ "fixup_ppc_nofixup", 0, 0, 0 }
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2010-12-16 16:08:43 +00:00
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};
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2012-01-18 18:52:20 +00:00
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2010-12-16 16:08:43 +00:00
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if (Kind < FirstTargetFixupKind)
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2011-07-25 23:24:55 +00:00
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return MCAsmBackend::getFixupKindInfo(Kind);
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2012-01-18 18:52:20 +00:00
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2010-12-16 16:08:43 +00:00
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assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
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"Invalid kind!");
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return Infos[Kind - FirstTargetFixupKind];
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}
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2012-01-18 18:52:20 +00:00
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2012-11-24 13:18:17 +00:00
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void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
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uint64_t Value) const {
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Value = adjustFixupValue(Fixup.getKind(), Value);
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if (!Value) return; // Doesn't change encoding.
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unsigned Offset = Fixup.getOffset();
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// For each byte of the fragment that the fixup touches, mask in the bits
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// from the fixup value. The Value has been "split up" into the appropriate
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// bitfields above.
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for (unsigned i = 0; i != 4; ++i)
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Data[Offset + i] |= uint8_t((Value >> ((4 - i - 1)*8)) & 0xff);
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}
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2012-01-18 18:52:16 +00:00
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bool mayNeedRelaxation(const MCInst &Inst) const {
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2010-12-16 16:08:43 +00:00
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// FIXME.
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return false;
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}
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2011-12-06 00:47:03 +00:00
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bool fixupNeedsRelaxation(const MCFixup &Fixup,
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uint64_t Value,
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2013-01-08 00:22:56 +00:00
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const MCRelaxableFragment *DF,
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2011-12-06 00:47:03 +00:00
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const MCAsmLayout &Layout) const {
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// FIXME.
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2012-02-07 02:50:20 +00:00
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llvm_unreachable("relaxInstruction() unimplemented");
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2011-12-06 00:47:03 +00:00
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}
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2012-01-18 18:52:20 +00:00
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2012-01-18 18:52:16 +00:00
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void relaxInstruction(const MCInst &Inst, MCInst &Res) const {
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2010-12-16 16:08:43 +00:00
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// FIXME.
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2012-02-07 02:50:20 +00:00
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llvm_unreachable("relaxInstruction() unimplemented");
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2010-12-16 16:08:43 +00:00
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}
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2012-01-18 18:52:20 +00:00
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2012-01-18 18:52:16 +00:00
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bool writeNopData(uint64_t Count, MCObjectWriter *OW) const {
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2010-12-16 16:08:43 +00:00
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// FIXME: Zero fill for now. That's not right, but at least will get the
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// section size right.
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for (uint64_t i = 0; i != Count; ++i)
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OW->Write8(0);
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return true;
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2012-01-18 18:52:20 +00:00
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}
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2010-12-16 16:08:43 +00:00
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unsigned getPointerSize() const {
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StringRef Name = TheTarget.getName();
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if (Name == "ppc64") return 8;
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assert(Name == "ppc32" && "Unknown target name!");
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return 4;
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}
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};
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2010-11-15 08:49:58 +00:00
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} // end anonymous namespace
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// FIXME: This should be in a separate file.
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namespace {
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class DarwinPPCAsmBackend : public PPCAsmBackend {
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public:
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2010-12-17 02:06:08 +00:00
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DarwinPPCAsmBackend(const Target &T) : PPCAsmBackend(T) { }
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2012-01-18 18:52:20 +00:00
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2010-11-15 08:49:58 +00:00
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MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
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bool is64 = getPointerSize() == 8;
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2010-12-16 17:21:02 +00:00
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return createMachObjectWriter(new PPCMachObjectWriter(
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/*Is64Bit=*/is64,
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(is64 ? object::mach::CTM_PowerPC64 :
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object::mach::CTM_PowerPC),
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object::mach::CSPPC_ALL),
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OS, /*IsLittleEndian=*/false);
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2010-11-15 08:49:58 +00:00
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}
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2012-01-18 18:52:20 +00:00
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2010-11-15 08:49:58 +00:00
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virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
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return false;
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}
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};
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2011-08-02 15:51:38 +00:00
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class ELFPPCAsmBackend : public PPCAsmBackend {
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2011-12-21 17:00:36 +00:00
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uint8_t OSABI;
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2011-08-02 15:51:38 +00:00
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public:
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2011-12-21 17:00:36 +00:00
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ELFPPCAsmBackend(const Target &T, uint8_t OSABI) :
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PPCAsmBackend(T), OSABI(OSABI) { }
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2012-01-18 18:52:20 +00:00
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2011-08-02 15:51:38 +00:00
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MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
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bool is64 = getPointerSize() == 8;
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2011-12-22 18:38:06 +00:00
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return createPPCELFObjectWriter(OS, is64, OSABI);
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2011-08-02 15:51:38 +00:00
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}
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2012-01-18 18:52:20 +00:00
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2011-08-02 15:51:38 +00:00
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virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
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return false;
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}
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};
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2010-11-15 08:49:58 +00:00
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} // end anonymous namespace
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2012-09-18 16:08:49 +00:00
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MCAsmBackend *llvm::createPPCAsmBackend(const Target &T, StringRef TT, StringRef CPU) {
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2011-04-19 21:14:45 +00:00
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if (Triple(TT).isOSDarwin())
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2010-11-15 08:49:58 +00:00
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return new DarwinPPCAsmBackend(T);
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2011-04-19 21:14:45 +00:00
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2011-12-21 17:00:36 +00:00
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uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(Triple(TT).getOS());
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return new ELFPPCAsmBackend(T, OSABI);
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2010-11-15 08:49:58 +00:00
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}
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