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llvm-6502/test/CodeGen/PowerPC/ppc32-i1-vaarg.ll

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When using CR bit registers on PPC32, handle the i1 vaarg case When copying an i1 value into a GPR for a vaarg call, we need to explicitly zero-extend the i1 value (otherwise an invalid CRBIT -> GPR copy will be generated). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203041 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-06 00:23:33 +00:00
; RUN: llc < %s -march=ppc32 -mcpu=ppc32 | FileCheck %s
Fixup PPC Darwin i1 argument handling Like on other targets, we need to zero_extend/truncate i1 args before copying them to GPRs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203045 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-06 00:45:19 +00:00
; RUN: llc < %s -march=ppc32 -mcpu=ppc32 -mtriple=powerpc-darwin | FileCheck %s -check-prefix=CHECK-D
When using CR bit registers on PPC32, handle the i1 vaarg case When copying an i1 value into a GPR for a vaarg call, we need to explicitly zero-extend the i1 value (otherwise an invalid CRBIT -> GPR copy will be generated). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203041 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-06 00:23:33 +00:00
target triple = "powerpc-unknown-linux-gnu"
declare void @printf(i8*, ...)
define void @main() {
call void (i8*, ...)* @printf(i8* undef, i1 false)
ret void
}
; CHECK-LABEL: @main
; CHECK-DAG li 4, 0
; CHECK-DAG: crxor 6, 6, 6
; CHECK: bl printf
Fixup PPC Darwin i1 argument handling Like on other targets, we need to zero_extend/truncate i1 args before copying them to GPRs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203045 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-06 00:45:19 +00:00
; CHECK-D-LABEL: @main
; CHECK-D: li r4, 0
; CHECK-D: bl L_printf$stub
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