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llvm-6502/test/CodeGen/PowerPC/2010-02-12-saveCR.ll

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specify cpu for test to fix failure on some darwin systems with a g4+ cpu git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145699 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 19:38:17 +00:00
; RUN: llc < %s -mtriple=powerpc-apple-darwin -mcpu=g4 | FileCheck %s
When save/restoring CR at prolog/epilog, in a large stack frame, the prolog/epilog code was using the same register for the copy of CR and the address of the save slot. Oops. This is fixed here for Darwin, sort of, by reserving R2 for this case. A better way would be to do the store before the decrement of SP, which is safe on Darwin due to the red zone. SVR4 probably has the same problem, but I don't know how to fix it; there is no red zone and R2 is already used for something else. I'm going to leave it to someone interested in that target. Better still would be to rewrite the CR-saving code completely; spilling each CR subregister individually is horrible code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96015 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 21:35:34 +00:00
; ModuleID = 'hh.c'
target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128-n32"
target triple = "powerpc-apple-darwin9.6"
; This formerly used R0 for both the stack address and CR.
define void @foo() nounwind {
entry:
;CHECK: mfcr r2
;CHECK: lis r0, 1
adjust the instruction ordering in some PPC tests: changes due to postRA haz. rec. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145678 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 04:58:12 +00:00
;CHECK: rlwinm r2, r2, 8, 0, 31
remove wasted space for extra bit copies of CR2 subregs git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145817 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 17:55:06 +00:00
;CHECK: ori r0, r0, 34524
When save/restoring CR at prolog/epilog, in a large stack frame, the prolog/epilog code was using the same register for the copy of CR and the address of the save slot. Oops. This is fixed here for Darwin, sort of, by reserving R2 for this case. A better way would be to do the store before the decrement of SP, which is safe on Darwin due to the red zone. SVR4 probably has the same problem, but I don't know how to fix it; there is no red zone and R2 is already used for something else. I'm going to leave it to someone interested in that target. Better still would be to rewrite the CR-saving code completely; spilling each CR subregister individually is horrible code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96015 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 21:35:34 +00:00
;CHECK: stwx r2, r1, r0
%x = alloca [100000 x i8] ; <[100000 x i8]*> [#uses=1]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
%x1 = bitcast [100000 x i8]* %x to i8* ; <i8*> [#uses=1]
call void @bar(i8* %x1) nounwind
call void asm sideeffect "", "~{cr2}"() nounwind
br label %return
return: ; preds = %entry
;CHECK: lis r0, 1
remove wasted space for extra bit copies of CR2 subregs git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145817 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 17:55:06 +00:00
;CHECK: ori r0, r0, 34524
When save/restoring CR at prolog/epilog, in a large stack frame, the prolog/epilog code was using the same register for the copy of CR and the address of the save slot. Oops. This is fixed here for Darwin, sort of, by reserving R2 for this case. A better way would be to do the store before the decrement of SP, which is safe on Darwin due to the red zone. SVR4 probably has the same problem, but I don't know how to fix it; there is no red zone and R2 is already used for something else. I'm going to leave it to someone interested in that target. Better still would be to rewrite the CR-saving code completely; spilling each CR subregister individually is horrible code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96015 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 21:35:34 +00:00
;CHECK: lwzx r2, r1, r0
;CHECK: rlwinm r2, r2, 24, 0, 31
;CHECK: mtcrf 32, r2
ret void
}
declare void @bar(i8*)
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