Hal Finkel c4785181a1 remove wasted space for extra bit copies of CR2 subregs ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145817 91177308-0d34-0410-b5e6-96231b3b80d8

2011-12-05 17:55:06 +00:00

..

ARM

Emit the ctors in the proper order on ARM/EABI.

2011-12-03 23:49:37 +00:00

CBackend

Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic.

2011-11-27 06:54:59 +00:00

CellSPU

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CPP

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Generic

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MBlaze

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Mips

Test cases for 64-bit multiplication and division.

2011-12-02 22:31:36 +00:00

MSP430

Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic.

2011-11-27 06:54:59 +00:00

PowerPC

remove wasted space for extra bit copies of CR2 subregs

2011-12-05 17:55:06 +00:00

PTX

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SPARC

Sparc CodeGen: Fix AnalyzeBranch for PR 10282. Removing addSuccessor() since

2011-12-03 21:24:48 +00:00

Thumb

Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic.

2011-11-27 06:54:59 +00:00

Thumb2

Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic.

2011-11-27 06:54:59 +00:00

X86

test/CodeGen/X86/pointer-vector.ll: Add explicit -mtriple=i686-linux.

2011-12-05 07:54:57 +00:00

XCore

Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic.

2011-11-27 06:54:59 +00:00