2011-07-06 22:02:34 +00:00
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//===-- ARMMCTargetDesc.h - ARM Target Descriptions -------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides ARM specific target descriptions.
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//
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//===----------------------------------------------------------------------===//
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#ifndef ARMMCTARGETDESC_H
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#define ARMMCTARGETDESC_H
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2011-07-07 00:08:19 +00:00
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#include <string>
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2011-07-06 22:02:34 +00:00
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namespace llvm {
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2011-07-08 01:53:10 +00:00
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class MCSubtargetInfo;
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2011-07-06 22:02:34 +00:00
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class Target;
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2011-07-07 00:08:19 +00:00
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class StringRef;
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2011-07-06 22:02:34 +00:00
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extern Target TheARMTarget, TheThumbTarget;
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2011-07-07 00:08:19 +00:00
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namespace ARM_MC {
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2011-07-07 08:26:46 +00:00
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std::string ParseARMTriple(StringRef TT);
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2011-07-08 01:53:10 +00:00
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/// createARMMCSubtargetInfo - Create a ARM MCSubtargetInfo instance.
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/// This is exposed so Asm parser, etc. do not need to go through
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/// TargetRegistry.
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MCSubtargetInfo *createARMMCSubtargetInfo(StringRef TT, StringRef CPU,
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StringRef FS);
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2011-07-07 00:08:19 +00:00
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}
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2011-07-06 22:02:34 +00:00
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} // End llvm namespace
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// Defines symbolic names for ARM registers. This defines a mapping from
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// register name to register number.
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//
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#define GET_REGINFO_ENUM
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#include "ARMGenRegisterInfo.inc"
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// Defines symbolic names for the ARM instructions.
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//
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#define GET_INSTRINFO_ENUM
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#include "ARMGenInstrInfo.inc"
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2011-07-14 20:59:42 +00:00
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#define GET_SUBTARGETINFO_ENUM
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#include "ARMGenSubtargetInfo.inc"
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2011-07-06 22:02:34 +00:00
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#endif
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