[mips][mips64r6] Use JALR for returns instead of JR (which is not available on MIPS32r6/MIPS64r6)
Summary:
RET, and RET_MM have been replaced by a pseudo named PseudoReturn.
In addition a version with a 64-bit GPR named PseudoReturn64 has been
added.
Instruction selection for a return matches RetRA, which is expanded post
register allocation to PseudoReturn/PseudoReturn64. During MipsAsmPrinter,
this PseudoReturn/PseudoReturn64 are emitted as:
- (JALR64 $zero, $rs) on MIPS64r6
- (JALR $zero, $rs) on MIPS32r6
- (JR_MM $rs) on microMIPS
- (JR $rs) otherwise
On MIPS32r6/MIPS64r6, 'jr $rs' is an alias for 'jalr $zero, $rs'. To aid
development and review (specifically, to ensure all cases of jr are
updated), these aliases are temporarily named 'r6.jr' instead of 'jr'.
A follow up patch will change them back to the correct mnemonic.
Added (JALR $zero, $rs) to MipsNaClELFStreamer's definition of an indirect
jump, and removed it from its definition of a call.
Note: I haven't accounted for MIPS64 in MipsNaClELFStreamer since it's
doesn't appear to account for any MIPS64-specifics.
The return instruction created as part of eh_return expansion is now expanded
using expandRetRA() so we use the right return instruction on MIPS32r6/MIPS64r6
('jalr $zero, $rs').
Also, fixed a misuse of isABI_N64() to detect 64-bit wide registers in
expandEhReturn().
Reviewers: jkolek, vmedic, mseaborn, zoran.jovanovic, dsanders
Reviewed By: dsanders
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D4268
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212604 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-09 10:16:07 +00:00
|
|
|
; RUN: llc -march=mips64el -mcpu=mips4 -asm-show-inst < %s | FileCheck %s -check-prefix=CHECK -check-prefix=NOT-R6
|
|
|
|
|
; RUN: llc -march=mips64el -mcpu=mips64 -asm-show-inst < %s | FileCheck %s -check-prefix=CHECK -check-prefix=NOT-R6
|
|
|
|
|
; RUN: llc -march=mips64el -mcpu=mips64r2 -asm-show-inst < %s | FileCheck %s -check-prefix=CHECK -check-prefix=NOT-R6
|
|
|
|
|
; RUN: llc -march=mips64el -mcpu=mips64r6 -asm-show-inst < %s | FileCheck %s -check-prefix=CHECK -check-prefix=R6
|
2013-01-30 00:28:15 +00:00
|
|
|
|
|
|
|
|
declare void @llvm.eh.return.i64(i64, i8*)
|
|
|
|
|
declare void @foo(...)
|
|
|
|
|
|
|
|
|
|
define void @f1(i64 %offset, i8* %handler) {
|
|
|
|
|
entry:
|
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
See r230786 and r230794 for similar changes to gep and load
respectively.
Call is a bit different because it often doesn't have a single explicit
type - usually the type is deduced from the arguments, and just the
return type is explicit. In those cases there's no need to change the
IR.
When that's not the case, the IR usually contains the pointer type of
the first operand - but since typed pointers are going away, that
representation is insufficient so I'm just stripping the "pointerness"
of the explicit type away.
This does make the IR a bit weird - it /sort of/ reads like the type of
the first operand: "call void () %x(" but %x is actually of type "void
()*" and will eventually be just of type "ptr". But this seems not too
bad and I don't think it would benefit from repeating the type
("void (), void () * %x(" and then eventually "void (), ptr %x(") as has
been done with gep and load.
This also has a side benefit: since the explicit type is no longer a
pointer, there's no ambiguity between an explicit type and a function
that returns a function pointer. Previously this case needed an explicit
type (eg: a function returning a void() function was written as
"call void () () * @x(" rather than "call void () * @x(" because of the
ambiguity between a function returning a pointer to a void() function
and a function returning void).
No ambiguity means even function pointer return types can just be
written alone, without writing the whole function's type.
This leaves /only/ the varargs case where the explicit type is required.
Given the special type syntax in call instructions, the regex-fu used
for migration was a bit more involved in its own unique way (as every
one of these is) so here it is. Use it in conjunction with the apply.sh
script and associated find/xargs commands I've provided in rr230786 to
migrate your out of tree tests. Do let me know if any of this doesn't
cover your cases & we can iterate on a more general script/regexes to
help others with out of tree tests.
About 9 test cases couldn't be automatically migrated - half of those
were functions returning function pointers, where I just had to manually
delete the function argument types now that we didn't need an explicit
function type there. The other half were typedefs of function types used
in calls - just had to manually drop the * from those.
import fileinput
import sys
import re
pat = re.compile(r'((?:=|:|^|\s)call\s(?:[^@]*?))(\s*$|\s*(?:(?:\[\[[a-zA-Z0-9_]+\]\]|[@%](?:(")?[\\\?@a-zA-Z0-9_.]*?(?(3)"|)|{{.*}}))(?:\(|$)|undef|inttoptr|bitcast|null|asm).*$)')
addrspace_end = re.compile(r"addrspace\(\d+\)\s*\*$")
func_end = re.compile("(?:void.*|\)\s*)\*$")
def conv(match, line):
if not match or re.search(addrspace_end, match.group(1)) or not re.search(func_end, match.group(1)):
return line
return line[:match.start()] + match.group(1)[:match.group(1).rfind('*')].rstrip() + match.group(2) + line[match.end():]
for line in sys.stdin:
sys.stdout.write(conv(re.search(pat, line), line))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235145 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-16 23:24:18 +00:00
|
|
|
call void (...) @foo()
|
2013-01-30 00:28:15 +00:00
|
|
|
call void @llvm.eh.return.i64(i64 %offset, i8* %handler)
|
|
|
|
|
unreachable
|
|
|
|
|
|
[mips][mips64r6] Use JALR for returns instead of JR (which is not available on MIPS32r6/MIPS64r6)
Summary:
RET, and RET_MM have been replaced by a pseudo named PseudoReturn.
In addition a version with a 64-bit GPR named PseudoReturn64 has been
added.
Instruction selection for a return matches RetRA, which is expanded post
register allocation to PseudoReturn/PseudoReturn64. During MipsAsmPrinter,
this PseudoReturn/PseudoReturn64 are emitted as:
- (JALR64 $zero, $rs) on MIPS64r6
- (JALR $zero, $rs) on MIPS32r6
- (JR_MM $rs) on microMIPS
- (JR $rs) otherwise
On MIPS32r6/MIPS64r6, 'jr $rs' is an alias for 'jalr $zero, $rs'. To aid
development and review (specifically, to ensure all cases of jr are
updated), these aliases are temporarily named 'r6.jr' instead of 'jr'.
A follow up patch will change them back to the correct mnemonic.
Added (JALR $zero, $rs) to MipsNaClELFStreamer's definition of an indirect
jump, and removed it from its definition of a call.
Note: I haven't accounted for MIPS64 in MipsNaClELFStreamer since it's
doesn't appear to account for any MIPS64-specifics.
The return instruction created as part of eh_return expansion is now expanded
using expandRetRA() so we use the right return instruction on MIPS32r6/MIPS64r6
('jalr $zero, $rs').
Also, fixed a misuse of isABI_N64() to detect 64-bit wide registers in
expandEhReturn().
Reviewers: jkolek, vmedic, mseaborn, zoran.jovanovic, dsanders
Reviewed By: dsanders
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D4268
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212604 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-09 10:16:07 +00:00
|
|
|
; CHECK: f1:
|
2013-01-30 00:28:15 +00:00
|
|
|
; CHECK: daddiu $sp, $sp, -[[spoffset:[0-9]+]]
|
|
|
|
|
|
|
|
|
|
; check that $a0-$a3 are saved on stack.
|
|
|
|
|
; CHECK: sd $4, [[offset0:[0-9]+]]($sp)
|
|
|
|
|
; CHECK: sd $5, [[offset1:[0-9]+]]($sp)
|
|
|
|
|
; CHECK: sd $6, [[offset2:[0-9]+]]($sp)
|
|
|
|
|
; CHECK: sd $7, [[offset3:[0-9]+]]($sp)
|
|
|
|
|
|
|
|
|
|
; check that .cfi_offset directives are emitted for $a0-$a3.
|
|
|
|
|
; CHECK: .cfi_offset 4,
|
|
|
|
|
; CHECK: .cfi_offset 5,
|
|
|
|
|
; CHECK: .cfi_offset 6,
|
|
|
|
|
; CHECK: .cfi_offset 7,
|
|
|
|
|
|
|
|
|
|
; check that stack adjustment and handler are put in $v1 and $v0.
|
2013-03-04 22:25:01 +00:00
|
|
|
; CHECK: move $[[R0:[a-z0-9]+]], $5
|
|
|
|
|
; CHECK: move $[[R1:[a-z0-9]+]], $4
|
|
|
|
|
; CHECK: move $3, $[[R1]]
|
|
|
|
|
; CHECK: move $2, $[[R0]]
|
2013-01-30 00:28:15 +00:00
|
|
|
|
|
|
|
|
; check that $a0-$a3 are restored from stack.
|
|
|
|
|
; CHECK: ld $4, [[offset0]]($sp)
|
|
|
|
|
; CHECK: ld $5, [[offset1]]($sp)
|
|
|
|
|
; CHECK: ld $6, [[offset2]]($sp)
|
|
|
|
|
; CHECK: ld $7, [[offset3]]($sp)
|
|
|
|
|
|
|
|
|
|
; check that stack is adjusted by $v1 and that code returns to address in $v0
|
2013-04-02 23:02:07 +00:00
|
|
|
; also check that $25 contains handler value
|
2013-01-30 00:28:15 +00:00
|
|
|
; CHECK: daddiu $sp, $sp, [[spoffset]]
|
2013-04-02 23:02:07 +00:00
|
|
|
; CHECK: move $25, $2
|
2013-03-04 22:25:01 +00:00
|
|
|
; CHECK: move $ra, $2
|
[mips][mips64r6] Use JALR for returns instead of JR (which is not available on MIPS32r6/MIPS64r6)
Summary:
RET, and RET_MM have been replaced by a pseudo named PseudoReturn.
In addition a version with a 64-bit GPR named PseudoReturn64 has been
added.
Instruction selection for a return matches RetRA, which is expanded post
register allocation to PseudoReturn/PseudoReturn64. During MipsAsmPrinter,
this PseudoReturn/PseudoReturn64 are emitted as:
- (JALR64 $zero, $rs) on MIPS64r6
- (JALR $zero, $rs) on MIPS32r6
- (JR_MM $rs) on microMIPS
- (JR $rs) otherwise
On MIPS32r6/MIPS64r6, 'jr $rs' is an alias for 'jalr $zero, $rs'. To aid
development and review (specifically, to ensure all cases of jr are
updated), these aliases are temporarily named 'r6.jr' instead of 'jr'.
A follow up patch will change them back to the correct mnemonic.
Added (JALR $zero, $rs) to MipsNaClELFStreamer's definition of an indirect
jump, and removed it from its definition of a call.
Note: I haven't accounted for MIPS64 in MipsNaClELFStreamer since it's
doesn't appear to account for any MIPS64-specifics.
The return instruction created as part of eh_return expansion is now expanded
using expandRetRA() so we use the right return instruction on MIPS32r6/MIPS64r6
('jalr $zero, $rs').
Also, fixed a misuse of isABI_N64() to detect 64-bit wide registers in
expandEhReturn().
Reviewers: jkolek, vmedic, mseaborn, zoran.jovanovic, dsanders
Reviewed By: dsanders
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D4268
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212604 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-09 10:16:07 +00:00
|
|
|
; NOT-R6: jr $ra # <MCInst #{{[0-9]+}} JR
|
|
|
|
|
; R6: jr $ra # <MCInst #{{[0-9]+}} JALR
|
2013-01-30 00:28:15 +00:00
|
|
|
; CHECK: daddu $sp, $sp, $3
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
define void @f2(i64 %offset, i8* %handler) {
|
|
|
|
|
entry:
|
|
|
|
|
call void @llvm.eh.return.i64(i64 %offset, i8* %handler)
|
|
|
|
|
unreachable
|
|
|
|
|
|
[mips][mips64r6] Use JALR for returns instead of JR (which is not available on MIPS32r6/MIPS64r6)
Summary:
RET, and RET_MM have been replaced by a pseudo named PseudoReturn.
In addition a version with a 64-bit GPR named PseudoReturn64 has been
added.
Instruction selection for a return matches RetRA, which is expanded post
register allocation to PseudoReturn/PseudoReturn64. During MipsAsmPrinter,
this PseudoReturn/PseudoReturn64 are emitted as:
- (JALR64 $zero, $rs) on MIPS64r6
- (JALR $zero, $rs) on MIPS32r6
- (JR_MM $rs) on microMIPS
- (JR $rs) otherwise
On MIPS32r6/MIPS64r6, 'jr $rs' is an alias for 'jalr $zero, $rs'. To aid
development and review (specifically, to ensure all cases of jr are
updated), these aliases are temporarily named 'r6.jr' instead of 'jr'.
A follow up patch will change them back to the correct mnemonic.
Added (JALR $zero, $rs) to MipsNaClELFStreamer's definition of an indirect
jump, and removed it from its definition of a call.
Note: I haven't accounted for MIPS64 in MipsNaClELFStreamer since it's
doesn't appear to account for any MIPS64-specifics.
The return instruction created as part of eh_return expansion is now expanded
using expandRetRA() so we use the right return instruction on MIPS32r6/MIPS64r6
('jalr $zero, $rs').
Also, fixed a misuse of isABI_N64() to detect 64-bit wide registers in
expandEhReturn().
Reviewers: jkolek, vmedic, mseaborn, zoran.jovanovic, dsanders
Reviewed By: dsanders
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D4268
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212604 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-09 10:16:07 +00:00
|
|
|
; CHECK: f2:
|
2013-05-16 19:44:40 +00:00
|
|
|
; CHECK: .cfi_startproc
|
2013-01-30 00:28:15 +00:00
|
|
|
; CHECK: daddiu $sp, $sp, -[[spoffset:[0-9]+]]
|
2013-05-16 19:44:40 +00:00
|
|
|
; CHECK: .cfi_def_cfa_offset [[spoffset]]
|
2013-01-30 00:28:15 +00:00
|
|
|
|
|
|
|
|
; check that $a0-$a3 are saved on stack.
|
|
|
|
|
; CHECK: sd $4, [[offset0:[0-9]+]]($sp)
|
|
|
|
|
; CHECK: sd $5, [[offset1:[0-9]+]]($sp)
|
|
|
|
|
; CHECK: sd $6, [[offset2:[0-9]+]]($sp)
|
|
|
|
|
; CHECK: sd $7, [[offset3:[0-9]+]]($sp)
|
|
|
|
|
|
|
|
|
|
; check that .cfi_offset directives are emitted for $a0-$a3.
|
2013-05-16 19:44:40 +00:00
|
|
|
; CHECK: .cfi_offset 4, -8
|
|
|
|
|
; CHECK: .cfi_offset 5, -16
|
|
|
|
|
; CHECK: .cfi_offset 6, -24
|
|
|
|
|
; CHECK: .cfi_offset 7, -32
|
2013-01-30 00:28:15 +00:00
|
|
|
|
|
|
|
|
; check that stack adjustment and handler are put in $v1 and $v0.
|
2013-03-04 22:25:01 +00:00
|
|
|
; CHECK: move $3, $4
|
|
|
|
|
; CHECK: move $2, $5
|
2013-01-30 00:28:15 +00:00
|
|
|
|
|
|
|
|
; check that $a0-$a3 are restored from stack.
|
|
|
|
|
; CHECK: ld $4, [[offset0]]($sp)
|
|
|
|
|
; CHECK: ld $5, [[offset1]]($sp)
|
|
|
|
|
; CHECK: ld $6, [[offset2]]($sp)
|
|
|
|
|
; CHECK: ld $7, [[offset3]]($sp)
|
|
|
|
|
|
|
|
|
|
; check that stack is adjusted by $v1 and that code returns to address in $v0
|
2013-04-02 23:02:07 +00:00
|
|
|
; also check that $25 contains handler value
|
2013-01-30 00:28:15 +00:00
|
|
|
; CHECK: daddiu $sp, $sp, [[spoffset]]
|
2013-04-02 23:02:07 +00:00
|
|
|
; CHECK: move $25, $2
|
2013-03-04 22:25:01 +00:00
|
|
|
; CHECK: move $ra, $2
|
[mips][mips64r6] Use JALR for returns instead of JR (which is not available on MIPS32r6/MIPS64r6)
Summary:
RET, and RET_MM have been replaced by a pseudo named PseudoReturn.
In addition a version with a 64-bit GPR named PseudoReturn64 has been
added.
Instruction selection for a return matches RetRA, which is expanded post
register allocation to PseudoReturn/PseudoReturn64. During MipsAsmPrinter,
this PseudoReturn/PseudoReturn64 are emitted as:
- (JALR64 $zero, $rs) on MIPS64r6
- (JALR $zero, $rs) on MIPS32r6
- (JR_MM $rs) on microMIPS
- (JR $rs) otherwise
On MIPS32r6/MIPS64r6, 'jr $rs' is an alias for 'jalr $zero, $rs'. To aid
development and review (specifically, to ensure all cases of jr are
updated), these aliases are temporarily named 'r6.jr' instead of 'jr'.
A follow up patch will change them back to the correct mnemonic.
Added (JALR $zero, $rs) to MipsNaClELFStreamer's definition of an indirect
jump, and removed it from its definition of a call.
Note: I haven't accounted for MIPS64 in MipsNaClELFStreamer since it's
doesn't appear to account for any MIPS64-specifics.
The return instruction created as part of eh_return expansion is now expanded
using expandRetRA() so we use the right return instruction on MIPS32r6/MIPS64r6
('jalr $zero, $rs').
Also, fixed a misuse of isABI_N64() to detect 64-bit wide registers in
expandEhReturn().
Reviewers: jkolek, vmedic, mseaborn, zoran.jovanovic, dsanders
Reviewed By: dsanders
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D4268
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212604 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-09 10:16:07 +00:00
|
|
|
; NOT-R6: jr $ra # <MCInst #{{[0-9]+}} JR
|
|
|
|
|
; R6: jr $ra # <MCInst #{{[0-9]+}} JALR
|
2013-01-30 00:28:15 +00:00
|
|
|
; CHECK: daddu $sp, $sp, $3
|
2013-05-16 19:44:40 +00:00
|
|
|
; CHECK: .cfi_endproc
|
2013-01-30 00:28:15 +00:00
|
|
|
}
|
