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llvm-6502/test/CodeGen/X86/pic_jumptable.ll

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Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode. Before: _main: subq $8, %rsp leaq _X(%rip), %rax movsd 8(%rax), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Now: _main: subq $8, %rsp movsd _X+8(%rip), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Notice there is another idiotic codegen issue that needs to be fixed asap: xorl %ecx, %ecx movl %ecx, %eax git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46850 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-07 08:53:49 +00:00
; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i386-linux-gnu | not grep -F .text
; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i686-apple-darwin | not grep lea
; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i686-apple-darwin | grep add | count 2
Verify that jump tables are emitted to the same section as the function is, when codegen'ing in pic mode. This fixes a miscompilation of a switch stmt in a template, as the template goes to a non-.text section. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30743 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-05 03:12:36 +00:00
Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode. Before: _main: subq $8, %rsp leaq _X(%rip), %rax movsd 8(%rax), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Now: _main: subq $8, %rsp movsd _X+8(%rip), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Notice there is another idiotic codegen issue that needs to be fixed asap: xorl %ecx, %ecx movl %ecx, %eax git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46850 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-07 08:53:49 +00:00
declare void @_Z3bari(i32)
Verify that jump tables are emitted to the same section as the function is, when codegen'ing in pic mode. This fixes a miscompilation of a switch stmt in a template, as the template goes to a non-.text section. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30743 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-05 03:12:36 +00:00
Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode. Before: _main: subq $8, %rsp leaq _X(%rip), %rax movsd 8(%rax), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Now: _main: subq $8, %rsp movsd _X+8(%rip), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Notice there is another idiotic codegen issue that needs to be fixed asap: xorl %ecx, %ecx movl %ecx, %eax git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46850 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-07 08:53:49 +00:00
define linkonce void @_Z3fooILi1EEvi(i32 %Y) {
Verify that jump tables are emitted to the same section as the function is, when codegen'ing in pic mode. This fixes a miscompilation of a switch stmt in a template, as the template goes to a non-.text section. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30743 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-05 03:12:36 +00:00
entry:
Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode. Before: _main: subq $8, %rsp leaq _X(%rip), %rax movsd 8(%rax), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Now: _main: subq $8, %rsp movsd _X+8(%rip), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Notice there is another idiotic codegen issue that needs to be fixed asap: xorl %ecx, %ecx movl %ecx, %eax git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46850 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-07 08:53:49 +00:00
%Y_addr = alloca i32 ; <i32*> [#uses=2]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
store i32 %Y, i32* %Y_addr
%tmp = load i32* %Y_addr ; <i32> [#uses=1]
switch i32 %tmp, label %bb10 [
i32 0, label %bb3
i32 1, label %bb
i32 2, label %bb
i32 3, label %bb
i32 4, label %bb
i32 5, label %bb
i32 6, label %bb
i32 7, label %bb
i32 8, label %bb
i32 9, label %bb
i32 10, label %bb
i32 12, label %bb1
i32 13, label %bb5
i32 14, label %bb6
i32 16, label %bb2
i32 17, label %bb4
i32 23, label %bb8
i32 27, label %bb7
i32 34, label %bb9
Verify that jump tables are emitted to the same section as the function is, when codegen'ing in pic mode. This fixes a miscompilation of a switch stmt in a template, as the template goes to a non-.text section. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30743 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-05 03:12:36 +00:00
]
bb: ; preds = %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry
br label %bb1
bb1: ; preds = %bb, %entry
br label %bb2
bb2: ; preds = %bb1, %entry
Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode. Before: _main: subq $8, %rsp leaq _X(%rip), %rax movsd 8(%rax), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Now: _main: subq $8, %rsp movsd _X+8(%rip), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Notice there is another idiotic codegen issue that needs to be fixed asap: xorl %ecx, %ecx movl %ecx, %eax git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46850 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-07 08:53:49 +00:00
call void @_Z3bari( i32 1 )
Verify that jump tables are emitted to the same section as the function is, when codegen'ing in pic mode. This fixes a miscompilation of a switch stmt in a template, as the template goes to a non-.text section. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30743 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-05 03:12:36 +00:00
br label %bb11
bb3: ; preds = %entry
br label %bb4
bb4: ; preds = %bb3, %entry
br label %bb5
bb5: ; preds = %bb4, %entry
br label %bb6
bb6: ; preds = %bb5, %entry
Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode. Before: _main: subq $8, %rsp leaq _X(%rip), %rax movsd 8(%rax), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Now: _main: subq $8, %rsp movsd _X+8(%rip), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Notice there is another idiotic codegen issue that needs to be fixed asap: xorl %ecx, %ecx movl %ecx, %eax git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46850 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-07 08:53:49 +00:00
call void @_Z3bari( i32 2 )
Verify that jump tables are emitted to the same section as the function is, when codegen'ing in pic mode. This fixes a miscompilation of a switch stmt in a template, as the template goes to a non-.text section. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30743 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-05 03:12:36 +00:00
br label %bb11
bb7: ; preds = %entry
br label %bb8
bb8: ; preds = %bb7, %entry
br label %bb9
bb9: ; preds = %bb8, %entry
Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode. Before: _main: subq $8, %rsp leaq _X(%rip), %rax movsd 8(%rax), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Now: _main: subq $8, %rsp movsd _X+8(%rip), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Notice there is another idiotic codegen issue that needs to be fixed asap: xorl %ecx, %ecx movl %ecx, %eax git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46850 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-07 08:53:49 +00:00
call void @_Z3bari( i32 3 )
Verify that jump tables are emitted to the same section as the function is, when codegen'ing in pic mode. This fixes a miscompilation of a switch stmt in a template, as the template goes to a non-.text section. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30743 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-05 03:12:36 +00:00
br label %bb11
bb10: ; preds = %entry
br label %bb11
bb11: ; preds = %bb10, %bb9, %bb6, %bb2
br label %return
return: ; preds = %bb11
ret void
}
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