2009-12-07 19:04:31 +00:00
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; RUN: llc < %s -march=x86-64 -asm-verbose=false -mtriple=x86_64-unknown-linux-gnu -post-RA-scheduler=true | FileCheck %s
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2009-09-25 23:58:45 +00:00
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; Currently, floating-point selects are lowered to CFG triangles.
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; This means that one side of the select is always unconditionally
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; evaluated, however with MachineSink we can sink the other side so
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; that it's conditionally evaluated.
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; CHECK: foo:
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2009-10-18 19:57:27 +00:00
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; CHECK-NEXT: testb $1, %dil
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Enable machine sinking critical edge splitting. e.g.
define double @foo(double %x, double %y, i1 %c) nounwind {
%a = fdiv double %x, 3.2
%z = select i1 %c, double %a, double %y
ret double %z
}
Was:
_foo:
divsd LCPI0_0(%rip), %xmm0
testb $1, %dil
jne LBB0_2
movaps %xmm1, %xmm0
LBB0_2:
ret
Now:
_foo:
testb $1, %dil
je LBB0_2
divsd LCPI0_0(%rip), %xmm0
ret
LBB0_2:
movaps %xmm1, %xmm0
ret
This avoids the divsd when early exit is taken.
rdar://8454886
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114372 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-20 22:52:00 +00:00
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; CHECK-NEXT: je
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2009-10-18 19:57:27 +00:00
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; CHECK-NEXT: divsd
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Enable machine sinking critical edge splitting. e.g.
define double @foo(double %x, double %y, i1 %c) nounwind {
%a = fdiv double %x, 3.2
%z = select i1 %c, double %a, double %y
ret double %z
}
Was:
_foo:
divsd LCPI0_0(%rip), %xmm0
testb $1, %dil
jne LBB0_2
movaps %xmm1, %xmm0
LBB0_2:
ret
Now:
_foo:
testb $1, %dil
je LBB0_2
divsd LCPI0_0(%rip), %xmm0
ret
LBB0_2:
movaps %xmm1, %xmm0
ret
This avoids the divsd when early exit is taken.
rdar://8454886
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114372 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-20 22:52:00 +00:00
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; CHECK-NEXT: ret
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; CHECK: divsd
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2009-09-25 23:58:45 +00:00
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define double @foo(double %x, double %y, i1 %c) nounwind {
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%a = fdiv double %x, 3.2
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%b = fdiv double %y, 3.3
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%z = select i1 %c, double %a, double %b
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ret double %z
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}
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Enable machine sinking critical edge splitting. e.g.
define double @foo(double %x, double %y, i1 %c) nounwind {
%a = fdiv double %x, 3.2
%z = select i1 %c, double %a, double %y
ret double %z
}
Was:
_foo:
divsd LCPI0_0(%rip), %xmm0
testb $1, %dil
jne LBB0_2
movaps %xmm1, %xmm0
LBB0_2:
ret
Now:
_foo:
testb $1, %dil
je LBB0_2
divsd LCPI0_0(%rip), %xmm0
ret
LBB0_2:
movaps %xmm1, %xmm0
ret
This avoids the divsd when early exit is taken.
rdar://8454886
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114372 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-20 22:52:00 +00:00
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; Make sure the critical edge is broken so the divsd is sunken below
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; the conditional branch.
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; rdar://8454886
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; CHECK: split:
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; CHECK-NEXT: testb $1, %dil
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; CHECK-NEXT: je
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; CHECK-NEXT: divsd
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; CHECK-NEXT: ret
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; CHECK: movaps
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; CHECK-NEXT: ret
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define double @split(double %x, double %y, i1 %c) nounwind {
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%a = fdiv double %x, 3.2
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%z = select i1 %c, double %a, double %y
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ret double %z
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}
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2009-09-25 23:58:45 +00:00
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; Hoist floating-point constant-pool loads out of loops.
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; CHECK: bar:
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; CHECK: movsd
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; CHECK: align
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define void @bar(double* nocapture %p, i64 %n) nounwind {
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entry:
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%0 = icmp sgt i64 %n, 0
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br i1 %0, label %bb, label %return
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bb:
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%i.03 = phi i64 [ 0, %entry ], [ %3, %bb ]
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%scevgep = getelementptr double* %p, i64 %i.03
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%1 = load double* %scevgep, align 8
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%2 = fdiv double 3.200000e+00, %1
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store double %2, double* %scevgep, align 8
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%3 = add nsw i64 %i.03, 1
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%exitcond = icmp eq i64 %3, %n
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br i1 %exitcond, label %return, label %bb
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return:
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ret void
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}
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2009-10-28 01:13:53 +00:00
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; Sink instructions with dead EFLAGS defs.
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2010-06-03 07:54:20 +00:00
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; FIXME: Unfail the zzz test if we can correctly mark pregs with the kill flag.
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;
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; See <rdar://problem/8030636>. This test isn't valid after we made machine
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; sinking more conservative about sinking instructions that define a preg into a
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; block when we don't know if the preg is killed within the current block.
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2009-10-28 01:13:53 +00:00
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2010-06-03 07:54:20 +00:00
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; FIXMEHECK: zzz:
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; FIXMEHECK: je
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; FIXMEHECK-NEXT: orb
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; define zeroext i8 @zzz(i8 zeroext %a, i8 zeroext %b) nounwind readnone {
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; entry:
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; %tmp = zext i8 %a to i32 ; <i32> [#uses=1]
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; %tmp2 = icmp eq i8 %a, 0 ; <i1> [#uses=1]
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; %tmp3 = or i8 %b, -128 ; <i8> [#uses=1]
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; %tmp4 = and i8 %b, 127 ; <i8> [#uses=1]
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; %b_addr.0 = select i1 %tmp2, i8 %tmp4, i8 %tmp3 ; <i8> [#uses=1]
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; ret i8 %b_addr.0
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; }
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2009-10-28 03:21:57 +00:00
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declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8) nounwind readnone
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declare <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32>) nounwind readnone
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2009-10-30 22:18:41 +00:00
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; CodeGen should use the correct register class when extracting
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; a load from a zero-extending load for hoisting.
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; CHECK: default_get_pch_validity:
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; CHECK: movl cl_options_count(%rip), %ecx
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@cl_options_count = external constant i32 ; <i32*> [#uses=2]
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define void @default_get_pch_validity() nounwind {
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entry:
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%tmp4 = load i32* @cl_options_count, align 4 ; <i32> [#uses=1]
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%tmp5 = icmp eq i32 %tmp4, 0 ; <i1> [#uses=1]
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br i1 %tmp5, label %bb6, label %bb2
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bb2: ; preds = %bb2, %entry
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%i.019 = phi i64 [ 0, %entry ], [ %tmp25, %bb2 ] ; <i64> [#uses=1]
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%tmp25 = add i64 %i.019, 1 ; <i64> [#uses=2]
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%tmp11 = load i32* @cl_options_count, align 4 ; <i32> [#uses=1]
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%tmp12 = zext i32 %tmp11 to i64 ; <i64> [#uses=1]
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%tmp13 = icmp ugt i64 %tmp12, %tmp25 ; <i1> [#uses=1]
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br i1 %tmp13, label %bb2, label %bb6
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bb6: ; preds = %bb2, %entry
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ret void
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}
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