6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-17 03:30:28 +00:00
Code Issues Projects Releases Wiki Activity
f87165820d
llvm-6502/test/CodeGen/PowerPC/ppc64-prefetch.ll

35 lines
729 B
LLVM
Raw Normal View History

Enable prefetch generation on PPC64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153851 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-01 20:08:17 +00:00
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
[PowerPC] Add support for dcbtst and icbt (prefetch) Adds code generation support for dcbtst (data cache prefetch for write) and icbt (instruction cache prefetch for read - Book E cores only). We still end up with a 'cannot select' error for the non-supported prefetch intrinsic forms. This will be fixed in a later commit. Fixes PR20692. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216339 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-23 23:21:04 +00:00
; RUN: llc -mcpu=a2 < %s | FileCheck %s
Enable prefetch generation on PPC64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153851 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-01 20:08:17 +00:00
define void @test1(i8* %a, ...) nounwind {
entry:
call void @llvm.prefetch(i8* %a, i32 0, i32 3, i32 1)
ret void
[PowerPC] Add support for dcbtst and icbt (prefetch) Adds code generation support for dcbtst (data cache prefetch for write) and icbt (instruction cache prefetch for read - Book E cores only). We still end up with a 'cannot select' error for the non-supported prefetch intrinsic forms. This will be fixed in a later commit. Fixes PR20692. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216339 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-23 23:21:04 +00:00
; CHECK-LABEL: @test1
; CHECK: dcbt
Enable prefetch generation on PPC64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153851 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-01 20:08:17 +00:00
}
declare void @llvm.prefetch(i8*, i32, i32, i32)
[PowerPC] Add support for dcbtst and icbt (prefetch) Adds code generation support for dcbtst (data cache prefetch for write) and icbt (instruction cache prefetch for read - Book E cores only). We still end up with a 'cannot select' error for the non-supported prefetch intrinsic forms. This will be fixed in a later commit. Fixes PR20692. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216339 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-23 23:21:04 +00:00
define void @test2(i8* %a, ...) nounwind {
entry:
call void @llvm.prefetch(i8* %a, i32 1, i32 3, i32 1)
ret void
; CHECK-LABEL: @test2
; CHECK: dcbtst
}
define void @test3(i8* %a, ...) nounwind {
entry:
call void @llvm.prefetch(i8* %a, i32 0, i32 3, i32 0)
ret void
; CHECK-LABEL: @test3
; CHECK: icbt
}
Enable prefetch generation on PPC64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153851 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-01 20:08:17 +00:00
Reference in New Issue Copy Permalink