2012-02-13 22:50:51 +00:00
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//===-- ThreadSanitizer.cpp - race detector -------------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file is a part of ThreadSanitizer, a race detector.
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//
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// The tool is under development, for the details about previous versions see
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// http://code.google.com/p/data-race-test
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//
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// The instrumentation phase is quite simple:
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// - Insert calls to run-time library before every memory access.
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// - Optimizations may apply to avoid instrumenting some of the accesses.
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// - Insert calls at function entry/exit.
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// The rest is handled by the run-time library.
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//===----------------------------------------------------------------------===//
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2012-12-03 16:50:05 +00:00
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#include "llvm/Transforms/Instrumentation.h"
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#include "llvm/ADT/SmallSet.h"
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#include "llvm/ADT/SmallString.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/ADT/StringExtras.h"
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2013-01-02 11:36:10 +00:00
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#include "llvm/IR/DataLayout.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/IRBuilder.h"
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2013-03-28 11:21:13 +00:00
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#include "llvm/IR/IntrinsicInst.h"
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2013-01-02 11:36:10 +00:00
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#include "llvm/IR/Intrinsics.h"
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#include "llvm/IR/LLVMContext.h"
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#include "llvm/IR/Metadata.h"
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#include "llvm/IR/Module.h"
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#include "llvm/IR/Type.h"
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2012-03-14 23:33:24 +00:00
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#include "llvm/Support/CommandLine.h"
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2012-02-13 22:50:51 +00:00
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/MathExtras.h"
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2012-03-26 17:35:03 +00:00
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#include "llvm/Support/raw_ostream.h"
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2012-04-27 07:31:53 +00:00
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#include "llvm/Transforms/Utils/BasicBlockUtils.h"
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2012-02-13 22:50:51 +00:00
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#include "llvm/Transforms/Utils/ModuleUtils.h"
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using namespace llvm;
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2014-04-22 02:55:47 +00:00
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#define DEBUG_TYPE "tsan"
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2012-10-04 05:28:50 +00:00
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static cl::opt<bool> ClInstrumentMemoryAccesses(
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"tsan-instrument-memory-accesses", cl::init(true),
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cl::desc("Instrument memory accesses"), cl::Hidden);
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static cl::opt<bool> ClInstrumentFuncEntryExit(
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"tsan-instrument-func-entry-exit", cl::init(true),
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cl::desc("Instrument function entry and exit"), cl::Hidden);
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static cl::opt<bool> ClInstrumentAtomics(
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"tsan-instrument-atomics", cl::init(true),
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cl::desc("Instrument atomics"), cl::Hidden);
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2013-03-28 11:21:13 +00:00
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static cl::opt<bool> ClInstrumentMemIntrinsics(
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"tsan-instrument-memintrinsics", cl::init(true),
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cl::desc("Instrument memintrinsics (memset/memcpy/memmove)"), cl::Hidden);
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2012-03-14 23:33:24 +00:00
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2012-04-23 08:44:59 +00:00
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STATISTIC(NumInstrumentedReads, "Number of instrumented reads");
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STATISTIC(NumInstrumentedWrites, "Number of instrumented writes");
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2012-08-30 13:47:13 +00:00
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STATISTIC(NumOmittedReadsBeforeWrite,
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2012-04-23 08:44:59 +00:00
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"Number of reads ignored due to following writes");
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STATISTIC(NumAccessesWithBadSize, "Number of accesses with bad size");
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STATISTIC(NumInstrumentedVtableWrites, "Number of vtable ptr writes");
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2013-03-22 08:51:22 +00:00
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STATISTIC(NumInstrumentedVtableReads, "Number of vtable ptr reads");
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2012-04-23 08:44:59 +00:00
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STATISTIC(NumOmittedReadsFromConstantGlobals,
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"Number of reads from constant globals");
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STATISTIC(NumOmittedReadsFromVtable, "Number of vtable reads");
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2012-04-10 18:18:56 +00:00
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2012-02-13 22:50:51 +00:00
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namespace {
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2012-04-10 18:18:56 +00:00
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2012-02-13 22:50:51 +00:00
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/// ThreadSanitizer: instrument the code in module to find races.
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struct ThreadSanitizer : public FunctionPass {
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2014-06-02 18:08:27 +00:00
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ThreadSanitizer() : FunctionPass(ID), DL(nullptr) {}
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2014-03-05 09:10:37 +00:00
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const char *getPassName() const override;
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bool runOnFunction(Function &F) override;
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bool doInitialization(Module &M) override;
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2012-02-13 22:50:51 +00:00
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static char ID; // Pass identification, replacement for typeid.
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private:
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2012-11-29 09:54:21 +00:00
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void initializeCallbacks(Module &M);
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2012-04-27 07:31:53 +00:00
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bool instrumentLoadOrStore(Instruction *I);
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bool instrumentAtomic(Instruction *I);
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2013-03-28 11:21:13 +00:00
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bool instrumentMemIntrinsic(Instruction *I);
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2012-05-02 13:12:19 +00:00
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void chooseInstructionsToInstrument(SmallVectorImpl<Instruction*> &Local,
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SmallVectorImpl<Instruction*> &All);
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2012-04-10 22:29:17 +00:00
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bool addrPointsToConstantData(Value *Addr);
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2012-04-27 07:31:53 +00:00
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int getMemoryAccessFuncIndex(Value *Addr);
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2012-04-10 18:18:56 +00:00
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2014-02-24 23:12:18 +00:00
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const DataLayout *DL;
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2013-03-28 11:21:13 +00:00
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Type *IntptrTy;
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2012-04-27 07:31:53 +00:00
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IntegerType *OrdTy;
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2012-02-13 22:50:51 +00:00
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// Callbacks to run-time library are computed in doInitialization.
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2012-04-27 07:31:53 +00:00
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Function *TsanFuncEntry;
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Function *TsanFuncExit;
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2012-02-13 22:50:51 +00:00
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// Accesses sizes are powers of two: 1, 2, 4, 8, 16.
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2012-02-14 00:52:07 +00:00
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static const size_t kNumberOfAccessSizes = 5;
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2012-04-27 07:31:53 +00:00
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Function *TsanRead[kNumberOfAccessSizes];
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Function *TsanWrite[kNumberOfAccessSizes];
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Function *TsanAtomicLoad[kNumberOfAccessSizes];
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Function *TsanAtomicStore[kNumberOfAccessSizes];
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2012-11-09 12:55:36 +00:00
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Function *TsanAtomicRMW[AtomicRMWInst::LAST_BINOP + 1][kNumberOfAccessSizes];
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Function *TsanAtomicCAS[kNumberOfAccessSizes];
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Function *TsanAtomicThreadFence;
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Function *TsanAtomicSignalFence;
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2012-04-27 07:31:53 +00:00
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Function *TsanVptrUpdate;
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2013-03-22 08:51:22 +00:00
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Function *TsanVptrLoad;
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2013-03-28 11:21:13 +00:00
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Function *MemmoveFn, *MemcpyFn, *MemsetFn;
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2012-02-13 22:50:51 +00:00
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};
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} // namespace
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char ThreadSanitizer::ID = 0;
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INITIALIZE_PASS(ThreadSanitizer, "tsan",
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"ThreadSanitizer: detects data races.",
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false, false)
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2012-04-27 07:31:53 +00:00
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const char *ThreadSanitizer::getPassName() const {
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return "ThreadSanitizer";
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}
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2014-06-02 18:08:27 +00:00
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FunctionPass *llvm::createThreadSanitizerPass() {
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return new ThreadSanitizer();
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2012-02-13 22:50:51 +00:00
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}
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2012-04-27 07:31:53 +00:00
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static Function *checkInterfaceFunction(Constant *FuncOrBitcast) {
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if (Function *F = dyn_cast<Function>(FuncOrBitcast))
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return F;
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FuncOrBitcast->dump();
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report_fatal_error("ThreadSanitizer interface function redefined");
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}
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2012-11-29 09:54:21 +00:00
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void ThreadSanitizer::initializeCallbacks(Module &M) {
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2012-02-13 22:50:51 +00:00
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IRBuilder<> IRB(M.getContext());
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// Initialize the callbacks.
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2012-04-27 07:31:53 +00:00
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TsanFuncEntry = checkInterfaceFunction(M.getOrInsertFunction(
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"__tsan_func_entry", IRB.getVoidTy(), IRB.getInt8PtrTy(), NULL));
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TsanFuncExit = checkInterfaceFunction(M.getOrInsertFunction(
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"__tsan_func_exit", IRB.getVoidTy(), NULL));
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OrdTy = IRB.getInt32Ty();
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2012-02-14 00:52:07 +00:00
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for (size_t i = 0; i < kNumberOfAccessSizes; ++i) {
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2012-04-27 07:31:53 +00:00
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const size_t ByteSize = 1 << i;
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const size_t BitSize = ByteSize * 8;
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SmallString<32> ReadName("__tsan_read" + itostr(ByteSize));
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TsanRead[i] = checkInterfaceFunction(M.getOrInsertFunction(
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ReadName, IRB.getVoidTy(), IRB.getInt8PtrTy(), NULL));
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SmallString<32> WriteName("__tsan_write" + itostr(ByteSize));
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TsanWrite[i] = checkInterfaceFunction(M.getOrInsertFunction(
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WriteName, IRB.getVoidTy(), IRB.getInt8PtrTy(), NULL));
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Type *Ty = Type::getIntNTy(M.getContext(), BitSize);
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Type *PtrTy = Ty->getPointerTo();
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SmallString<32> AtomicLoadName("__tsan_atomic" + itostr(BitSize) +
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"_load");
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TsanAtomicLoad[i] = checkInterfaceFunction(M.getOrInsertFunction(
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AtomicLoadName, Ty, PtrTy, OrdTy, NULL));
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SmallString<32> AtomicStoreName("__tsan_atomic" + itostr(BitSize) +
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"_store");
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TsanAtomicStore[i] = checkInterfaceFunction(M.getOrInsertFunction(
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AtomicStoreName, IRB.getVoidTy(), PtrTy, Ty, OrdTy,
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NULL));
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2012-11-09 12:55:36 +00:00
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for (int op = AtomicRMWInst::FIRST_BINOP;
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op <= AtomicRMWInst::LAST_BINOP; ++op) {
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2014-04-25 05:29:35 +00:00
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TsanAtomicRMW[op][i] = nullptr;
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const char *NamePart = nullptr;
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2012-11-09 12:55:36 +00:00
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if (op == AtomicRMWInst::Xchg)
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NamePart = "_exchange";
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else if (op == AtomicRMWInst::Add)
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NamePart = "_fetch_add";
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else if (op == AtomicRMWInst::Sub)
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NamePart = "_fetch_sub";
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else if (op == AtomicRMWInst::And)
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NamePart = "_fetch_and";
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else if (op == AtomicRMWInst::Or)
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NamePart = "_fetch_or";
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else if (op == AtomicRMWInst::Xor)
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NamePart = "_fetch_xor";
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2012-11-27 08:09:25 +00:00
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else if (op == AtomicRMWInst::Nand)
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NamePart = "_fetch_nand";
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2012-11-09 12:55:36 +00:00
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else
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continue;
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SmallString<32> RMWName("__tsan_atomic" + itostr(BitSize) + NamePart);
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TsanAtomicRMW[op][i] = checkInterfaceFunction(M.getOrInsertFunction(
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RMWName, Ty, PtrTy, Ty, OrdTy, NULL));
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}
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SmallString<32> AtomicCASName("__tsan_atomic" + itostr(BitSize) +
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"_compare_exchange_val");
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TsanAtomicCAS[i] = checkInterfaceFunction(M.getOrInsertFunction(
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2012-11-26 11:36:19 +00:00
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AtomicCASName, Ty, PtrTy, Ty, Ty, OrdTy, OrdTy, NULL));
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2012-02-13 22:50:51 +00:00
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}
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2012-04-27 07:31:53 +00:00
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TsanVptrUpdate = checkInterfaceFunction(M.getOrInsertFunction(
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"__tsan_vptr_update", IRB.getVoidTy(), IRB.getInt8PtrTy(),
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IRB.getInt8PtrTy(), NULL));
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2013-03-22 08:51:22 +00:00
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TsanVptrLoad = checkInterfaceFunction(M.getOrInsertFunction(
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"__tsan_vptr_read", IRB.getVoidTy(), IRB.getInt8PtrTy(), NULL));
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2012-11-09 12:55:36 +00:00
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TsanAtomicThreadFence = checkInterfaceFunction(M.getOrInsertFunction(
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"__tsan_atomic_thread_fence", IRB.getVoidTy(), OrdTy, NULL));
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TsanAtomicSignalFence = checkInterfaceFunction(M.getOrInsertFunction(
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"__tsan_atomic_signal_fence", IRB.getVoidTy(), OrdTy, NULL));
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2013-03-28 11:21:13 +00:00
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MemmoveFn = checkInterfaceFunction(M.getOrInsertFunction(
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"memmove", IRB.getInt8PtrTy(), IRB.getInt8PtrTy(),
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IRB.getInt8PtrTy(), IntptrTy, NULL));
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MemcpyFn = checkInterfaceFunction(M.getOrInsertFunction(
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"memcpy", IRB.getInt8PtrTy(), IRB.getInt8PtrTy(), IRB.getInt8PtrTy(),
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IntptrTy, NULL));
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MemsetFn = checkInterfaceFunction(M.getOrInsertFunction(
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"memset", IRB.getInt8PtrTy(), IRB.getInt8PtrTy(), IRB.getInt32Ty(),
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IntptrTy, NULL));
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2012-11-29 09:54:21 +00:00
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}
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bool ThreadSanitizer::doInitialization(Module &M) {
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2014-02-25 17:30:31 +00:00
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DataLayoutPass *DLP = getAnalysisIfAvailable<DataLayoutPass>();
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if (!DLP)
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2014-04-23 12:51:32 +00:00
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report_fatal_error("data layout missing");
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2014-02-25 17:30:31 +00:00
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DL = &DLP->getDataLayout();
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2012-11-29 09:54:21 +00:00
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// Always insert a call to __tsan_init into the module's CTORs.
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IRBuilder<> IRB(M.getContext());
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2014-02-21 00:06:31 +00:00
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IntptrTy = IRB.getIntPtrTy(DL);
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2012-11-29 09:54:21 +00:00
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Value *TsanInit = M.getOrInsertFunction("__tsan_init",
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IRB.getVoidTy(), NULL);
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appendToGlobalCtors(M, cast<Function>(TsanInit), 0);
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2012-02-13 22:50:51 +00:00
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return true;
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}
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2012-04-10 22:29:17 +00:00
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static bool isVtableAccess(Instruction *I) {
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2013-09-06 22:47:05 +00:00
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if (MDNode *Tag = I->getMetadata(LLVMContext::MD_tbaa))
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return Tag->isTBAAVtableAccess();
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2012-04-10 22:29:17 +00:00
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return false;
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}
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bool ThreadSanitizer::addrPointsToConstantData(Value *Addr) {
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// If this is a GEP, just analyze its pointer operand.
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if (GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(Addr))
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Addr = GEP->getPointerOperand();
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if (GlobalVariable *GV = dyn_cast<GlobalVariable>(Addr)) {
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if (GV->isConstant()) {
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// Reads from constant globals can not race with any writes.
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2012-04-23 08:44:59 +00:00
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NumOmittedReadsFromConstantGlobals++;
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2012-04-10 22:29:17 +00:00
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return true;
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}
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2012-08-30 13:47:13 +00:00
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} else if (LoadInst *L = dyn_cast<LoadInst>(Addr)) {
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2012-04-10 22:29:17 +00:00
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if (isVtableAccess(L)) {
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// Reads from a vtable pointer can not race with any writes.
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2012-04-23 08:44:59 +00:00
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NumOmittedReadsFromVtable++;
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2012-04-10 22:29:17 +00:00
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return true;
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}
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}
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return false;
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}
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2012-04-10 18:18:56 +00:00
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// Instrumenting some of the accesses may be proven redundant.
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// Currently handled:
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// - read-before-write (within same BB, no calls between)
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//
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// We do not handle some of the patterns that should not survive
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// after the classic compiler optimizations.
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// E.g. two reads from the same temp should be eliminated by CSE,
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// two writes should be eliminated by DSE, etc.
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//
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// 'Local' is a vector of insns within the same BB (no calls between).
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// 'All' is a vector of insns that will be instrumented.
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2012-05-02 13:12:19 +00:00
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void ThreadSanitizer::chooseInstructionsToInstrument(
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2012-04-10 18:18:56 +00:00
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SmallVectorImpl<Instruction*> &Local,
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SmallVectorImpl<Instruction*> &All) {
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|
|
SmallSet<Value*, 8> WriteTargets;
|
|
|
|
// Iterate from the end.
|
|
|
|
for (SmallVectorImpl<Instruction*>::reverse_iterator It = Local.rbegin(),
|
|
|
|
E = Local.rend(); It != E; ++It) {
|
|
|
|
Instruction *I = *It;
|
|
|
|
if (StoreInst *Store = dyn_cast<StoreInst>(I)) {
|
|
|
|
WriteTargets.insert(Store->getPointerOperand());
|
|
|
|
} else {
|
|
|
|
LoadInst *Load = cast<LoadInst>(I);
|
2012-04-10 22:29:17 +00:00
|
|
|
Value *Addr = Load->getPointerOperand();
|
|
|
|
if (WriteTargets.count(Addr)) {
|
2012-04-10 18:18:56 +00:00
|
|
|
// We will write to this temp, so no reason to analyze the read.
|
2012-04-23 08:44:59 +00:00
|
|
|
NumOmittedReadsBeforeWrite++;
|
2012-04-10 18:18:56 +00:00
|
|
|
continue;
|
|
|
|
}
|
2012-04-10 22:29:17 +00:00
|
|
|
if (addrPointsToConstantData(Addr)) {
|
|
|
|
// Addr points to some constant data -- it can not race with any writes.
|
|
|
|
continue;
|
|
|
|
}
|
2012-04-10 18:18:56 +00:00
|
|
|
}
|
|
|
|
All.push_back(I);
|
|
|
|
}
|
|
|
|
Local.clear();
|
|
|
|
}
|
|
|
|
|
2012-04-27 07:31:53 +00:00
|
|
|
static bool isAtomic(Instruction *I) {
|
|
|
|
if (LoadInst *LI = dyn_cast<LoadInst>(I))
|
|
|
|
return LI->isAtomic() && LI->getSynchScope() == CrossThread;
|
2012-05-02 13:12:19 +00:00
|
|
|
if (StoreInst *SI = dyn_cast<StoreInst>(I))
|
2012-04-27 07:31:53 +00:00
|
|
|
return SI->isAtomic() && SI->getSynchScope() == CrossThread;
|
2012-05-02 13:12:19 +00:00
|
|
|
if (isa<AtomicRMWInst>(I))
|
2012-04-27 07:31:53 +00:00
|
|
|
return true;
|
2012-05-02 13:12:19 +00:00
|
|
|
if (isa<AtomicCmpXchgInst>(I))
|
2012-04-27 07:31:53 +00:00
|
|
|
return true;
|
2012-11-09 12:55:36 +00:00
|
|
|
if (isa<FenceInst>(I))
|
|
|
|
return true;
|
2012-04-27 07:31:53 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2012-02-13 22:50:51 +00:00
|
|
|
bool ThreadSanitizer::runOnFunction(Function &F) {
|
2014-02-21 00:06:31 +00:00
|
|
|
if (!DL) return false;
|
2012-11-29 09:54:21 +00:00
|
|
|
initializeCallbacks(*F.getParent());
|
2012-02-13 22:50:51 +00:00
|
|
|
SmallVector<Instruction*, 8> RetVec;
|
2012-04-10 18:18:56 +00:00
|
|
|
SmallVector<Instruction*, 8> AllLoadsAndStores;
|
|
|
|
SmallVector<Instruction*, 8> LocalLoadsAndStores;
|
2012-04-27 07:31:53 +00:00
|
|
|
SmallVector<Instruction*, 8> AtomicAccesses;
|
2013-03-28 11:21:13 +00:00
|
|
|
SmallVector<Instruction*, 8> MemIntrinCalls;
|
2012-02-13 22:50:51 +00:00
|
|
|
bool Res = false;
|
|
|
|
bool HasCalls = false;
|
2014-06-02 18:08:27 +00:00
|
|
|
bool SanitizeFunction = F.hasFnAttribute(Attribute::SanitizeThread);
|
2012-02-13 22:50:51 +00:00
|
|
|
|
|
|
|
// Traverse all instructions, collect loads/stores/returns, check for calls.
|
2014-05-29 18:40:48 +00:00
|
|
|
for (auto &BB : F) {
|
|
|
|
for (auto &Inst : BB) {
|
|
|
|
if (isAtomic(&Inst))
|
|
|
|
AtomicAccesses.push_back(&Inst);
|
|
|
|
else if (isa<LoadInst>(Inst) || isa<StoreInst>(Inst))
|
|
|
|
LocalLoadsAndStores.push_back(&Inst);
|
|
|
|
else if (isa<ReturnInst>(Inst))
|
|
|
|
RetVec.push_back(&Inst);
|
|
|
|
else if (isa<CallInst>(Inst) || isa<InvokeInst>(Inst)) {
|
|
|
|
if (isa<MemIntrinsic>(Inst))
|
|
|
|
MemIntrinCalls.push_back(&Inst);
|
2012-02-13 22:50:51 +00:00
|
|
|
HasCalls = true;
|
2012-05-02 13:12:19 +00:00
|
|
|
chooseInstructionsToInstrument(LocalLoadsAndStores, AllLoadsAndStores);
|
2012-04-10 18:18:56 +00:00
|
|
|
}
|
2012-02-13 22:50:51 +00:00
|
|
|
}
|
2012-05-02 13:12:19 +00:00
|
|
|
chooseInstructionsToInstrument(LocalLoadsAndStores, AllLoadsAndStores);
|
2012-02-13 22:50:51 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
// We have collected all loads and stores.
|
|
|
|
// FIXME: many of these accesses do not need to be checked for races
|
|
|
|
// (e.g. variables that do not escape, etc).
|
|
|
|
|
2014-05-31 00:11:37 +00:00
|
|
|
// Instrument memory accesses only if we want to report bugs in the function.
|
|
|
|
if (ClInstrumentMemoryAccesses && SanitizeFunction)
|
2014-05-29 18:40:48 +00:00
|
|
|
for (auto Inst : AllLoadsAndStores) {
|
|
|
|
Res |= instrumentLoadOrStore(Inst);
|
2012-10-04 05:28:50 +00:00
|
|
|
}
|
2012-02-13 22:50:51 +00:00
|
|
|
|
2014-05-31 00:11:37 +00:00
|
|
|
// Instrument atomic memory accesses in any case (they can be used to
|
|
|
|
// implement synchronization).
|
2012-10-04 05:28:50 +00:00
|
|
|
if (ClInstrumentAtomics)
|
2014-05-29 18:40:48 +00:00
|
|
|
for (auto Inst : AtomicAccesses) {
|
|
|
|
Res |= instrumentAtomic(Inst);
|
2012-10-04 05:28:50 +00:00
|
|
|
}
|
2012-04-27 07:31:53 +00:00
|
|
|
|
2014-05-31 00:11:37 +00:00
|
|
|
if (ClInstrumentMemIntrinsics && SanitizeFunction)
|
2014-05-29 18:40:48 +00:00
|
|
|
for (auto Inst : MemIntrinCalls) {
|
|
|
|
Res |= instrumentMemIntrinsic(Inst);
|
2013-03-28 11:21:13 +00:00
|
|
|
}
|
|
|
|
|
2012-02-13 22:50:51 +00:00
|
|
|
// Instrument function entry/exit points if there were instrumented accesses.
|
2012-10-04 05:28:50 +00:00
|
|
|
if ((Res || HasCalls) && ClInstrumentFuncEntryExit) {
|
2012-02-13 22:50:51 +00:00
|
|
|
IRBuilder<> IRB(F.getEntryBlock().getFirstNonPHI());
|
|
|
|
Value *ReturnAddress = IRB.CreateCall(
|
|
|
|
Intrinsic::getDeclaration(F.getParent(), Intrinsic::returnaddress),
|
|
|
|
IRB.getInt32(0));
|
|
|
|
IRB.CreateCall(TsanFuncEntry, ReturnAddress);
|
2014-05-29 18:40:48 +00:00
|
|
|
for (auto RetInst : RetVec) {
|
|
|
|
IRBuilder<> IRBRet(RetInst);
|
2012-02-13 22:50:51 +00:00
|
|
|
IRBRet.CreateCall(TsanFuncExit);
|
|
|
|
}
|
2012-03-26 17:35:03 +00:00
|
|
|
Res = true;
|
2012-02-13 22:50:51 +00:00
|
|
|
}
|
|
|
|
return Res;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool ThreadSanitizer::instrumentLoadOrStore(Instruction *I) {
|
|
|
|
IRBuilder<> IRB(I);
|
|
|
|
bool IsWrite = isa<StoreInst>(*I);
|
|
|
|
Value *Addr = IsWrite
|
|
|
|
? cast<StoreInst>(I)->getPointerOperand()
|
|
|
|
: cast<LoadInst>(I)->getPointerOperand();
|
2012-04-27 07:31:53 +00:00
|
|
|
int Idx = getMemoryAccessFuncIndex(Addr);
|
|
|
|
if (Idx < 0)
|
2012-02-13 22:50:51 +00:00
|
|
|
return false;
|
2012-03-26 17:35:03 +00:00
|
|
|
if (IsWrite && isVtableAccess(I)) {
|
2012-07-05 09:07:31 +00:00
|
|
|
DEBUG(dbgs() << " VPTR : " << *I << "\n");
|
2012-03-26 17:35:03 +00:00
|
|
|
Value *StoredValue = cast<StoreInst>(I)->getValueOperand();
|
2013-12-02 08:07:15 +00:00
|
|
|
// StoredValue may be a vector type if we are storing several vptrs at once.
|
|
|
|
// In this case, just take the first element of the vector since this is
|
|
|
|
// enough to find vptr races.
|
|
|
|
if (isa<VectorType>(StoredValue->getType()))
|
|
|
|
StoredValue = IRB.CreateExtractElement(
|
|
|
|
StoredValue, ConstantInt::get(IRB.getInt32Ty(), 0));
|
2013-12-05 15:03:02 +00:00
|
|
|
if (StoredValue->getType()->isIntegerTy())
|
|
|
|
StoredValue = IRB.CreateIntToPtr(StoredValue, IRB.getInt8PtrTy());
|
2012-07-05 09:07:31 +00:00
|
|
|
// Call TsanVptrUpdate.
|
2012-03-26 17:35:03 +00:00
|
|
|
IRB.CreateCall2(TsanVptrUpdate,
|
|
|
|
IRB.CreatePointerCast(Addr, IRB.getInt8PtrTy()),
|
2013-12-05 15:03:02 +00:00
|
|
|
IRB.CreatePointerCast(StoredValue, IRB.getInt8PtrTy()));
|
2012-04-23 08:44:59 +00:00
|
|
|
NumInstrumentedVtableWrites++;
|
2012-03-26 17:35:03 +00:00
|
|
|
return true;
|
|
|
|
}
|
2013-03-22 08:51:22 +00:00
|
|
|
if (!IsWrite && isVtableAccess(I)) {
|
|
|
|
IRB.CreateCall(TsanVptrLoad,
|
|
|
|
IRB.CreatePointerCast(Addr, IRB.getInt8PtrTy()));
|
|
|
|
NumInstrumentedVtableReads++;
|
|
|
|
return true;
|
|
|
|
}
|
2012-02-13 22:50:51 +00:00
|
|
|
Value *OnAccessFunc = IsWrite ? TsanWrite[Idx] : TsanRead[Idx];
|
|
|
|
IRB.CreateCall(OnAccessFunc, IRB.CreatePointerCast(Addr, IRB.getInt8PtrTy()));
|
2012-04-23 08:44:59 +00:00
|
|
|
if (IsWrite) NumInstrumentedWrites++;
|
|
|
|
else NumInstrumentedReads++;
|
2012-02-13 22:50:51 +00:00
|
|
|
return true;
|
|
|
|
}
|
2012-04-27 07:31:53 +00:00
|
|
|
|
|
|
|
static ConstantInt *createOrdering(IRBuilder<> *IRB, AtomicOrdering ord) {
|
|
|
|
uint32_t v = 0;
|
|
|
|
switch (ord) {
|
|
|
|
case NotAtomic: assert(false);
|
|
|
|
case Unordered: // Fall-through.
|
2012-11-09 14:12:16 +00:00
|
|
|
case Monotonic: v = 0; break;
|
2012-11-26 14:55:26 +00:00
|
|
|
// case Consume: v = 1; break; // Not specified yet.
|
2012-11-09 14:12:16 +00:00
|
|
|
case Acquire: v = 2; break;
|
|
|
|
case Release: v = 3; break;
|
|
|
|
case AcquireRelease: v = 4; break;
|
|
|
|
case SequentiallyConsistent: v = 5; break;
|
2012-04-27 07:31:53 +00:00
|
|
|
}
|
2012-11-09 14:12:16 +00:00
|
|
|
return IRB->getInt32(v);
|
2012-04-27 07:31:53 +00:00
|
|
|
}
|
|
|
|
|
2013-03-28 11:21:13 +00:00
|
|
|
// If a memset intrinsic gets inlined by the code gen, we will miss races on it.
|
|
|
|
// So, we either need to ensure the intrinsic is not inlined, or instrument it.
|
|
|
|
// We do not instrument memset/memmove/memcpy intrinsics (too complicated),
|
|
|
|
// instead we simply replace them with regular function calls, which are then
|
|
|
|
// intercepted by the run-time.
|
|
|
|
// Since tsan is running after everyone else, the calls should not be
|
|
|
|
// replaced back with intrinsics. If that becomes wrong at some point,
|
|
|
|
// we will need to call e.g. __tsan_memset to avoid the intrinsics.
|
|
|
|
bool ThreadSanitizer::instrumentMemIntrinsic(Instruction *I) {
|
|
|
|
IRBuilder<> IRB(I);
|
|
|
|
if (MemSetInst *M = dyn_cast<MemSetInst>(I)) {
|
|
|
|
IRB.CreateCall3(MemsetFn,
|
|
|
|
IRB.CreatePointerCast(M->getArgOperand(0), IRB.getInt8PtrTy()),
|
|
|
|
IRB.CreateIntCast(M->getArgOperand(1), IRB.getInt32Ty(), false),
|
|
|
|
IRB.CreateIntCast(M->getArgOperand(2), IntptrTy, false));
|
|
|
|
I->eraseFromParent();
|
|
|
|
} else if (MemTransferInst *M = dyn_cast<MemTransferInst>(I)) {
|
|
|
|
IRB.CreateCall3(isa<MemCpyInst>(M) ? MemcpyFn : MemmoveFn,
|
|
|
|
IRB.CreatePointerCast(M->getArgOperand(0), IRB.getInt8PtrTy()),
|
|
|
|
IRB.CreatePointerCast(M->getArgOperand(1), IRB.getInt8PtrTy()),
|
|
|
|
IRB.CreateIntCast(M->getArgOperand(2), IntptrTy, false));
|
|
|
|
I->eraseFromParent();
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2012-11-26 11:36:19 +00:00
|
|
|
// Both llvm and ThreadSanitizer atomic operations are based on C++11/C1x
|
2014-01-24 17:20:08 +00:00
|
|
|
// standards. For background see C++11 standard. A slightly older, publicly
|
2012-11-26 11:36:19 +00:00
|
|
|
// available draft of the standard (not entirely up-to-date, but close enough
|
|
|
|
// for casual browsing) is available here:
|
2012-11-26 16:27:22 +00:00
|
|
|
// http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2011/n3242.pdf
|
2012-11-26 11:36:19 +00:00
|
|
|
// The following page contains more background information:
|
|
|
|
// http://www.hpl.hp.com/personal/Hans_Boehm/c++mm/
|
|
|
|
|
2012-04-27 07:31:53 +00:00
|
|
|
bool ThreadSanitizer::instrumentAtomic(Instruction *I) {
|
|
|
|
IRBuilder<> IRB(I);
|
|
|
|
if (LoadInst *LI = dyn_cast<LoadInst>(I)) {
|
|
|
|
Value *Addr = LI->getPointerOperand();
|
|
|
|
int Idx = getMemoryAccessFuncIndex(Addr);
|
|
|
|
if (Idx < 0)
|
|
|
|
return false;
|
|
|
|
const size_t ByteSize = 1 << Idx;
|
|
|
|
const size_t BitSize = ByteSize * 8;
|
|
|
|
Type *Ty = Type::getIntNTy(IRB.getContext(), BitSize);
|
2012-10-24 17:25:11 +00:00
|
|
|
Type *PtrTy = Ty->getPointerTo();
|
2012-04-27 07:31:53 +00:00
|
|
|
Value *Args[] = {IRB.CreatePointerCast(Addr, PtrTy),
|
|
|
|
createOrdering(&IRB, LI->getOrdering())};
|
2014-08-27 05:25:25 +00:00
|
|
|
CallInst *C = CallInst::Create(TsanAtomicLoad[Idx], Args);
|
2012-04-27 07:31:53 +00:00
|
|
|
ReplaceInstWithInst(I, C);
|
|
|
|
|
|
|
|
} else if (StoreInst *SI = dyn_cast<StoreInst>(I)) {
|
|
|
|
Value *Addr = SI->getPointerOperand();
|
|
|
|
int Idx = getMemoryAccessFuncIndex(Addr);
|
|
|
|
if (Idx < 0)
|
|
|
|
return false;
|
|
|
|
const size_t ByteSize = 1 << Idx;
|
|
|
|
const size_t BitSize = ByteSize * 8;
|
|
|
|
Type *Ty = Type::getIntNTy(IRB.getContext(), BitSize);
|
2012-10-24 17:25:11 +00:00
|
|
|
Type *PtrTy = Ty->getPointerTo();
|
2012-04-27 07:31:53 +00:00
|
|
|
Value *Args[] = {IRB.CreatePointerCast(Addr, PtrTy),
|
|
|
|
IRB.CreateIntCast(SI->getValueOperand(), Ty, false),
|
|
|
|
createOrdering(&IRB, SI->getOrdering())};
|
2014-08-27 05:25:25 +00:00
|
|
|
CallInst *C = CallInst::Create(TsanAtomicStore[Idx], Args);
|
2012-04-27 07:31:53 +00:00
|
|
|
ReplaceInstWithInst(I, C);
|
2012-11-09 12:55:36 +00:00
|
|
|
} else if (AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(I)) {
|
|
|
|
Value *Addr = RMWI->getPointerOperand();
|
|
|
|
int Idx = getMemoryAccessFuncIndex(Addr);
|
|
|
|
if (Idx < 0)
|
|
|
|
return false;
|
|
|
|
Function *F = TsanAtomicRMW[RMWI->getOperation()][Idx];
|
2014-04-25 05:29:35 +00:00
|
|
|
if (!F)
|
2012-11-09 12:55:36 +00:00
|
|
|
return false;
|
|
|
|
const size_t ByteSize = 1 << Idx;
|
|
|
|
const size_t BitSize = ByteSize * 8;
|
|
|
|
Type *Ty = Type::getIntNTy(IRB.getContext(), BitSize);
|
|
|
|
Type *PtrTy = Ty->getPointerTo();
|
|
|
|
Value *Args[] = {IRB.CreatePointerCast(Addr, PtrTy),
|
|
|
|
IRB.CreateIntCast(RMWI->getValOperand(), Ty, false),
|
|
|
|
createOrdering(&IRB, RMWI->getOrdering())};
|
2014-08-27 05:25:25 +00:00
|
|
|
CallInst *C = CallInst::Create(F, Args);
|
2012-11-09 12:55:36 +00:00
|
|
|
ReplaceInstWithInst(I, C);
|
|
|
|
} else if (AtomicCmpXchgInst *CASI = dyn_cast<AtomicCmpXchgInst>(I)) {
|
|
|
|
Value *Addr = CASI->getPointerOperand();
|
|
|
|
int Idx = getMemoryAccessFuncIndex(Addr);
|
|
|
|
if (Idx < 0)
|
|
|
|
return false;
|
|
|
|
const size_t ByteSize = 1 << Idx;
|
|
|
|
const size_t BitSize = ByteSize * 8;
|
|
|
|
Type *Ty = Type::getIntNTy(IRB.getContext(), BitSize);
|
|
|
|
Type *PtrTy = Ty->getPointerTo();
|
|
|
|
Value *Args[] = {IRB.CreatePointerCast(Addr, PtrTy),
|
|
|
|
IRB.CreateIntCast(CASI->getCompareOperand(), Ty, false),
|
|
|
|
IRB.CreateIntCast(CASI->getNewValOperand(), Ty, false),
|
2014-03-11 10:48:52 +00:00
|
|
|
createOrdering(&IRB, CASI->getSuccessOrdering()),
|
|
|
|
createOrdering(&IRB, CASI->getFailureOrdering())};
|
IR: add "cmpxchg weak" variant to support permitted failure.
This commit adds a weak variant of the cmpxchg operation, as described
in C++11. A cmpxchg instruction with this modifier is permitted to
fail to store, even if the comparison indicated it should.
As a result, cmpxchg instructions must return a flag indicating
success in addition to their original iN value loaded. Thus, for
uniformity *all* cmpxchg instructions now return "{ iN, i1 }". The
second flag is 1 when the store succeeded.
At the DAG level, a new ATOMIC_CMP_SWAP_WITH_SUCCESS node has been
added as the natural representation for the new cmpxchg instructions.
It is a strong cmpxchg.
By default this gets Expanded to the existing ATOMIC_CMP_SWAP during
Legalization, so existing backends should see no change in behaviour.
If they wish to deal with the enhanced node instead, they can call
setOperationAction on it. Beware: as a node with 2 results, it cannot
be selected from TableGen.
Currently, no use is made of the extra information provided in this
patch. Test updates are almost entirely adapting the input IR to the
new scheme.
Summary for out of tree users:
------------------------------
+ Legacy Bitcode files are upgraded during read.
+ Legacy assembly IR files will be invalid.
+ Front-ends must adapt to different type for "cmpxchg".
+ Backends should be unaffected by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210903 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 14:24:07 +00:00
|
|
|
CallInst *C = IRB.CreateCall(TsanAtomicCAS[Idx], Args);
|
|
|
|
Value *Success = IRB.CreateICmpEQ(C, CASI->getCompareOperand());
|
|
|
|
|
|
|
|
Value *Res = IRB.CreateInsertValue(UndefValue::get(CASI->getType()), C, 0);
|
|
|
|
Res = IRB.CreateInsertValue(Res, Success, 1);
|
|
|
|
|
|
|
|
I->replaceAllUsesWith(Res);
|
|
|
|
I->eraseFromParent();
|
2012-11-09 12:55:36 +00:00
|
|
|
} else if (FenceInst *FI = dyn_cast<FenceInst>(I)) {
|
|
|
|
Value *Args[] = {createOrdering(&IRB, FI->getOrdering())};
|
|
|
|
Function *F = FI->getSynchScope() == SingleThread ?
|
|
|
|
TsanAtomicSignalFence : TsanAtomicThreadFence;
|
2014-08-27 05:25:25 +00:00
|
|
|
CallInst *C = CallInst::Create(F, Args);
|
2012-11-09 12:55:36 +00:00
|
|
|
ReplaceInstWithInst(I, C);
|
2012-04-27 07:31:53 +00:00
|
|
|
}
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
int ThreadSanitizer::getMemoryAccessFuncIndex(Value *Addr) {
|
|
|
|
Type *OrigPtrTy = Addr->getType();
|
|
|
|
Type *OrigTy = cast<PointerType>(OrigPtrTy)->getElementType();
|
|
|
|
assert(OrigTy->isSized());
|
2014-02-21 00:06:31 +00:00
|
|
|
uint32_t TypeSize = DL->getTypeStoreSizeInBits(OrigTy);
|
2012-04-27 07:31:53 +00:00
|
|
|
if (TypeSize != 8 && TypeSize != 16 &&
|
|
|
|
TypeSize != 32 && TypeSize != 64 && TypeSize != 128) {
|
|
|
|
NumAccessesWithBadSize++;
|
|
|
|
// Ignore all unusual sizes.
|
|
|
|
return -1;
|
|
|
|
}
|
2013-05-24 22:23:49 +00:00
|
|
|
size_t Idx = countTrailingZeros(TypeSize / 8);
|
2012-04-27 07:31:53 +00:00
|
|
|
assert(Idx < kNumberOfAccessSizes);
|
|
|
|
return Idx;
|
|
|
|
}
|