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https://github.com/c64scene-ar/llvm-6502.git
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[tsan] Atomic support for ThreadSanitizer, patch by Dmitry Vyukov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155698 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Kostya Serebryany
parent
76c5897eae
commit
e507922779
@ -39,6 +39,7 @@
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/Transforms/Instrumentation.h"
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#include "llvm/Transforms/Utils/BasicBlockUtils.h"
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#include "llvm/Transforms/Utils/ModuleUtils.h"
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#include "llvm/Type.h"
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@ -62,26 +63,32 @@ namespace {
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/// ThreadSanitizer: instrument the code in module to find races.
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struct ThreadSanitizer : public FunctionPass {
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ThreadSanitizer();
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const char *getPassName() const;
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bool runOnFunction(Function &F);
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bool doInitialization(Module &M);
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bool instrumentLoadOrStore(Instruction *I);
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static char ID; // Pass identification, replacement for typeid.
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private:
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bool instrumentLoadOrStore(Instruction *I);
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bool instrumentAtomic(Instruction *I);
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void choseInstructionsToInstrument(SmallVectorImpl<Instruction*> &Local,
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SmallVectorImpl<Instruction*> &All);
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bool addrPointsToConstantData(Value *Addr);
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int getMemoryAccessFuncIndex(Value *Addr);
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TargetData *TD;
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OwningPtr<FunctionBlackList> BL;
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IntegerType *OrdTy;
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// Callbacks to run-time library are computed in doInitialization.
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Value *TsanFuncEntry;
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Value *TsanFuncExit;
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Function *TsanFuncEntry;
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Function *TsanFuncExit;
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// Accesses sizes are powers of two: 1, 2, 4, 8, 16.
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static const size_t kNumberOfAccessSizes = 5;
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Value *TsanRead[kNumberOfAccessSizes];
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Value *TsanWrite[kNumberOfAccessSizes];
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Value *TsanVptrUpdate;
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Function *TsanRead[kNumberOfAccessSizes];
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Function *TsanWrite[kNumberOfAccessSizes];
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Function *TsanAtomicLoad[kNumberOfAccessSizes];
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Function *TsanAtomicStore[kNumberOfAccessSizes];
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Function *TsanVptrUpdate;
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};
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} // namespace
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@ -90,6 +97,10 @@ INITIALIZE_PASS(ThreadSanitizer, "tsan",
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"ThreadSanitizer: detects data races.",
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false, false)
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const char *ThreadSanitizer::getPassName() const {
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return "ThreadSanitizer";
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}
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ThreadSanitizer::ThreadSanitizer()
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: FunctionPass(ID),
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TD(NULL) {
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@ -99,6 +110,13 @@ FunctionPass *llvm::createThreadSanitizerPass() {
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return new ThreadSanitizer();
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}
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static Function *checkInterfaceFunction(Constant *FuncOrBitcast) {
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if (Function *F = dyn_cast<Function>(FuncOrBitcast))
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return F;
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FuncOrBitcast->dump();
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report_fatal_error("ThreadSanitizer interface function redefined");
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}
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bool ThreadSanitizer::doInitialization(Module &M) {
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TD = getAnalysisIfAvailable<TargetData>();
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if (!TD)
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@ -112,23 +130,38 @@ bool ThreadSanitizer::doInitialization(Module &M) {
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appendToGlobalCtors(M, cast<Function>(TsanInit), 0);
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// Initialize the callbacks.
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TsanFuncEntry = M.getOrInsertFunction("__tsan_func_entry", IRB.getVoidTy(),
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IRB.getInt8PtrTy(), NULL);
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TsanFuncExit = M.getOrInsertFunction("__tsan_func_exit", IRB.getVoidTy(),
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NULL);
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TsanFuncEntry = checkInterfaceFunction(M.getOrInsertFunction(
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"__tsan_func_entry", IRB.getVoidTy(), IRB.getInt8PtrTy(), NULL));
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TsanFuncExit = checkInterfaceFunction(M.getOrInsertFunction(
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"__tsan_func_exit", IRB.getVoidTy(), NULL));
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OrdTy = IRB.getInt32Ty();
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for (size_t i = 0; i < kNumberOfAccessSizes; ++i) {
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SmallString<32> ReadName("__tsan_read");
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ReadName += itostr(1 << i);
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TsanRead[i] = M.getOrInsertFunction(ReadName, IRB.getVoidTy(),
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IRB.getInt8PtrTy(), NULL);
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SmallString<32> WriteName("__tsan_write");
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WriteName += itostr(1 << i);
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TsanWrite[i] = M.getOrInsertFunction(WriteName, IRB.getVoidTy(),
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IRB.getInt8PtrTy(), NULL);
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const size_t ByteSize = 1 << i;
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const size_t BitSize = ByteSize * 8;
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SmallString<32> ReadName("__tsan_read" + itostr(ByteSize));
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TsanRead[i] = checkInterfaceFunction(M.getOrInsertFunction(
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ReadName, IRB.getVoidTy(), IRB.getInt8PtrTy(), NULL));
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SmallString<32> WriteName("__tsan_write" + itostr(ByteSize));
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TsanWrite[i] = checkInterfaceFunction(M.getOrInsertFunction(
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WriteName, IRB.getVoidTy(), IRB.getInt8PtrTy(), NULL));
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Type *Ty = Type::getIntNTy(M.getContext(), BitSize);
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Type *PtrTy = Ty->getPointerTo();
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SmallString<32> AtomicLoadName("__tsan_atomic" + itostr(BitSize) +
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"_load");
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TsanAtomicLoad[i] = checkInterfaceFunction(M.getOrInsertFunction(
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AtomicLoadName, Ty, PtrTy, OrdTy, NULL));
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SmallString<32> AtomicStoreName("__tsan_atomic" + itostr(BitSize) +
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"_store");
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TsanAtomicStore[i] = checkInterfaceFunction(M.getOrInsertFunction(
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AtomicStoreName, IRB.getVoidTy(), PtrTy, Ty, OrdTy,
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NULL));
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}
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TsanVptrUpdate = M.getOrInsertFunction("__tsan_vptr_update", IRB.getVoidTy(),
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IRB.getInt8PtrTy(), IRB.getInt8PtrTy(),
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NULL);
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TsanVptrUpdate = checkInterfaceFunction(M.getOrInsertFunction(
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"__tsan_vptr_update", IRB.getVoidTy(), IRB.getInt8PtrTy(),
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IRB.getInt8PtrTy(), NULL));
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return true;
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}
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@ -202,12 +235,27 @@ void ThreadSanitizer::choseInstructionsToInstrument(
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Local.clear();
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}
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static bool isAtomic(Instruction *I) {
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if (LoadInst *LI = dyn_cast<LoadInst>(I))
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return LI->isAtomic() && LI->getSynchScope() == CrossThread;
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else if (StoreInst *SI = dyn_cast<StoreInst>(I))
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return SI->isAtomic() && SI->getSynchScope() == CrossThread;
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else if (isa<AtomicRMWInst>(I))
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return true;
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else if (isa<AtomicCmpXchgInst>(I))
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return true;
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else if (FenceInst *FI = dyn_cast<FenceInst>(I))
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return FI->getSynchScope() == CrossThread;
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return false;
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}
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bool ThreadSanitizer::runOnFunction(Function &F) {
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if (!TD) return false;
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if (BL->isIn(F)) return false;
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SmallVector<Instruction*, 8> RetVec;
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SmallVector<Instruction*, 8> AllLoadsAndStores;
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SmallVector<Instruction*, 8> LocalLoadsAndStores;
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SmallVector<Instruction*, 8> AtomicAccesses;
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bool Res = false;
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bool HasCalls = false;
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@ -217,7 +265,9 @@ bool ThreadSanitizer::runOnFunction(Function &F) {
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BasicBlock &BB = *FI;
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for (BasicBlock::iterator BI = BB.begin(), BE = BB.end();
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BI != BE; ++BI) {
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if (isa<LoadInst>(BI) || isa<StoreInst>(BI))
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if (isAtomic(BI))
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AtomicAccesses.push_back(BI);
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else if (isa<LoadInst>(BI) || isa<StoreInst>(BI))
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LocalLoadsAndStores.push_back(BI);
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else if (isa<ReturnInst>(BI))
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RetVec.push_back(BI);
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@ -238,6 +288,11 @@ bool ThreadSanitizer::runOnFunction(Function &F) {
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Res |= instrumentLoadOrStore(AllLoadsAndStores[i]);
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}
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// Instrument atomic memory accesses.
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for (size_t i = 0, n = AtomicAccesses.size(); i < n; ++i) {
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Res |= instrumentAtomic(AtomicAccesses[i]);
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}
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// Instrument function entry/exit points if there were instrumented accesses.
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if (Res || HasCalls) {
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IRBuilder<> IRB(F.getEntryBlock().getFirstNonPHI());
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@ -260,16 +315,9 @@ bool ThreadSanitizer::instrumentLoadOrStore(Instruction *I) {
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Value *Addr = IsWrite
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? cast<StoreInst>(I)->getPointerOperand()
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: cast<LoadInst>(I)->getPointerOperand();
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Type *OrigPtrTy = Addr->getType();
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Type *OrigTy = cast<PointerType>(OrigPtrTy)->getElementType();
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assert(OrigTy->isSized());
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uint32_t TypeSize = TD->getTypeStoreSizeInBits(OrigTy);
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if (TypeSize != 8 && TypeSize != 16 &&
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TypeSize != 32 && TypeSize != 64 && TypeSize != 128) {
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NumAccessesWithBadSize++;
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// Ignore all unusual sizes.
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int Idx = getMemoryAccessFuncIndex(Addr);
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if (Idx < 0)
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return false;
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}
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if (IsWrite && isVtableAccess(I)) {
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Value *StoredValue = cast<StoreInst>(I)->getValueOperand();
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IRB.CreateCall2(TsanVptrUpdate,
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@ -278,11 +326,82 @@ bool ThreadSanitizer::instrumentLoadOrStore(Instruction *I) {
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NumInstrumentedVtableWrites++;
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return true;
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}
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size_t Idx = CountTrailingZeros_32(TypeSize / 8);
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assert(Idx < kNumberOfAccessSizes);
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Value *OnAccessFunc = IsWrite ? TsanWrite[Idx] : TsanRead[Idx];
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IRB.CreateCall(OnAccessFunc, IRB.CreatePointerCast(Addr, IRB.getInt8PtrTy()));
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if (IsWrite) NumInstrumentedWrites++;
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else NumInstrumentedReads++;
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return true;
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}
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static ConstantInt *createOrdering(IRBuilder<> *IRB, AtomicOrdering ord) {
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uint32_t v = 0;
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switch (ord) {
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case NotAtomic: assert(false);
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case Unordered: // Fall-through.
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case Monotonic: v = 1 << 0; break;
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// case Consume: v = 1 << 1; break; // Not specified yet.
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case Acquire: v = 1 << 2; break;
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case Release: v = 1 << 3; break;
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case AcquireRelease: v = 1 << 4; break;
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case SequentiallyConsistent: v = 1 << 5; break;
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}
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return IRB->getInt32(v);
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}
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bool ThreadSanitizer::instrumentAtomic(Instruction *I) {
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IRBuilder<> IRB(I);
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if (LoadInst *LI = dyn_cast<LoadInst>(I)) {
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Value *Addr = LI->getPointerOperand();
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int Idx = getMemoryAccessFuncIndex(Addr);
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if (Idx < 0)
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return false;
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const size_t ByteSize = 1 << Idx;
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const size_t BitSize = ByteSize * 8;
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Type *Ty = Type::getIntNTy(IRB.getContext(), BitSize);
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Type *PtrTy = Ty->getPointerTo();
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Value *Args[] = {IRB.CreatePointerCast(Addr, PtrTy),
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createOrdering(&IRB, LI->getOrdering())};
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CallInst *C = CallInst::Create(TsanAtomicLoad[Idx],
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ArrayRef<Value*>(Args));
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ReplaceInstWithInst(I, C);
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} else if (StoreInst *SI = dyn_cast<StoreInst>(I)) {
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Value *Addr = SI->getPointerOperand();
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int Idx = getMemoryAccessFuncIndex(Addr);
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if (Idx < 0)
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return false;
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const size_t ByteSize = 1 << Idx;
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const size_t BitSize = ByteSize * 8;
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Type *Ty = Type::getIntNTy(IRB.getContext(), BitSize);
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Type *PtrTy = Ty->getPointerTo();
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Value *Args[] = {IRB.CreatePointerCast(Addr, PtrTy),
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IRB.CreateIntCast(SI->getValueOperand(), Ty, false),
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createOrdering(&IRB, SI->getOrdering())};
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CallInst *C = CallInst::Create(TsanAtomicStore[Idx],
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ArrayRef<Value*>(Args));
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ReplaceInstWithInst(I, C);
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} else if (isa<AtomicRMWInst>(I)) {
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// FIXME: Not yet supported.
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} else if (isa<AtomicCmpXchgInst>(I)) {
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// FIXME: Not yet supported.
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} else if (isa<FenceInst>(I)) {
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// FIXME: Not yet supported.
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}
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return true;
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}
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int ThreadSanitizer::getMemoryAccessFuncIndex(Value *Addr) {
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Type *OrigPtrTy = Addr->getType();
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Type *OrigTy = cast<PointerType>(OrigPtrTy)->getElementType();
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assert(OrigTy->isSized());
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uint32_t TypeSize = TD->getTypeStoreSizeInBits(OrigTy);
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if (TypeSize != 8 && TypeSize != 16 &&
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TypeSize != 32 && TypeSize != 64 && TypeSize != 128) {
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NumAccessesWithBadSize++;
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// Ignore all unusual sizes.
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return -1;
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}
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size_t Idx = CountTrailingZeros_32(TypeSize / 8);
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assert(Idx < kNumberOfAccessSizes);
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return Idx;
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}
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323
test/Instrumentation/ThreadSanitizer/atomic.ll
Normal file
323
test/Instrumentation/ThreadSanitizer/atomic.ll
Normal file
@ -0,0 +1,323 @@
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; RUN: opt < %s -tsan -S | FileCheck %s
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; Check that atomic memory operations are converted to calls into ThreadSanitizer runtime.
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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define i8 @atomic8_load_unordered(i8* %a) nounwind uwtable {
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entry:
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%0 = load atomic i8* %a unordered, align 1
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ret i8 %0
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}
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; CHECK: atomic8_load_unordered
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; CHECK: call i8 @__tsan_atomic8_load(i8* %a, i32 1)
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define i8 @atomic8_load_monotonic(i8* %a) nounwind uwtable {
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entry:
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%0 = load atomic i8* %a monotonic, align 1
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ret i8 %0
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}
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; CHECK: atomic8_load_monotonic
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; CHECK: call i8 @__tsan_atomic8_load(i8* %a, i32 1)
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define i8 @atomic8_load_acquire(i8* %a) nounwind uwtable {
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entry:
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%0 = load atomic i8* %a acquire, align 1
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ret i8 %0
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}
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; CHECK: atomic8_load_acquire
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; CHECK: call i8 @__tsan_atomic8_load(i8* %a, i32 4)
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define i8 @atomic8_load_seq_cst(i8* %a) nounwind uwtable {
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entry:
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%0 = load atomic i8* %a seq_cst, align 1
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ret i8 %0
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}
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; CHECK: atomic8_load_seq_cst
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; CHECK: call i8 @__tsan_atomic8_load(i8* %a, i32 32)
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define void @atomic8_store_unordered(i8* %a) nounwind uwtable {
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entry:
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store atomic i8 0, i8* %a unordered, align 1
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ret void
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}
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; CHECK: atomic8_store_unordered
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; CHECK: call void @__tsan_atomic8_store(i8* %a, i8 0, i32 1)
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define void @atomic8_store_monotonic(i8* %a) nounwind uwtable {
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entry:
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store atomic i8 0, i8* %a monotonic, align 1
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ret void
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}
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; CHECK: atomic8_store_monotonic
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; CHECK: call void @__tsan_atomic8_store(i8* %a, i8 0, i32 1)
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define void @atomic8_store_release(i8* %a) nounwind uwtable {
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entry:
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store atomic i8 0, i8* %a release, align 1
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ret void
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}
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; CHECK: atomic8_store_release
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; CHECK: call void @__tsan_atomic8_store(i8* %a, i8 0, i32 8)
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define void @atomic8_store_seq_cst(i8* %a) nounwind uwtable {
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entry:
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store atomic i8 0, i8* %a seq_cst, align 1
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ret void
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}
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; CHECK: atomic8_store_seq_cst
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; CHECK: call void @__tsan_atomic8_store(i8* %a, i8 0, i32 32)
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define i16 @atomic16_load_unordered(i16* %a) nounwind uwtable {
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entry:
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%0 = load atomic i16* %a unordered, align 2
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ret i16 %0
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}
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; CHECK: atomic16_load_unordered
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; CHECK: call i16 @__tsan_atomic16_load(i16* %a, i32 1)
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define i16 @atomic16_load_monotonic(i16* %a) nounwind uwtable {
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entry:
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%0 = load atomic i16* %a monotonic, align 2
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ret i16 %0
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}
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; CHECK: atomic16_load_monotonic
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; CHECK: call i16 @__tsan_atomic16_load(i16* %a, i32 1)
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define i16 @atomic16_load_acquire(i16* %a) nounwind uwtable {
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entry:
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%0 = load atomic i16* %a acquire, align 2
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ret i16 %0
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}
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; CHECK: atomic16_load_acquire
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; CHECK: call i16 @__tsan_atomic16_load(i16* %a, i32 4)
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define i16 @atomic16_load_seq_cst(i16* %a) nounwind uwtable {
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entry:
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%0 = load atomic i16* %a seq_cst, align 2
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ret i16 %0
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}
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; CHECK: atomic16_load_seq_cst
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; CHECK: call i16 @__tsan_atomic16_load(i16* %a, i32 32)
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define void @atomic16_store_unordered(i16* %a) nounwind uwtable {
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entry:
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store atomic i16 0, i16* %a unordered, align 2
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ret void
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}
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; CHECK: atomic16_store_unordered
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; CHECK: call void @__tsan_atomic16_store(i16* %a, i16 0, i32 1)
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define void @atomic16_store_monotonic(i16* %a) nounwind uwtable {
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entry:
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store atomic i16 0, i16* %a monotonic, align 2
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ret void
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}
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; CHECK: atomic16_store_monotonic
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; CHECK: call void @__tsan_atomic16_store(i16* %a, i16 0, i32 1)
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|
||||
define void @atomic16_store_release(i16* %a) nounwind uwtable {
|
||||
entry:
|
||||
store atomic i16 0, i16* %a release, align 2
|
||||
ret void
|
||||
}
|
||||
; CHECK: atomic16_store_release
|
||||
; CHECK: call void @__tsan_atomic16_store(i16* %a, i16 0, i32 8)
|
||||
|
||||
define void @atomic16_store_seq_cst(i16* %a) nounwind uwtable {
|
||||
entry:
|
||||
store atomic i16 0, i16* %a seq_cst, align 2
|
||||
ret void
|
||||
}
|
||||
; CHECK: atomic16_store_seq_cst
|
||||
; CHECK: call void @__tsan_atomic16_store(i16* %a, i16 0, i32 32)
|
||||
|
||||
define i32 @atomic32_load_unordered(i32* %a) nounwind uwtable {
|
||||
entry:
|
||||
%0 = load atomic i32* %a unordered, align 4
|
||||
ret i32 %0
|
||||
}
|
||||
; CHECK: atomic32_load_unordered
|
||||
; CHECK: call i32 @__tsan_atomic32_load(i32* %a, i32 1)
|
||||
|
||||
define i32 @atomic32_load_monotonic(i32* %a) nounwind uwtable {
|
||||
entry:
|
||||
%0 = load atomic i32* %a monotonic, align 4
|
||||
ret i32 %0
|
||||
}
|
||||
; CHECK: atomic32_load_monotonic
|
||||
; CHECK: call i32 @__tsan_atomic32_load(i32* %a, i32 1)
|
||||
|
||||
define i32 @atomic32_load_acquire(i32* %a) nounwind uwtable {
|
||||
entry:
|
||||
%0 = load atomic i32* %a acquire, align 4
|
||||
ret i32 %0
|
||||
}
|
||||
; CHECK: atomic32_load_acquire
|
||||
; CHECK: call i32 @__tsan_atomic32_load(i32* %a, i32 4)
|
||||
|
||||
define i32 @atomic32_load_seq_cst(i32* %a) nounwind uwtable {
|
||||
entry:
|
||||
%0 = load atomic i32* %a seq_cst, align 4
|
||||
ret i32 %0
|
||||
}
|
||||
; CHECK: atomic32_load_seq_cst
|
||||
; CHECK: call i32 @__tsan_atomic32_load(i32* %a, i32 32)
|
||||
|
||||
define void @atomic32_store_unordered(i32* %a) nounwind uwtable {
|
||||
entry:
|
||||
store atomic i32 0, i32* %a unordered, align 4
|
||||
ret void
|
||||
}
|
||||
; CHECK: atomic32_store_unordered
|
||||
; CHECK: call void @__tsan_atomic32_store(i32* %a, i32 0, i32 1)
|
||||
|
||||
define void @atomic32_store_monotonic(i32* %a) nounwind uwtable {
|
||||
entry:
|
||||
store atomic i32 0, i32* %a monotonic, align 4
|
||||
ret void
|
||||
}
|
||||
; CHECK: atomic32_store_monotonic
|
||||
; CHECK: call void @__tsan_atomic32_store(i32* %a, i32 0, i32 1)
|
||||
|
||||
define void @atomic32_store_release(i32* %a) nounwind uwtable {
|
||||
entry:
|
||||
store atomic i32 0, i32* %a release, align 4
|
||||
ret void
|
||||
}
|
||||
; CHECK: atomic32_store_release
|
||||
; CHECK: call void @__tsan_atomic32_store(i32* %a, i32 0, i32 8)
|
||||
|
||||
define void @atomic32_store_seq_cst(i32* %a) nounwind uwtable {
|
||||
entry:
|
||||
store atomic i32 0, i32* %a seq_cst, align 4
|
||||
ret void
|
||||
}
|
||||
; CHECK: atomic32_store_seq_cst
|
||||
; CHECK: call void @__tsan_atomic32_store(i32* %a, i32 0, i32 32)
|
||||
|
||||
define i64 @atomic64_load_unordered(i64* %a) nounwind uwtable {
|
||||
entry:
|
||||
%0 = load atomic i64* %a unordered, align 8
|
||||
ret i64 %0
|
||||
}
|
||||
; CHECK: atomic64_load_unordered
|
||||
; CHECK: call i64 @__tsan_atomic64_load(i64* %a, i32 1)
|
||||
|
||||
define i64 @atomic64_load_monotonic(i64* %a) nounwind uwtable {
|
||||
entry:
|
||||
%0 = load atomic i64* %a monotonic, align 8
|
||||
ret i64 %0
|
||||
}
|
||||
; CHECK: atomic64_load_monotonic
|
||||
; CHECK: call i64 @__tsan_atomic64_load(i64* %a, i32 1)
|
||||
|
||||
define i64 @atomic64_load_acquire(i64* %a) nounwind uwtable {
|
||||
entry:
|
||||
%0 = load atomic i64* %a acquire, align 8
|
||||
ret i64 %0
|
||||
}
|
||||
; CHECK: atomic64_load_acquire
|
||||
; CHECK: call i64 @__tsan_atomic64_load(i64* %a, i32 4)
|
||||
|
||||
define i64 @atomic64_load_seq_cst(i64* %a) nounwind uwtable {
|
||||
entry:
|
||||
%0 = load atomic i64* %a seq_cst, align 8
|
||||
ret i64 %0
|
||||
}
|
||||
; CHECK: atomic64_load_seq_cst
|
||||
; CHECK: call i64 @__tsan_atomic64_load(i64* %a, i32 32)
|
||||
|
||||
define void @atomic64_store_unordered(i64* %a) nounwind uwtable {
|
||||
entry:
|
||||
store atomic i64 0, i64* %a unordered, align 8
|
||||
ret void
|
||||
}
|
||||
; CHECK: atomic64_store_unordered
|
||||
; CHECK: call void @__tsan_atomic64_store(i64* %a, i64 0, i32 1)
|
||||
|
||||
define void @atomic64_store_monotonic(i64* %a) nounwind uwtable {
|
||||
entry:
|
||||
store atomic i64 0, i64* %a monotonic, align 8
|
||||
ret void
|
||||
}
|
||||
; CHECK: atomic64_store_monotonic
|
||||
; CHECK: call void @__tsan_atomic64_store(i64* %a, i64 0, i32 1)
|
||||
|
||||
define void @atomic64_store_release(i64* %a) nounwind uwtable {
|
||||
entry:
|
||||
store atomic i64 0, i64* %a release, align 8
|
||||
ret void
|
||||
}
|
||||
; CHECK: atomic64_store_release
|
||||
; CHECK: call void @__tsan_atomic64_store(i64* %a, i64 0, i32 8)
|
||||
|
||||
define void @atomic64_store_seq_cst(i64* %a) nounwind uwtable {
|
||||
entry:
|
||||
store atomic i64 0, i64* %a seq_cst, align 8
|
||||
ret void
|
||||
}
|
||||
; CHECK: atomic64_store_seq_cst
|
||||
; CHECK: call void @__tsan_atomic64_store(i64* %a, i64 0, i32 32)
|
||||
|
||||
define i128 @atomic128_load_unordered(i128* %a) nounwind uwtable {
|
||||
entry:
|
||||
%0 = load atomic i128* %a unordered, align 16
|
||||
ret i128 %0
|
||||
}
|
||||
; CHECK: atomic128_load_unordered
|
||||
; CHECK: call i128 @__tsan_atomic128_load(i128* %a, i32 1)
|
||||
|
||||
define i128 @atomic128_load_monotonic(i128* %a) nounwind uwtable {
|
||||
entry:
|
||||
%0 = load atomic i128* %a monotonic, align 16
|
||||
ret i128 %0
|
||||
}
|
||||
; CHECK: atomic128_load_monotonic
|
||||
; CHECK: call i128 @__tsan_atomic128_load(i128* %a, i32 1)
|
||||
|
||||
define i128 @atomic128_load_acquire(i128* %a) nounwind uwtable {
|
||||
entry:
|
||||
%0 = load atomic i128* %a acquire, align 16
|
||||
ret i128 %0
|
||||
}
|
||||
; CHECK: atomic128_load_acquire
|
||||
; CHECK: call i128 @__tsan_atomic128_load(i128* %a, i32 4)
|
||||
|
||||
define i128 @atomic128_load_seq_cst(i128* %a) nounwind uwtable {
|
||||
entry:
|
||||
%0 = load atomic i128* %a seq_cst, align 16
|
||||
ret i128 %0
|
||||
}
|
||||
; CHECK: atomic128_load_seq_cst
|
||||
; CHECK: call i128 @__tsan_atomic128_load(i128* %a, i32 32)
|
||||
|
||||
define void @atomic128_store_unordered(i128* %a) nounwind uwtable {
|
||||
entry:
|
||||
store atomic i128 0, i128* %a unordered, align 16
|
||||
ret void
|
||||
}
|
||||
; CHECK: atomic128_store_unordered
|
||||
; CHECK: call void @__tsan_atomic128_store(i128* %a, i128 0, i32 1)
|
||||
|
||||
define void @atomic128_store_monotonic(i128* %a) nounwind uwtable {
|
||||
entry:
|
||||
store atomic i128 0, i128* %a monotonic, align 16
|
||||
ret void
|
||||
}
|
||||
; CHECK: atomic128_store_monotonic
|
||||
; CHECK: call void @__tsan_atomic128_store(i128* %a, i128 0, i32 1)
|
||||
|
||||
define void @atomic128_store_release(i128* %a) nounwind uwtable {
|
||||
entry:
|
||||
store atomic i128 0, i128* %a release, align 16
|
||||
ret void
|
||||
}
|
||||
; CHECK: atomic128_store_release
|
||||
; CHECK: call void @__tsan_atomic128_store(i128* %a, i128 0, i32 8)
|
||||
|
||||
define void @atomic128_store_seq_cst(i128* %a) nounwind uwtable {
|
||||
entry:
|
||||
store atomic i128 0, i128* %a seq_cst, align 16
|
||||
ret void
|
||||
}
|
||||
; CHECK: atomic128_store_seq_cst
|
||||
; CHECK: call void @__tsan_atomic128_store(i128* %a, i128 0, i32 32)
|
||||
Loading…
Reference in New Issue
Block a user